CN103425117A - Stability testing system applied to IPC of 092 torpedo director - Google Patents
Stability testing system applied to IPC of 092 torpedo director Download PDFInfo
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- CN103425117A CN103425117A CN2012101616242A CN201210161624A CN103425117A CN 103425117 A CN103425117 A CN 103425117A CN 2012101616242 A CN2012101616242 A CN 2012101616242A CN 201210161624 A CN201210161624 A CN 201210161624A CN 103425117 A CN103425117 A CN 103425117A
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Abstract
The invention relates to a stability testing system applied to an IPC of a 092 torpedo director. The stability testing system applied to the IPC of the 092 torpedo director comprises a CPU, a GPU, a storage device, a communication port and a communication bus. The CPU, the GPU, the storage and the communication port are mutually connected through the communication bus. A first register and a first cache are arranged in the CPU. The GPU is provided with a second register and a video memory. A page register is arranged in the storage device. A control register and an asynchronous cache are arranged in the communication port. Compared with the prior art, the stability testing system applied to the IPC of the 092 torpedo director has the advantages of improving the stability of the IPC of a torpedo direction system and the like.
Description
Technical field
The present invention relates to a kind of industrial computer Detection of Stability system, especially relate to a kind of for 092 torpedo directoor industrial computer Detection of Stability system.
Background technology
The industrial computer working time of original 092 torpedo directoor of our company of a specified duration after, there will be unsteady phenomena, cause whole system stability and reliability variation, can't meet client's demand.
Summary of the invention
Purpose of the present invention is exactly to provide a kind of for 092 torpedo directoor industrial computer Detection of Stability system in order to overcome the defect that above-mentioned prior art exists.
Purpose of the present invention can be achieved through the following technical solutions:
A kind ofly for 092 torpedo directoor industrial computer Detection of Stability system, it is characterized in that, comprise CPU, GPU, storer, communication interface and communication bus, described CPU, GPU, storer, communication interface connect by communication bus between any two.
Be provided with the first register and the first buffer in described CPU, the testing process of CPU stability is as follows:
11) the first register is chosen the first buffer in CPU;
12) to data writing in the first buffer;
13) CPU sense data from the first buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 14), otherwise, perform step 15);
14) the normal number of times of CPU adds 1, and returns to step 11);
15) number of times of makeing mistakes of CPU adds 1, and returns to step 11).
Described GPU is provided with the second register and video memory, and wherein the testing process of GPU stability is as follows:
21) the second register is chosen the video memory in GPU;
22) to data writing in video memory;
23) GPU sense data from video memory, and judge that whether data writing is consistent with sense data, if yes, perform step 24), otherwise, perform step 25);
24) the normal number of times of GPU adds 1, and returns to step 21);
25) number of times of makeing mistakes of GPU adds 1, and returns to step 21).
Be provided with page register in described storer, the testing process of described storer stability is as follows:
31) choose the storer of the corresponding page by page register;
32) write data to storer;
33) from the storer sense data, and judge that whether data writing is consistent with sense data, if yes, perform step 34), otherwise, perform step 35);
34) the normal number of times of storer adds 1, and returns to step 31);
35) number of times of makeing mistakes of storer adds 1, and returns to step 31).
Be provided with control register and asynchronous buffer in described communication interface, the testing process of communication interface stability is as follows:
41) asynchronous buffer that control register is chosen;
42) to the asynchronous buffer data writing;
43) control register sense data from asynchronous buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 44), otherwise, perform step 45);
44) the normal number of times of communication interface adds 1, and returns to step 41);
45) number of times of makeing mistakes of communication interface adds 1, and returns to step 41).
Compared with prior art, the present invention has the stability of the industrial computer that has improved the torpedo firing command system, thereby has improved stability and the reliability of whole system.
The accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment
As shown in Figure 1, a kind of for 092 torpedo directoor industrial computer Detection of Stability system, comprise CPU1, GPU2, storer 3, communication interface 4 and communication bus 5, described CPU1, GPU2, storer 3, communication interface 4 connect by communication bus 5 between any two.
Be provided with the first register 11 and the first buffer 12 in described CPU1, the testing process of CPU1 stability is as follows:
11) the first register is chosen the first buffer in CPU:
12) to data writing in the first buffer;
13) CPU sense data from the first buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 14), otherwise, perform step 15);
14) the normal number of times of CPU adds 1, and returns to step 11);
15) number of times of makeing mistakes of CPU adds 1, and returns to step 11).
Described GPU2 is provided with the second register 21 and video memory 22, and wherein the testing process of GPU stability is as follows:
21) the second register is chosen the video memory in GPU;
22) to data writing in video memory;
23) GPU sense data from video memory, and judge that whether data writing is consistent with sense data, if yes, perform step 24), otherwise, perform step 25);
24) the normal number of times of GPU adds 1, and returns to step 21);
25) number of times of makeing mistakes of GPU adds 1, and returns to step 21).
Be provided with page register 31 in described storer 3, the testing process of described storer stability is as follows:
31) choose the storer of the corresponding page by page register;
32) write data to storer;
33) from the storer sense data, and judge that whether data writing is consistent with sense data, if yes, perform step 34), otherwise, perform step 35);
34) the normal number of times of storer adds 1, and returns to step 31);
35) number of times of makeing mistakes of storer adds 1, and returns to step 31).
Be provided with control register 41 and asynchronous buffer 42 in described communication interface 4, the testing process of communication interface stability is as follows:
41) asynchronous buffer that control register is chosen;
42) to the asynchronous buffer data writing;
43) control register sense data from asynchronous buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 44), otherwise, perform step 45);
44) the normal number of times of communication interface adds 1, and returns to step 41);
45) number of times of makeing mistakes of communication interface adds 1, and returns to step 41).
Claims (5)
1. one kind for 092 torpedo directoor industrial computer Detection of Stability system, it is characterized in that, comprise CPU, GPU, storer, communication interface and communication bus, described CPU, GPU, storer, communication interface connect by communication bus between any two.
2. according to claim 1 a kind ofly it is characterized in that for 092 torpedo directoor industrial computer Detection of Stability system, be provided with the first register and the first buffer in described CPU, the testing process of CPU stability is as follows:
11) the first register is chosen the first buffer in CPU;
12) to data writing in the first buffer;
13) CPU sense data from the first buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 14), otherwise, perform step 15);
14) the normal number of times of CPU adds 1, and returns to step 11);
15) number of times of makeing mistakes of CPU adds 1, and returns to step 11).
3. according to claim 1 a kind ofly it is characterized in that for 092 torpedo directoor industrial computer Detection of Stability system, described GPU is provided with the second register and video memory, and wherein the testing process of GPU stability is as follows:
21) the second register is chosen the video memory in GPU;
22) to data writing in video memory;
23) GPU sense data from video memory, and judge that whether data writing is consistent with sense data, if yes, perform step 24), otherwise, perform step 25);
24) the normal number of times of GPU adds 1, and returns to step 21);
25) number of times of makeing mistakes of GPU adds 1, and returns to step 21).
4. according to claim 1 a kind ofly it is characterized in that for 092 torpedo directoor industrial computer Detection of Stability system, be provided with page register in described storer, the testing process of described storer stability is as follows:
31) choose the storer of the corresponding page by page register;
32) write data to storer;
33) from the storer sense data, and judge that whether data writing is consistent with sense data, if yes, perform step 34), otherwise, perform step 35);
34) the normal number of times of storer adds 1, and returns to step 31);
35) number of times of makeing mistakes of storer adds 1, and returns to step 31).
5. according to claim 1 a kind ofly it is characterized in that for 092 torpedo directoor industrial computer Detection of Stability system, be provided with control register and asynchronous buffer in described communication interface, the testing process of communication interface stability is as follows:
41) asynchronous buffer that control register is chosen;
42) to the asynchronous buffer data writing;
43) control register sense data from asynchronous buffer, and judge that whether data writing is consistent with sense data, if yes, perform step 44), otherwise, perform step 45);
44) the normal number of times of communication interface adds 1, and returns to step 41);
45) number of times of makeing mistakes of communication interface adds 1, and returns to step 41).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210161624.2A CN103425117B (en) | 2012-05-22 | 2012-05-22 | For 092 torpedo directoor industrial computer Detection of Stability system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210161624.2A CN103425117B (en) | 2012-05-22 | 2012-05-22 | For 092 torpedo directoor industrial computer Detection of Stability system |
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| CN103425117A true CN103425117A (en) | 2013-12-04 |
| CN103425117B CN103425117B (en) | 2015-11-18 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1419244A (en) * | 2002-12-10 | 2003-05-21 | 威盛电子股份有限公司 | Fault-tolerant memory module circuit |
| CN1808999A (en) * | 2006-02-23 | 2006-07-26 | 烽火通信科技股份有限公司 | Method and apparatus of CPU fault detection for signal processing unit |
| EP2251756A2 (en) * | 2009-05-14 | 2010-11-17 | Abb Ag | Method and system for testing applications on decentralised programmable control devices of an automation system |
| CN101894060A (en) * | 2010-06-25 | 2010-11-24 | 福建星网锐捷网络有限公司 | Fault detection method and modular device |
| CN202615380U (en) * | 2012-05-22 | 2012-12-19 | 上海黄浦船用仪器有限公司 | Computer stability detecting device |
-
2012
- 2012-05-22 CN CN201210161624.2A patent/CN103425117B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1419244A (en) * | 2002-12-10 | 2003-05-21 | 威盛电子股份有限公司 | Fault-tolerant memory module circuit |
| CN1808999A (en) * | 2006-02-23 | 2006-07-26 | 烽火通信科技股份有限公司 | Method and apparatus of CPU fault detection for signal processing unit |
| EP2251756A2 (en) * | 2009-05-14 | 2010-11-17 | Abb Ag | Method and system for testing applications on decentralised programmable control devices of an automation system |
| CN101894060A (en) * | 2010-06-25 | 2010-11-24 | 福建星网锐捷网络有限公司 | Fault detection method and modular device |
| CN202615380U (en) * | 2012-05-22 | 2012-12-19 | 上海黄浦船用仪器有限公司 | Computer stability detecting device |
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Granted publication date: 20151118 Termination date: 20160522 |