CN103424945A - Liquid crystal display panel and manufacturing method of TFT (Thin Film Transistor) array substrate of liquid crystal display panel - Google Patents
Liquid crystal display panel and manufacturing method of TFT (Thin Film Transistor) array substrate of liquid crystal display panel Download PDFInfo
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- CN103424945A CN103424945A CN2013103741453A CN201310374145A CN103424945A CN 103424945 A CN103424945 A CN 103424945A CN 2013103741453 A CN2013103741453 A CN 2013103741453A CN 201310374145 A CN201310374145 A CN 201310374145A CN 103424945 A CN103424945 A CN 103424945A
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Abstract
The invention discloses a liquid crystal display panel. The liquid crystal display comprises a color film substrate, a TFT (Thin Film Transistor) array substrate arranged opposite to the color film substrate, a liquid crystal positioned between the color film substrate and the TFT array substrate and a flat layer, wherein the TFT array substrate comprises a plurality of pixel regions crossed and limited by a plurality of scanning lines and a plurality of data lines; a plurality of pixel electrodes and a plurality of TFTs which are positioned in the pixel regions; the TFTs are electrically connected with the corresponding pixel electrodes, and the TFTs are further electrically connected with the corresponding scanning lines and data lines; the flat layer is formed on the TFTs and the data lines and covers the TFTs and the data lines; and the flat layer is provided with a plurality of grooves; and the pixel electrodes are positioned above the flat layer and extend to the groove area. Through the technical scheme, when VA (Vertical Arrangement) liquid crystal molecules are driven, the VA liquid crystal molecules above the pixel electrodes can be inclined towards the edge direction correctly, and a region with black lines is limited outside the pixel regions, so that the opening rate when the pixel electrodes are driven can be ensured, and the transmissivity of VA liquid crystal display is effectively improved.
Description
Technical field
The present invention relates to the manufacture method of a kind of display panels and tft array substrate thereof, particularly the manufacture method of a kind of homeotropic liquid crystal display panel and tft array substrate thereof.
Background technology
Light orientation VA(Vertical Alignment, homeotropic alignment) advantage that the display panels of type is simple with its panel construction, processing procedure is simple and easy and have a higher aperture opening ratio extensively is subject to manufacturer's favor.
Be illustrated in figure 1 the sectional view of VA type display panels, this liquid crystal panel comprises tft array substrate 100, color membrane substrates 200 and a plurality of liquid crystal molecule LC between tft array substrate and color membrane substrates.Wherein, color membrane substrates 200 comprises color film glass substrate 210, is arranged at black matrix" 201 and RGB color blocking 202 on this glass substrate 210, is positioned at the conductive layer 205 on black matrix" and RGB color blocking and is positioned at the alignment film 206 on this conductive layer.
The tft array substrate 100 be oppositely arranged with this color membrane substrates 200 comprises: array glass substrate 110, be positioned at multi-strip scanning line 101 on this glass substrate 110, many shared distribution (not shown), gate insulation layer (not shown), many data line (not shown), a plurality of TFT(is not shown in the figures), flatness layer 102, a plurality of pixel electrode 105 and be positioned at the alignment film 106 on pixel electrode.Wherein, sweep trace and data line intersection limit a plurality of pixel regions, and pixel electrode 105 is positioned at pixel region, and are electrically connected to corresponding TFT, and have slit between pixel electrode 105.TFT also is electrically connected to corresponding sweep trace 101 and data line, and gate insulation layer covers sweep trace and shared distribution, and flatness layer 102 is formed at glass substrate 110 tops and covers TFT and data line.A plurality of pixel electrodes 105 are positioned on flatness layer 102 and are positioned at the alignment film 106 on pixel electrode 105.
Between a plurality of liquid crystal molecule LC settings and tft array substrate 100 and color membrane substrates 200, when when input voltage drives, the collocation of the pixel electrode 105 by tft array substrate and the conductive layer 205 of color membrane substrates, VA liquid crystal molecule LC topples over toward specific direction because of the light alignment manufacture process, because liquid crystal molecule LC is subject to the impact of toppling direction and pixel electrode fringe field, can form black line in pixel electrode edge, as shown in Figure 2, when input voltage drives, the liquid crystal molecule LC toppled over toward specific direction can be subject to the impact of pixel electrode fringe field, some liquid crystal molecule can keep vertical direction upright, light can not pass through herein, thereby the black line of generation.As shown in Figure 3, provide a pixel region 50 in figure, sweep trace 501 is positioned at the pixel region center, when input voltage drives, can, under the impact of pixel electrode fringe field, produce and form as shown in Figure 3 black line 502 at the electrode edge place by the liquid crystal molecule LC that specific direction is toppled over.
Summary of the invention
Goal of the invention: what solve existing light orientation VA type display panels forms in pixel electrode edge the problem that black line reduces the aperture opening ratio of display panel.
Technical scheme: in order to reach the foregoing invention purpose, the invention provides a kind of display panels, comprise: color membrane substrates, and this color membrane substrates tft array substrate and the liquid crystal between this color membrane substrates and tft array substrate that are oppositely arranged, wherein, tft array substrate comprises: by multi-strip scanning line and many a plurality of pixel regions, a plurality of pixel electrodes that are positioned at pixel region and a plurality of TFT that the data lines intersection limits, TFT is electrically connected to corresponding pixel electrode, and TFT also is electrically connected with corresponding sweep trace and data line; And a flatness layer, be formed on described TFT and described data line and cover TFT and data line; Described flatness layer has a plurality of grooves.
Further, the thickness of described flatness layer is between 2.4um to 3um;
Further, the width of described groove is less than 5um;
Further, the degree of depth of described groove is less than 2.4um;
Further, described pixel electrode is positioned on described flatness layer and extends to described recess region;
Further, described groove type is formed in the edge of described flatness layer at the pixel electrode of corresponding liquid crystal toppling direction side.
The present invention gives a kind of manufacture method of tft array substrate, comprises the steps:
Step 1: form multi-strip scanning line, many data lines, a plurality of TFT on the glass substrate of tft array; Sweep trace and data line intersection limit a plurality of pixel regions, and TFT is electrically connected to corresponding sweep trace and data line;
Step 2: form the flatness layer with a plurality of grooves on the array base palte that forms above-mentioned pattern;
Step 3: to the array base palte that the forms above-mentioned pattern rear baking journey of being exposed to the sun, make the face curved surface of groove;
Step 4: form a plurality of pixel electrodes on the array base palte that forms above-mentioned pattern, and make the edge of pixel electrode extend into recess region; And pixel electrode and described TFT are electrically connected.
Step 5: on the array base palte that forms above-mentioned pattern, form alignment film.
Further, in described step 2, the width of described groove is less than 5um;
Further, in described step 2, the degree of depth of described groove is less than 2.4um.
Beneficial effect: utilization of the present invention adds the design of groove in the flatness layer processing procedure, can be in the situation that do not increase processing procedure, eliminate the problem that pixel electrode edge forms black line, the aperture opening ratio when guaranteeing that pixel electrode drives, effectively improve the transmitance of VA liquid crystal display.
The accompanying drawing explanation
The sectional view that Fig. 1 is prior art VA type display panels;
Fig. 2 is the schematic diagram that prior art VA type display panels pixel region central authorities and electrode edge place form black line;
The planimetric map that Fig. 3 is prior art one pixel region;
The sectional view that Fig. 4 is display panels of the present invention;
Fig. 5 is that the black line that pixel electrode of the present invention edge forms is positioned at the outer schematic diagram of pixel region;
Fig. 6 A～6E is followed successively by the manufacturing process schematic diagram of a kind of tft array substrate of preferred embodiment of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiment only is not used in and limits the scope of the invention for the present invention is described, after having read the present invention, those skilled in the art all fall within the application's claims limited range to the modification of the various equivalent form of values of the present invention.
With reference to figure 4, the sectional view of its a kind of display panels that is the first embodiment of the present invention.A kind of display panels provided by the invention is that the flatness layer to existing display panels improves.As shown in Figure 3, display panels comprises color membrane substrates 200, and the opposed tft array substrate 300 of color membrane substrates 200 and a plurality of liquid crystal molecule LC between tft array substrate and color membrane substrates 200.Wherein, color membrane substrates 200 is identical with color membrane substrates of the prior art, therefore no longer good horse is stated.And tft array substrate 300 comprises: be positioned at multi-strip scanning line 301 on tft array glass substrate 310, many shared distribution (not shown), gate insulation layer (not shown), many data line (not shown), a plurality of TFT(is not shown in the figures), flatness layer 302, a plurality of pixel electrode 305 and be positioned at the alignment film 306 on pixel electrode.Wherein, gate insulation layer covers sweep trace and shared distribution; Sweep trace and data line intersection limit a plurality of pixel regions, and pixel electrode 305 is positioned at pixel region, and are electrically connected to corresponding TFT, and TFT also is electrically connected with corresponding sweep trace and data line.
And flatness layer 302 is formed on TFT and data line and cover TFT and data line, a plurality of pixel electrodes 305 are positioned on flatness layer 302 and are positioned at the alignment film 306 on pixel electrode 305.Wherein, flatness layer 302 is formed with groove 303 in the pixel electrode edge of corresponding liquid crystal molecule LC toppling direction side, and the degree of depth of groove 303 is less than 2.4um, and the width of groove 303 is less than 5um; The edge of pixel electrode 305 extends in groove 303.When input voltage drives, the collocation of the pixel electrode 305 by tft array substrate and the conductive layer 205 of color membrane substrates, VA liquid crystal molecule LC is subject to toward the edge direction of pixel electrode 305, toppling under the effect of fringe field of pixel electrode 305, and the upright liquid crystal molecule of vertical direction will be positioned at outside pixel electrode, as shown in Figure 5, the black line that pixel electrode edge forms is positioned at outside pixel region.Effectively solved in prior art, the impact because VA liquid crystal molecule LC is subject to toppling direction and pixel electrode fringe field, can form in pixel electrode edge the problem of black line.Also effectively improve the transmitance of VA liquid crystal display in aperture opening ratio when guaranteeing that pixel electrode drives.
The present invention gives a kind of manufacture method of tft array substrate, please refer to Fig. 6 A～6E, and it is followed successively by the manufacturing process schematic diagram of a kind of tft array substrate of preferred embodiment of the present invention.
As shown in Figure 6A, form multi-strip scanning line 301 on the glass substrate 310 of tft array, many shared distribution (not shown), form gate insulation layer (not shown), many data line (not shown), a plurality of TFT(successively again according to the process of prior art not shown in the figures); Wherein, gate insulation layer covers sweep trace and shared distribution; Sweep trace and data line intersection limit a plurality of pixel regions, and TFT is electrically connected to corresponding sweep trace 301 and data line.Same as the prior art because making flow process and technique, therefore not describing good horse in detail, concrete processing step do not state.
As shown in Figure 6B, form the flatness layer 302 with fluted 303 on the array base palte that forms above-mentioned pattern, the thickness of this flatness layer 302 is 2.4um to 3um; Wherein, groove 303 is formed at the pixel electrode edge of flatness layer 302 in corresponding liquid crystal molecule LC toppling direction side; And the width w<5um of groove 303, degree of depth h<2.4um.
As shown in Figure 6 C, to the array base palte that forms above-mentioned pattern rear roasting (Post Bake) processing procedure that exposed to the sun, make the water caltrop curved surface of the face of groove 303.
As shown in Figure 6 D, form a plurality of pixel electrodes on the array base palte that forms above-mentioned pattern, and make the edge of pixel electrode extend into recess region, maximum may extend into the minimum point A position of groove; The material of pixel electrode is ITO; Pixel electrode also has TFT to be electrically connected.When light orientation VA type liquid crystal drive, the black line produced at the edge of pixel electrode will move on to outside pixel region, eliminate the black line in edge of pixel region.
As shown in Fig. 6 E, form alignment film 306 on the array base palte that forms above-mentioned pattern.
The present invention utilizes flatness layer to form groove in respective pixel utmost point edge, so can outside light orientation and fringe field impact, add the impact of surface configuration, make the VA liquid crystal molecule when driving, VA liquid crystal above pixel electrode can correctly be toppled over toward edge direction, the zone that produces black line is limited to outside pixel region, can guarantee aperture opening ratio when pixel electrode drives, effectively improve the transmitance of VA liquid crystal display.
Claims (9)
1. a display panels, comprise: color membrane substrates, and this color membrane substrates tft array substrate and the liquid crystal between this color membrane substrates and tft array substrate that are oppositely arranged, wherein, tft array substrate comprises: by multi-strip scanning line and many a plurality of pixel regions, a plurality of pixel electrodes that are positioned at pixel region and a plurality of TFT that the data lines intersection limits, TFT is electrically connected to corresponding pixel electrode, and TFT also is electrically connected with corresponding sweep trace and data line; And a flatness layer, be formed on described TFT and described data line and cover TFT and data line; It is characterized in that: described flatness layer has a plurality of grooves.
2. display panels according to claim 1, other just are: the thickness of described flatness layer is between 2.4um to 3um.
3. display panels according to claim 1, other just are: the width of described groove is less than 5um.
4. display panels according to claim 1, other just are: the degree of depth of described groove is less than 2.4um.
5. display panels according to claim 1, other just are: described pixel electrode is positioned on described flatness layer and extends to described recess region.
6. display panels according to claim 1, other just are: described groove type is formed in the edge of described flatness layer at the pixel electrode of corresponding liquid crystal toppling direction side.
7. the manufacture method of a tft array substrate, is characterized in that: comprise the steps;
Step 1: form multi-strip scanning line, many data lines, a plurality of TFT on the glass substrate of tft array; Sweep trace and data line intersection limit a plurality of pixel regions, and TFT is electrically connected to corresponding sweep trace and data line;
Step 2: form the flatness layer with a plurality of grooves on the array base palte that forms above-mentioned pattern;
Step 3: to the array base palte that the forms above-mentioned pattern rear baking journey of being exposed to the sun, make the face curved surface of groove;
Step 4: form a plurality of pixel electrodes on the array base palte that forms above-mentioned pattern, and make the edge of pixel electrode extend into recess region; And pixel electrode and described TFT are electrically connected;
Step 5: on the array base palte that forms above-mentioned pattern, form alignment film.
8. the manufacture method of tft array substrate according to claim 7, it is characterized in that: in described step 2, the width of described groove is less than 5um.
9. the manufacture method of tft array substrate according to claim 7, it is characterized in that: in described step 2, the degree of depth of described groove is less than 2.4um.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103680325A (en) * | 2013-12-17 | 2014-03-26 | 京东方科技集团股份有限公司 | Display substrate, display panel and stereoscopic display device |
| CN103809329A (en) * | 2013-12-20 | 2014-05-21 | 南京中电熊猫液晶显示科技有限公司 | Vertically aligned liquid crystal display panel and TFT array substrate thereof |
| CN103901663A (en) * | 2014-03-28 | 2014-07-02 | 南京中电熊猫液晶显示科技有限公司 | Color film substrate for liquid crystal displays |
| CN109581753A (en) * | 2018-12-28 | 2019-04-05 | 成都中电熊猫显示科技有限公司 | Liquid crystal display panel |
| CN114217481A (en) * | 2021-12-30 | 2022-03-22 | 绵阳惠科光电科技有限公司 | Display panel and display device |
| CN114815402A (en) * | 2022-05-24 | 2022-07-29 | 深圳市华星光电半导体显示技术有限公司 | Display panel and array substrate thereof |
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| CN1928669A (en) * | 2005-09-08 | 2007-03-14 | 中华映管股份有限公司 | Liquid crystal display panel and method for producing colorful filtering substrate |
| CN102162960A (en) * | 2010-12-10 | 2011-08-24 | 友达光电股份有限公司 | Liquid crystal display panel |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1928669A (en) * | 2005-09-08 | 2007-03-14 | 中华映管股份有限公司 | Liquid crystal display panel and method for producing colorful filtering substrate |
| CN102162960A (en) * | 2010-12-10 | 2011-08-24 | 友达光电股份有限公司 | Liquid crystal display panel |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103680325A (en) * | 2013-12-17 | 2014-03-26 | 京东方科技集团股份有限公司 | Display substrate, display panel and stereoscopic display device |
| CN103809329A (en) * | 2013-12-20 | 2014-05-21 | 南京中电熊猫液晶显示科技有限公司 | Vertically aligned liquid crystal display panel and TFT array substrate thereof |
| CN103901663A (en) * | 2014-03-28 | 2014-07-02 | 南京中电熊猫液晶显示科技有限公司 | Color film substrate for liquid crystal displays |
| CN109581753A (en) * | 2018-12-28 | 2019-04-05 | 成都中电熊猫显示科技有限公司 | Liquid crystal display panel |
| CN114217481A (en) * | 2021-12-30 | 2022-03-22 | 绵阳惠科光电科技有限公司 | Display panel and display device |
| CN114217481B (en) * | 2021-12-30 | 2022-12-23 | 绵阳惠科光电科技有限公司 | Display panel and display device |
| CN114815402A (en) * | 2022-05-24 | 2022-07-29 | 深圳市华星光电半导体显示技术有限公司 | Display panel and array substrate thereof |
| CN114815402B (en) * | 2022-05-24 | 2023-07-04 | 深圳市华星光电半导体显示技术有限公司 | Display panel and array substrate thereof |
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Application publication date: 20131204 |