Refer now to all accompanying drawings, same numeral is represented identical or corresponding component in wherein several views, all embodiment of various details.
Fig. 1 is the calcspar of expression according to the controller for transducer of first embodiment of the invention.Present embodiment relates to the control device of eliminating the single-phase invertor of third harmonic voltage in the output voltage.
It is by third harmonic generator 12 that higher harmonics are eliminated circuit 101, and a computing unit 12A and an adder 16 constitute for the third time.These three computing unit 12A are by multiplier 13a and 13b, controller 14a and 14b, and multiplier 15a and 15b constitute.
It is the cosine signal and the sinusoidal signal of three times triple-frequency harmonics of converter 2 fundamental voltage output of voltage frequencies that triple-frequency harmonics generator 12 produces its frequency.Multiplier 13a and 13b multiply by cosine signal and sinusoidal signal respectively with the output difference d1 of comparator 7. Controller 14a and 14b are made of integral controller respectively.The circuit structure example of controller 14a and 14b is shown in Fig. 2, and wherein OP2 is an operational amplifier, and C2 is that capacitor and R3 are resistance.In the case, the gain KI (KI=1/C2.Ri) of controller 14a and 14b is set at 2.
Multiplier 15a and 15b are with the output of controller 14a and 14b, and the amplitude of cosine component and sinusoidal component multiply by cosine signal and sinusoidal signal again and produces cosine and the instantaneous value of sinusoidal component.Adder is with the output addition of multiplier 15a and 15b.
Adder 17 is the output addition of controller 8 and adder 16, and consequent and value are added to adder 9.
Next step describes the operation of control device shown in Figure 1.Multiplier 13a and 13b multiply by the difference d1 of comparator 7 outputs respectively the cosine signal and the sinusoidal signal of the triple-frequency harmonics that is produced by triple-frequency harmonics generator 12.Consequent amassing in controller 14a and 14b is converted, and consequently produces the cosine component amplitude and the sinusoidal component amplitude of only third harmonic voltage of the output voltage of converter 2 respectively.Multiplier 15a and 15b multiply by cosine and sinusoidal signal once more with the cosine and the sinusoidal component amplitude of only third harmonic voltage, consequently obtain the only cosine of third harmonic voltage and the instantaneous value of sinusoidal component respectively.
In adder 16, only the cosine of third harmonic voltage and sinusoidal component instantaneous value are added, the composite value of adder 16 in adder 17 with the output addition of controller 8.Further, the output voltage benchmark Vref addition of the output of adder 17 and voltage reference generator 6, the result produces modulation factor.
The output of modulation factor and carrier generator 10 compares in strobe generator 11, is used for the PWM gating signal of converter 2 with generation.Converter 2 is driven by the PWM gating signal, and the result is eliminated the third harmonic voltage from the output voltage of converter 2.That is to say, only the instantaneous value of the cosine of third harmonic voltage and sinusoidal component is to take out from the output voltage of converter 2, and converter 2 is driven by the PWM gating signal that is compensated by instantaneous value, has consequently eliminated the third harmonic voltage of the output voltage of converter 2.
In the embodiment in figure 1, available (for example) constitutes voltage reference generator 6 by the TMS320C26 type digital signal processor (DSP) that Texas instrument company makes, comparator 7, controller 8, adder 9 and 17 and triple-frequency harmonics eliminate the combining structure of circuit 101.
Fig. 3 is the calcspar of expression according to the controller for transducer of second embodiment of the invention.Present embodiment also relates to the control device of the single-phase invertor that is used for eliminating the output voltage third harmonic voltage.
Higher harmonic cancellation circuit 102 is by triple-frequency harmonics generator 12, comprises the computing unit 12B of multiplier 13a and 13b, correcting circuit 43A and 43B, and controller 14a and 14b, multiplier 15a and 15b and adder 16 constitute.
The all circuit elements that are different from element shown in Figure 1 below are described in detail in detail.
Multiplier 13a and 13b directly receive the output voltage of the converter 2 that is detected by voltage detector 40A, rather than the output of comparator 7.Multiplier 13a and 13b multiply by cosine signal and sinusoidal signal respectively with the output voltage of converter 2.Correcting circuit 43A and 43B are made of comparator 38a and 38b and reference generator 39a and 39b respectively.The product of multiplier 13a and 13b is compared with the benchmark of reference generator 39a and 39b respectively in comparator 38a and 38b, and the result has finished correction, and the output that makes correcting circuit 43A and 43B is identical with the output of multiplier 13a and 13b among Fig. 1 respectively.The details back of relevant correction will be described.The output of correcting circuit 43A and 43B is added to controller 14a and 14b respectively.
Below, the operation of control device shown in Figure 3 is described.Multiplier 13a and 13b multiply by cosine and the sinusoidal signal that is produced by triple-frequency harmonics generator 12 respectively with the output voltage of converter 2.Consequent product is compared with the output of reference generator 39a and 39b respectively in comparator 38a and 38b.
The comparative result of comparator 38a and 38b is transformed in controller 14a and 14b, and the result is the cosine and the sinusoidal component amplitude of only third harmonic voltage that produces the output voltage of converter 2 respectively.Multiplier 15a and 15b with this only the cosine and the sinusoidal component amplitude of third harmonic voltage multiply by cosine and sinusoidal signal again, thereby obtain the only cosine of third harmonic voltage and the instantaneous value of sinusoidal component respectively.
The identical event with operation shown in Figure 1 of the following operation of present embodiment can be omitted the explanation to it.As a result, as Fig. 1 embodiment, from the output voltage of converter 2, eliminated third harmonic voltage.
After this details of reference generator 39a and 39b will be described.When the output voltage V (t) of converter 2 was explained as equation (2), reference generator 39a and 39b usually produced respectively (1/2) * A3 and (the 1/2) * B3 as its fiducial value.The value of deducting (1/2) * A3 and (1/2) * B3 from the output of multiplier 13a and 13b respectively in comparator 38a and 38b.This comparative result is added to controller 14a and 14b respectively, thereby has finished correction.
When converter 2 being used for the uninterrupted power supply of the constant voltage output control of needs, then reference generator 39a and 39b produce zero volt voltage as its fiducial value respectively.Reason is the high order harmonic component that the desirable output voltage of converter 2 has no-voltage.
Be used at converter 2 under the situation of active filter, be meant to produce higher harmonics from converter 2, this moment reference generator 39a and 39b to produce respectively be that the voltage of 1/2 double amplitude value of required high order harmonic component amplitude is as its fiducial value.
Fig. 4 is that expression is used for the control device calcspar according to the converter of third embodiment of the invention.Present embodiment relates to not only to be eliminated third-harmonic component and also eliminates five times, the control device of the single-phase invertor of seven times, nine times and ten first harmonic components.
Among Fig. 4, higher harmonic cancellation circuit 103 comprises triple-frequency harmonics generator 12 and has three computing unit 12A of multiplier 13a and 13b, controller 14a and 14b and with similar multiplier 15a of Fig. 1 and 15b.Higher harmonic cancellation circuit 103 also comprises five times, seven times, and nine times and ten first harmonic generators 18,19,20 and 21, five times, seven times, nine times and ten computing unit 18A, 19A, 20A and 21A and adder 16A.
Five times, seven times, nine times and ten computing unit 18A, 19A, 20A and 21A comprise multiplier 13C and 13d respectively, 13e and 13f, 13g and 13h, 13i and 13j, controller 14C and 14d, 14e and 14f, 14g and 14h, 14i and 14j and multiplier 15c and 15d, 15e and 15f, 15g and 15h, 15i and 15j.Five times, seven times, nine times and ten first harmonic generators 18,19,20 and 21 produce respectively five times, and seven times, the cosine signal and the sinusoidal signal of nine times and ten first harmonics.Five times, seven times, the cosine signal of nine times and ten first harmonic generators 18,19,20 and 21 is added to multiplier 13C respectively, 13e, the first input end of 13g and 13i and multiplier 15C, 15e, the first input end of 15g and 15i.Five times, seven times, nine times and ten first harmonic generators 18,19,20 and 21 sinusoidal signal is added to multiplier 13d, 13f respectively, the first input end of 13h and 13j and multiplier 15d, 15f, the first input end of 15h and 15j, the output difference d1 of comparator 7 is added to multiplier 13c, 13d, 13e, 13f, 13g, 13h, second input of 13i and 13j.Multiplier 13c, 13d, 13e, 13f, 13g, 13h, the output of 13i and 13j is added to controller 14c respectively, 14d, 14e, 14f, 14g, 14h, the input of 14i and 14j.Controller 14C, 14d, 14e, 14f, 14g, 14h, the output of 14i and 14j is added to multiplier 15c respectively, 15d, 15e, 15f, 15g, 15h, second input of 15i and 15j.Multiplier 15c, 15d, 15e, 15f, 15g, 15h, the output of 15i and 15j is added to the input of adder 16A.The output of adder 16A is added to an input of adder 17.
Five times, seven times, nine times and ten computing unit 18A, 19A, the structure of 20A and 21A is identical with the structure of three computing unit 12A.Multiplier 13C, 13d, 13e, 13f, 13g, 13h, the structure of 13i and 13j is identical with the structure of multiplier 13a.Controller 14c, 14d, 14e, 14f, 14g, 14h, the structure of 14i and the 14j all structure with controller 14a is identical.Multiplier 15c, 15d, 15e, 15f, 15g, 15h, each is identical with the structure of multiplier 15a for the structure of 15i and 15j.
The operation of control device shown in Figure 4 is described below.Produce the cosine of third harmonic voltage and the instantaneous value of sinusoidal component respectively with the same multiplier 15a embodiment illustrated in fig. 1 and 15b.Since five times, seven times, nine times and ten computing unit 18A, 19A, the circuit structure of 20A and 21A is identical with the circuit structure of three computing unit 12A, multiplier 15C, 15d, 15e, 15f, 15g, 15h15i and 15j produce respectively five times, seven times, nine times and the cosine of ten first harmonic voltages and the instantaneous value of sinusoidal component.All these three times, five times, seven times, instantaneous value addition in adder 16A of nine times and ten first harmonic voltage cosine and sinusoidal component, its addition result value is added to the output of controller 8 in adder 17.Then, the output of adder 17 is added to the output voltage benchmark Vref of voltage reference generator 6, thereby produces three times of output voltage that modulation factor is used for compensating converter 2, five times, seven times, nine times and ten first harmonics.
The modulation factor that is used for output voltage compares at strobe generator 11 with the output of carrier generator 10, to produce the PWM gating signal for converter 2.Converter 2 is by the PWM strobe enable signal, thereby eliminates in the output voltage of converter 2 three times, and five times, seven times, nine times and ten first harmonic voltages.
With regard to present embodiment, not only eliminated a kind of specific subharmonic voltage in converter 2 output voltages, and can eliminate its multiple higher harmonic voltage.
Refer now to the example that Fig. 5 and 6 describes the measurement result of present embodiment.Fig. 5 represents not use the output voltage of traditional type single-phase invertor of the present invention, converter current and high order harmonic component, and Fig. 6 represents to have compensated three times according to the present invention, output voltage, converter current and the high order harmonic component of the single-phase invertor when five times and the seventh harmonic voltage.
In this two width of cloth figure, each harmonic voltage is represented by the percentage of the fundamental voltage amplitude of converter 2.Three times as can be seen, five times and the seventh harmonic voltage have greatly been reduced, and have almost reduced to zero.
Just as described above, three times of converter 2, five times and the seventh harmonic voltage almost are eliminated from its output voltage.
Fig. 7 is the calcspar of expression according to the controller for transducer of fourth embodiment of the invention.Present embodiment relates to the control device of the single-phase invertor of eliminating the triple harmonic current in converter 2 output currents.
In Fig. 7,40B detects the current detector that flows into the output current of loads 5 from converter 2, and 41 are current reference generators, is used to produce the output current benchmark Iref that is used for converter 2.Comparator 7 is compared output current benchmark Iref together from converter 2 detected output currents, and produces difference d2 according to comparative result.The 42nd, controller, this controller are to combine by proportional controller or by ratio and integral controller thereof, and as shown in Figure 9, and formation and generation are used for the signal of the converter current of control change device 2.Then this signal is added to an input of adder 9, as with the result of the output addition of adder 17 and produce modulation factor.
The 104th, the higher harmonic cancellation circuit, its internal structure is identical with higher harmonic cancellation circuit 101 shown in Figure 1 just, so can omit detailed description thereof.Unique different be difference d2, rather than difference d1 is added to multiplier 13a and 13b.
The operation of control device shown in Figure 7 is described below, and multiplier 13a and 13b multiply by the difference d2 of comparator 7 respectively the cosine and the sinusoidal signal of the triple-frequency harmonics that is produced by triple-frequency harmonics generator 12.Because the result of calculation of higher harmonic cancellation circuit 104 is the same with the result of higher harmonic cancellation circuit 101,, in adder 16, obtain the cosine and the sinusoidal component instantaneous value sum value of triple harmonic current so do not describe in detail at this.
Subsequently carry out operation much at one with Fig. 1 embodiment.As a result, from the output current of converter 2, eliminated triple harmonic current.
In the present embodiment, what be fed is output current, rather than output voltage, thereby can eliminate a kind of high order harmonic component of specific times from the output current of converter 2.
In above-mentioned all embodiment, in the control device of converter 2, be provided with three adders 16 or 16A, 17 and 9, but the present invention is not limited to these embodiment.Can be with substituting adder 16 or 16A and adder 17 by an adder finishing two adder addition function.In addition, these three adders can be combined into an adder.
In above-mentioned all embodiment, not account for voltage or current reference generator 6 or 41 and any relation between the phase place of subharmonic generator 12,18 to 21.The result clearlys show according to accurate Calculation: the phase place of latter's generator needn't be with the former generator phase place unanimity.
In above-mentioned all embodiment, the present invention is applied to single-phase invertor.But the present invention also can be conveniently used in common three-phase inverter.
In above-mentioned all embodiment, the present invention is used to the converter with the IGBT formation.But the present invention is not limited to these embodiment.The present invention also can be applicable to the converter that constitutes as semiconductor switch device with transistor or GTO.
Illustrated in these embodiments: the high order harmonic component of eliminating characteristic frequency from converter output.But, a kind of high order harmonic component of characteristic frequency and first-harmonic are only arranged in converter output and the situation of depositing also is possible according to the present invention.Also may be: any high order harmonic component of some characteristic frequency be through weighting and with first-harmonic and deposit in converter output.
Just as described above, the present invention can provide a kind of controller for transducer that can be provided with little voltage of harmonic component or electric current to load.
Obviously, according to above instruction the present invention is made a large amount of variations and change is possible.Therefore, self-evident: the present invention can implement in the appended claims scope the specific description except that this paper.