CN103414661A - FC network port simulation terminal capable of achieving clock synchronization function - Google Patents
FC network port simulation terminal capable of achieving clock synchronization function Download PDFInfo
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- CN103414661A CN103414661A CN2013103655852A CN201310365585A CN103414661A CN 103414661 A CN103414661 A CN 103414661A CN 2013103655852 A CN2013103655852 A CN 2013103655852A CN 201310365585 A CN201310365585 A CN 201310365585A CN 103414661 A CN103414661 A CN 103414661A
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Abstract
The invention discloses an FC network port simulation terminal capable of achieving the clock synchronization function. The FC network port simulation terminal comprises a register F1, a register F2, a register F3, a register F4, a register F5, an AND gate A1 and an AND gate A2. The positive output end Q1 of the register F1 is connected with the trigger end D2 of the register F2, the positive output end Q2 of the register F2 is connected with the trigger end D3 of the register F3, the trigger end D3 and the positive output end Q3 of the register F3 are both connected to the input end of the AND gate A1, the positive output end Q4 of the register F4 is connected with the trigger end D5 of the register F5, and the output end of the AND gate A1 and the input end of the AND gate A2 are both connected to the enabled end CE of the register F5. According to the principle, the FC network port simulation terminal supports clock synchronization of a plurality of monitoring cards, and provides the reliable basis and important data available for reference for onboard network integrated communication.
Description
Technical field
The present invention relates to network port field, be specifically related to realize the FC network port emulation terminal of clock synchronous function.
Background technology
FC network dual-port artificial card, for the definition according to the FC agreement, is realized data communication.Specifically comprise the data encapsulation from user's software is become to the FC frame, according to sending protocol requirement, send in the FC network; From the FC network, receive the FC frame of the port, parse user data, be submitted to user software.In dual-port communication, two of system requirements are dual-port independently, can independently carry out data communication, can distinguish a network equipment.Due to the FC artificial card, adopt the data of two ports of a PCIE interface transmission, need to carry out the data separation of two ports.During single port communication, bi-directional data bandwidth transmission rate 160MB/s, receive 180M/s; Each port bi-directional data bandwidth transmission rate 120MB/s during dual-port communication, receiving velocity 160MB/s.In addition, present FC network dual-port artificial card the whole network clock is asynchronous, can cause some special faults, and as data and information dropout, the infologic confusion, can not provide reliable foundation and significant data that can be for reference for the onboard networks integrated communication.
Summary of the invention
The present invention has overcome the deficiencies in the prior art, and the FC network port that can realize clock synchronous function emulation terminal is provided, and supports the clock synchronous of a plurality of monitor cards, for the onboard networks integrated communication provides reliable foundation and significant data that can be for reference.
For solving above-mentioned technical problem, the present invention is by the following technical solutions: the FC network port emulation terminal that can realize the clock synchronous function, comprise register F1, register F2, register F3, register F4, register F5, with door A1 and with door A2, the positive output end Q1 of described register F1 is connected with the trigger end D2 of register F2; The positive output end Q2 of described register F2 is connected with the trigger end D3 of register F3; The trigger end D3 of described register F3 and positive output end Q3 all are connected to the input with door A1; The positive output end Q4 of described register F4 is connected with the trigger end D5 of register F5; Described with the door A1 output and with the input of door A2, all be connected on the Enable Pin CE of register F5; The clock signal terminal of described register F2, register F3 and register F5 links together, and register F1, links together with the door input of A2 and the clock signal terminal of register F4; Described output with door A2 is connected the reset terminal CLK of register F1.
The clock signal terminal of described register F2, register F3 and register F5 all is connected local clock.
Described register F1, all be connected asynchronous clock with the door input of A2 and the clock signal terminal of register F4.
The trigger end of described register F4 connects the input signal terminal.
The trigger end D1 of described register F1 is connected with power supply.
Compared with prior art, the invention has the beneficial effects as follows:
1, FC network dual-port artificial card of the present invention has the synchronised clock function, realization is retrieved, processes and show in real time being stored in FC Frame on disk array, can be onboard networks integrated communication design reliable foundation and significant data that can be for reference are provided.
2, the present invention supports the clock synchronous of a plurality of monitor cards, the maximum co-operation of supporting four monitor cards.
The accompanying drawing explanation
Fig. 1 is schematic diagram of the present invention.
Embodiment
The present invention is further elaborated below in conjunction with accompanying drawing, and embodiments of the invention are not limited to this.
Embodiment:
As shown in Figure 1, the present invention includes register F1, register F2, register F3, register F4, register F5, with door A1 and with door A2, the reset terminal CLK that is connected register F1 with the output of door A2, the trigger end of register F4 connects the input signal terminal, and the trigger end D1 of register F1 is connected with power supply.The positive output end Q1 of the register F1 of the present embodiment is connected with the trigger end D2 of register F2; The positive output end Q2 of register F2 is connected with the trigger end D3 of register F3; The trigger end D3 of register F3 and positive output end Q3 all are connected to the input with door A1; The positive output end Q4 of register F4 is connected with the trigger end D5 of register F5.The present embodiment with output door A1 with the input of door A2, all be connected on the Enable Pin CE of register F5.The clock signal terminal of the register F2 of the present embodiment, register F3 and register F5 links together, and the clock signal terminal of storage F2, register F3 and register F5 all is connected local clock.Register F1, link together with the door input of A2 and the clock signal terminal of register F4, post register F1, all be connected asynchronous clock with the input of an A2 and the clock signal terminal of register F4.
This FC network dual-port artificial card has the synchronised clock function, realizes the FC Frame be stored on disk array is retrieved, processed and shows in real time, can be onboard networks integrated communication design reliable foundation and significant data that can be for reference are provided.What input signal terminal wherein received is the data of central processing unit output.
Just can realize this invention as mentioned above.
Claims (5)
1. can realize the FC network port emulation terminal of clock synchronous function, it is characterized in that: comprise register F1, register F2, register F3, register F4, register F5, with door A1 and with door A2, the positive output end Q1 of described register F1 is connected with the trigger end D2 of register F2; The positive output end Q2 of described register F2 is connected with the trigger end D3 of register F3; The trigger end D3 of described register F3 and positive output end Q3 all are connected to the input with door A1; The positive output end Q4 of described register F4 is connected with the trigger end D5 of register F5; Described with the door A1 output and with the input of door A2, all be connected on the Enable Pin CE of register F5; The clock signal terminal of described register F2, register F3 and register F5 links together, and register F1, links together with the door input of A2 and the clock signal terminal of register F4; Described output with door A2 is connected the reset terminal CLK of register F1.
2. the FC network port emulation terminal that can realize the clock synchronous function according to claim 1, it is characterized in that: the clock signal terminal of described register F2, register F3 and register F5 all is connected local clock.
3. the FC network port emulation terminal that can realize the clock synchronous function according to claim 1 is characterized in that: described register F1, all be connected asynchronous clock with the input of door A2 and the clock signal terminal of register F4.
4. the FC network port emulation terminal that can realize the clock synchronous function according to claim 1, is characterized in that: the trigger end connection input signal terminal of described register F4.
5. according to the described FC network port emulation terminal that can realize the clock synchronous function of claim 1-4 any one, it is characterized in that: the trigger end D1 of described register F1 is connected with power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013103655852A CN103414661A (en) | 2013-08-21 | 2013-08-21 | FC network port simulation terminal capable of achieving clock synchronization function |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013103655852A CN103414661A (en) | 2013-08-21 | 2013-08-21 | FC network port simulation terminal capable of achieving clock synchronization function |
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| CN103414661A true CN103414661A (en) | 2013-11-27 |
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| CN2013103655852A Pending CN103414661A (en) | 2013-08-21 | 2013-08-21 | FC network port simulation terminal capable of achieving clock synchronization function |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109842534A (en) * | 2019-02-20 | 2019-06-04 | 成都成电光信科技股份有限公司 | A kind of equipment test verification method based on switch type FC artificial card |
-
2013
- 2013-08-21 CN CN2013103655852A patent/CN103414661A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109842534A (en) * | 2019-02-20 | 2019-06-04 | 成都成电光信科技股份有限公司 | A kind of equipment test verification method based on switch type FC artificial card |
| CN109842534B (en) * | 2019-02-20 | 2022-10-04 | 成都成电光信科技股份有限公司 | Equipment test verification method based on switched FC simulation card |
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Application publication date: 20131127 |
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