CN103400898A - Manufacturing method for photoelectromotive force device - Google Patents
Manufacturing method for photoelectromotive force device Download PDFInfo
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- CN103400898A CN103400898A CN2013103326501A CN201310332650A CN103400898A CN 103400898 A CN103400898 A CN 103400898A CN 2013103326501 A CN2013103326501 A CN 2013103326501A CN 201310332650 A CN201310332650 A CN 201310332650A CN 103400898 A CN103400898 A CN 103400898A
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Abstract
The invention provides a manufacturing method for a photoelectromotive force device. Compared with the prior art, the photoelectromotive force device has the advantages that the efficiency of taking of photoelectric current for an external circuit is not lowered, and the photoelectric conversion efficiency is improved. The photoelectromotive force device comprises a P-type silicon substrate (101), a low-resistance N-type diffusion layer (102L) on which N-type impurities are diffused according to a first concentration on the incident surface side of light, a gate electrode (111) formed on the low-resistance N-type diffusion layer (102L), a P+ layer (110) formed on a back surface, and a back surface electrode formed on the P+ layer (110), wherein the back surface electrode is provided with recesses (106) at specified intervals from the upper surface of the low-resistance N-type diffusion layer (102L) to the silicon substrate (101); the upper surface of a region between two adjacent recesses (106) comprises the low-resistance N-type diffusion layer (102L); a high-resistance N-type diffusion layer (102H) on which N-type impurities are diffused according to a second concentration lower than the first concentration is formed in a range of specified depth from the forming surface of the recesses (106).
Description
The application is that application number is 200880127894.3, the applying date is on September 7th, 2010, denomination of invention is divided an application for the application for a patent for invention of " Photvoltaic device and manufacture method thereof ".
Technical field
The present invention relates to Photvoltaic device and manufacture method thereof.
Background technology
In order to improve the performance of the Photvoltaic devices such as solar cell, how can efficiently sunlight be taken into Photvoltaic device inside becomes important key element.Therefore, in the past, made surperficial fine concavo-convex texture (texture) structure that has formed the size of tens nm～tens μ m at light incident side intentionally.In this texture structure, made at surface reflection light once again incide surface, and more sunlight has been taken in Photvoltaic device inside, thereby generation current is increased, and improved light-to-current inversion efficiency.
As form the method for texture structure on the used for solar batteries substrate, in the situation that substrate is monocrystalline silicon (Si) substrate, be widely used the utilization that realizes by the alkaline aqueous solution that etching speed is had the dependent NaOH in grain arrangement, potassium hydroxide etc. the anisotropic etching of grain arrangement process (for example, with reference to patent documentation 1).Process if the substrate surface in face orientation that for example effects on surface has (100) carries out this anisotropic etching, form the texture of the pyramid shape that exposes (111) face.
But, in the situation that polycrystalline silicon substrate, in the method for carrying out the anisotropic etching processing with alkaline aqueous solution, form the not alignment of crystal face orientation of each crystal particles of substrate surface, and the anisotropic etching processing itself of using alkaline aqueous solution is according to crystal face and its rate of etch has a great difference, so can only be partially to make texture structure.Due to such situation, in the situation that there is the such problem of boundary that exists in the reduction of reflectivity in polycrystalline silicon substrate.For example, if observe the reflectivity under wavelength 628nm, on surface, be approximately 36% in by the silicon of mirror ultrafinish, be approximately 15% in the situation that the monocrystalline silicon substrate of (100) face has been carried out wet etching,, with respect to this, in the situation that polycrystalline silicon substrate has been carried out wet etching, be 27～30% left and right.
Therefore,, whole method that forms texture structure, do not proposed to have used the mixed acid etching (for example, with reference to patent documentation 2) of etching mask as relying on the crystal face orientation.In the manufacture method of etching mask, can use method based on the imprint lithography that uses in semiconductor technology, mix the lower particulate of etching patience and be coated to method on real estate etc. in the solution of elching resistant material.
then, the dopant liquid that comprises the diffuse source of N-type in the coating of the surface of the silicon substrate of the P type that has formed like this texture structure, and heat-treat and make its diffusion, thereby the surface at texture structure forms the higher high concentration n type diffused layer of phosphorus concentration, the position of the regulation on the texture structure of silicon substrate, form the gate electrode (grid electrode) that is formed by metals such as silver of pectination ground configuration, with the bus electrode (bus electrode) that is formed by metals such as silver of be used for concentrating from the electric current of gate electrode, and form overleaf by aluminium, the backplate that the metals such as silver form, and (for example formed solar cell, with reference to patent documentation 3).
Patent documentation 1: Japanese kokai publication hei 10-70296 communique
Patent documentation 2: TOHKEMY 2003-309276 communique
Patent documentation 3: TOHKEMY 2005-116559 communique
Summary of the invention
But,, in the texture structure side of silicon substrate, in order to make with electrically contacting of the gate electrode that is formed by metal, become well, and the photoelectric current that will produce in Photvoltaic device is fetched into external circuit, diffusion efficiently with need to making the impurity high concentration.But in order to obtain good photoelectromotive force, the impurity concentration that preferably will spread in the silicon substrate of texture structure side is controlled lowly below the grade of regulation.Therefore, in the Photvoltaic device of the structure of having used described technology in the past, the photoelectric current of sacrificing light-to-current inversion efficiency and will produce in Photvoltaic device is fetched into external circuit efficiently, expectation can not reduce the efficiency of taking out photoelectric current to external circuit, and compares the further technology of improving light-to-current inversion efficiency with technology in the past.
The present invention completes in view of described problem, and its purpose is to obtain a kind of Photvoltaic device and manufacture method thereof, can reduction compared with the past not take out the efficiency of photoelectric current to external circuit, and can compared with the pastly improve light-to-current inversion efficiency.
In order to reach described purpose, Photvoltaic device of the present invention possesses: the semiconductor substrate of the 1st conduction type; The 1st diffusion layer, form in the plane of incidence side of the light of described semiconductor substrate, spread the impurity of the 2nd conduction type according to the 1st concentration; Be formed on gate electrode and the bus electrode of the pectination on described the 1st diffusion layer, this bus electrode connects between described gate electrode; The 2nd diffusion layer, form with the opposed back side of plane of incidence light described semiconductor substrate, the 1st conduction type, consists of; And backplate, form on described the 2nd diffusion layer, this Photvoltaic device is characterised in that, has the mode recess that arranges of interval according to the rules that arrives described semiconductor substrate with the upper surface from described the 1st diffusion layer, the upper surface in the zone between adjacent described recess comprises described the 1st diffusion layer, in the scope of the degree of depth of regulation, be formed with the 3rd diffusion layer that has spread the impurity of the 2nd conduction type according to the 2nd concentration lower than described the 1st concentration the formation face from described recess.
According to the present invention, sensitive surface side at silicon substrate forms low-resistance the 1st diffusion layer, not remove the mode of all the 1st diffusion layers, the recess of predetermined distance is set, and then the surface from recess the scope of the degree of depth of regulation, 3rd diffusion layer lower than the impurity concentration of the 1st diffusion layer is set, so the reflectivity of the sunlight of institute's incident is reduced, and carry out efficiently light-to-current inversion in the 3rd diffusion layer in recess, and make the photoelectric current that produces by light-to-current inversion arrive surface electrode via the 1st diffusion layer on the lower silicon substrate surface of resistance.Photoelectric current by low-resistance the 1st diffusion layer and current collection to surface electrode, thereby can suppress resistance loss, and the interval of enlarged surface electrode, and the formation area of minimizing surface electrode, can be to the more sunlight of incident in silicon substrate.Its result has following effect: can reduction compared with the past not take out the efficiency of photoelectric current to external circuit, and can compared with the pastly improve light-to-current inversion efficiency.
Description of drawings
Fig. 1-1st, the vertical view of Photvoltaic device.
Fig. 1-2 is the back view of Photvoltaic device.
Fig. 1-3rd, the A-A profile of Fig. 1-2.
Fig. 2 is the stereogram that amplifies the part of the gate electrode periphery that the Photvoltaic device shown in Fig. 1-1～Fig. 1-3 is shown.
Fig. 3 is the B-B profile of Fig. 2.
Fig. 4-1st, illustrate the profile of an example of structure of gate electrode periphery of the Photvoltaic device of this execution mode 1.
Fig. 4-2nd, illustrate the figure of an example of structure of the gate electrode periphery of Photvoltaic device in the past.
Fig. 5-1st, schematically illustrate the stereogram (its 1) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-2nd, schematically illustrate the stereogram (its 2) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-3rd, schematically illustrate the stereogram (its 3) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-4th, schematically illustrate the stereogram (its 4) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-5th, schematically illustrate the stereogram (its 5) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-6th, schematically illustrate the stereogram (its 6) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-7th, schematically illustrate the stereogram (its 7) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-8th, schematically illustrate the stereogram (its 8) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 5-9th, schematically illustrate the stereogram (its 9) of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1.
Fig. 6-1st, the B-B profile of Fig. 5-1.
Fig. 6-2nd, the B-B profile of Fig. 5-2.
Fig. 6-3rd, the B-B profile of Fig. 5-3.
Fig. 6-4th, the B-B profile of Fig. 5-4.
Fig. 6-5th, the B-B profile of Fig. 5-5.
Fig. 6-6th, the B-B profile of Fig. 5-6.
Fig. 6-7th, the B-B profile of Fig. 5-7.
Fig. 6-8th, the B-B profile of Fig. 5-8.
Fig. 6-9th, the B-B profile of Fig. 5-9.
Fig. 7 is the figure of an example that the structure of the laser processing device that forms opening schematically is shown.
Fig. 8-1st, be schematically illustrated in the figure of the surface configuration after the texture etching in the situation that is provided with opening on the triangle lattice point.
Fig. 8-2nd, be schematically illustrated in the figure of the surface configuration after the texture etching in the situation that is provided with opening on four jiaos of lattice points.
Fig. 9 is the figure of an example that is illustrated in the structure of the laser processing device that uses in execution mode 3 in the formation of opening.
Figure 10 is the figure of an example that is illustrated in the structure of the laser processing device that uses in execution mode 4 in the formation of opening.
(description of reference numerals)
100: Photvoltaic device; 101: silicon substrate; 102:N type diffusion layer; 102L: low resistance n type diffused layer; 102H: high resistance n type diffused layer; 103: the etch resistant film; 104: opening; 105a: texture structure forms zone; 105b: electrode forms zone; 106: recess; 109: antireflection film; The 110:P+ layer; 111: gate electrode; 112: bonding part; 113: bus electrode; 121: backside electrode; 122: the dorsal part collecting electrodes; 200A, 200B, 200C: laser processing device; 201: platform (stage); 203: laser oscillating part; 204: laser; 205: speculum; 206: beam splitter; 207: aperture (aperture); 208: dwindle optical system; 211,213: current mirror (galvanomirror); The 212:X direction of principal axis; The 214:Y direction of principal axis; 221: holographic (holographic) optical element; 222: collector lens.
Embodiment
Below, with reference to accompanying drawing, to preferred embodiment being elaborated of Photvoltaic device of the present invention and manufacture method thereof.In addition, the invention is not restricted to these execution modes.In addition, the profile of the photo-electric conversion device that uses in following execution mode is schematic figure, and the ratio of the relation of thickness and the width of layer, the thickness of each layer etc. are different with reality.
(execution mode 1)
At first, before the structure of Photvoltaic device of explanation embodiments of the present invention 1, the integrally-built summary of general Photvoltaic device is described.Fig. 1-1～Fig. 1-3rd, schematically illustrate the figure of an integrally-built example of general Photvoltaic device, Fig. 1-1st, and the vertical view of Photvoltaic device, Fig. 1-2 are the back views of Photvoltaic device, Fig. 1-3rd, the A-A profile of Fig. 1-2.Photvoltaic device 100 possesses the light-to-current inversion layer, and this light-to-current inversion layer comprises: as the P type silicon substrate 101 of semiconductor substrate; The diffusion that forms on the surface of an interarea (sensitive surface) side of this P type silicon substrate 101 n type diffused layer 102 of impurity of N-type; And the higher concentration ground of comparing with silicon substrate 101 that forms on the surface of another interarea (back side) side comprises the P+ layer 110 of the impurity of P type.In addition, Photvoltaic device 100 possesses: prevent to the antireflection film 109 of the incident reflection of light of the sensitive surface of light-to-current inversion layer; For the electricity that generating in the light-to-current inversion layer is produced carries out current collection locally at the gate electrode 111 that is formed by silver etc. of sensitive surface setting; The bus electrode 113 that is formed by silver etc. that roughly arranges orthogonally with gate electrode 111 in order to take out the electricity that carried out current collection in gate electrode 111; The taking-up of the electricity that produces with generating in the light-to-current inversion layer and being reflected into purpose of incident light and in the backside electrode 121 that is formed by aluminium etc. of roughly whole the setting at the back side of P type silicon substrate 101; And the dorsal part collecting electrodes 122 that is formed by silver etc. that the electricity that produces is carried out current collection in this backside electrode 121.
Next, the part of the feature as this execution mode 1 described.Fig. 2 is the stereogram that amplifies the part of the gate electrode periphery that the Photvoltaic device shown in Fig. 1-1～Fig. 1-3 is shown, and Fig. 3 is the B-B profile of Fig. 2.In addition, these Fig. 2 and Fig. 3 are the figure that the state that the gate electrode of this Fig. 1-1～Fig. 1-3 111 peripheries have been cut out is shown.
As these Fig. 2 and shown in Figure 3, the sensitive surface side of Photvoltaic device 100 has: the texture structure that has formed the texture structure of the recess 106 with predetermined distance forms regional 105a; And the electrode that has formed the light incident side electrodes such as gate electrode 111 of Photvoltaic device 100 forms regional 105b.
Texture structure forms regional 105a to have: the low resistance n type diffused layer 102L that has spread to high concentration the impurity of N-type; And so that resistance has spread the high resistance n type diffused layer 102H of the impurity of N-type higher than the mode low concentration ground of low resistance n type diffused layer 102L.More specifically, texture structure forms regional 105a and have the mode recess 106 that forms of interval according to the rules that arrives silicon substrate 101 with the upper surface from low resistance n type diffused layer 102L in low resistance n type diffused layer 102L, in the suitable part of the surface portion of the silicon substrate 101 with not forming recess 106, the residual low resistance n type diffused layer in mesh-shape ground 102L roughly, the degree of depth of regulation, formed high resistance n type diffused layer 102H the inner surface from recess 106.The diameter of this recess 106 is less than the distance between adjacent recess 106 center each other.In addition, at electrode, form in regional 105b, formed gate electrode 111 electrodes such as light incident side such as grade across bonding part 112 on low resistance n type diffused layer 102L.Thus, texture structure form roughly mesh-shape ground in regional 105a remaining the part of low resistance n type diffused layer 102L be connected regional 105b with electrode and connect continuously.In addition, for the surface resistance (film resistor (sheet resistance)) of low resistance n type diffused layer 102L and high resistance n type diffused layer 102H, narration in the back.In addition, the sensitive surface of silicon substrate 101 is identical with the part of explanation in Fig. 1-1～Fig. 1-3 with the structure at the back side, so the description thereof will be omitted.
Herein, the Photvoltaic device 100 of this execution mode 1 and the difference of Photvoltaic device are in the past described.Fig. 4-1st, illustrate the profile of an example of structure of gate electrode periphery of the Photvoltaic device of this execution mode 1, and Fig. 4-2nd illustrates the figure of an example of structure of the gate electrode periphery of Photvoltaic device in the past.In addition, in Photvoltaic device in the past,, to the inscape identical with this execution mode 1, added prosign.
As shown in Fig. 4-2, in Photvoltaic device 100A in the past, only at the electrode of sensitive surface side, form the surface of the silicon substrate 101 of regional 105b, formed low resistance n type diffused layer 102L, form the surface of regional 105a at texture structure, all formed high resistance n type diffused layer 102H.In addition, this texture structure forms the position on the surface (upper surface) of the silicon substrate 101 in regional 105a, owing to having formed recess 106, thereby with the position on surface (upper surface) that electrode forms the silicon substrate 101 of regional 105b, compares and retreats.The reason that is made as such structure is, at low resistance n type diffused layer 102L, be during high concentration ground has spread the zone of impurity, light-to-signal transfer characteristic significantly worsens, and can't effectively utilize the sunlight of incident in this part, so preferred in the zone of sunlight institute incident, form the good lower high resistance n type diffused layer 102H of impurity concentration of light-to-signal transfer characteristic.But in high resistance n type diffused layer 102H, although light-to-signal transfer characteristic is good, the resistance loss that the photoelectric current that produces by this high resistance becomes heat is larger, so the interval of adjacent gate electrode 111 is narrowed down.Be the narrow area that arranges that increases gate electrode 111 that means with the arranged spaced of this gate electrode 111, for the incident light that incides silicon substrate 101 inside, become shade, make the light-to-current inversion Efficiency Decreasing.
With respect to this, in the Photvoltaic device 100 of this execution mode 1, as shown in Fig. 2, Fig. 3 and Fig. 4-1, its structure is, in the sensitive surface side of silicon substrate 101, so that the residual mode of low resistance n type diffused layer 102L, the recess 106 of predetermined distance is set, and, the scope of the degree of depth of regulation, high resistance n type diffused layer 102H is set the surface from this recess 106.By recess 106, the reflectivity of the sunlight of institute's incident is reduced, the sunlight of incident in the high resistance n type diffused layer 102H in recess 106 is transformed into photoelectric current efficiently.And then the photoelectric current that generates due to the incident of sunlight is by the roughly cancellous low resistance n type diffused layer 102L of the remained on surface at silicon substrate 101, and flows to gate electrode 111, so can reduce the loss that causes due to resistance of photoelectric current.In addition, due to via low resistance n type diffused layer 102L with the photoelectric current conveyance to gate electrode 111, so the interval of gate electrode 111 can be obtained past case greater than Fig. 4-2.Accompany with it, can make for the Area Ratio past case of the shade of the light of silicon substrate 101 inside of inciding gate electrode 111 less, and can improve light-to-current inversion efficiency.
Next, the manufacture method of the Photvoltaic device 100 of such structure described.Fig. 5-1～Fig. 5-9th, schematically illustrate the stereogram of an example for the treatment of step of manufacture method of the Photvoltaic device of this execution mode 1, and Fig. 6-1～Fig. 6-9 are respectively the B-B profiles of Fig. 5-1～Fig. 5-9.In addition, size shown below is an example.
At first, prepared silicon substrate 101(Fig. 5-1, Fig. 6-1).Herein, be made as and use towards the most widely used P type of civilian Photvoltaic device polycrystalline silicon substrate.From the piece of polysilicon, (multiwire saw) cuts into slices by multi-line cutting machine, the breakage while by the wet etching that has used acid or alkaline solution, removing section, thus produce this silicon substrate 101.The thickness of the silicon substrate 101 after damaged the removal is 250 μ m, and size is 150mm * 150mm.
Next, silicon substrate 101 after breakage is removed is put in thermal oxidation furnace, heat under the atmosphere of the phosphorus (P) of the impurity as N-type, make phosphorus in the ground diffusion of the surperficial high concentration of silicon substrate 101, and form low resistance n type diffused layer 102L(Fig. 5-2, Fig. 6-2).Use phosphorous oxychloride (POCl herein, in the formation of phosphorus atmosphere
3), diffusion under 840 ℃.
Afterwards, on the low resistance n type diffused layer 102L that forms on an interarea, form film with elching resistant (below, be called the etch resistant film) 103(Fig. 5-3, Fig. 6-3)., as this etch resistant film 103, can use silicon nitride film (below, be called the SiN film), silica (SiO
2, SiO) film, silicon oxynitride (SiON) film, amorphous silicon (а-Si) film, diamond-like carbon film, resin molding etc., as etch resistant film 103, use the SiN film of the thickness 240nm that forms by plasma CVD (Chemical Vapor Deposition, chemical vapour deposition (CVD)) method herein.In addition, although thickness has been made as 240nm, appropriate thickness is selected in the etching condition in the time of can be according to the texture etching and the removal of the SiN film in subsequent handling.
Next, the texture structure on etch resistant film 103 forms in regional 105a, forms opening 104(Fig. 5-4, Fig. 6-4).The electrode of wanting to form the light incident side electrode of Photvoltaic device 100 not forming texture structure does not form opening 104 in forming regional 105b.In the formation of opening 104, can use method based on the photoetching of using in semiconductor technology, based on method of Ear Mucosa Treated by He Ne Laser Irradiation etc.In addition, in the method based on Ear Mucosa Treated by He Ne Laser Irradiation, need to can only by irradiating laser, not form opening 104 in the situation that form the operation of the such complexity of the removal of required resist coating, exposure imaging, etching, resist by photoetching technique, have advantages of and can simplify working process.
Fig. 7 is the figure of an example that the structure of the laser processing device that forms opening schematically is shown.This laser processing device 200A possesses: the platform 201 of mounting silicon substrate 101 processing objects such as grade; The laser oscillating part 203 of Output of laser 204; While making laser 204 reflect the speculum 205 that imports in light path; Laser 204 is separated into the beam splitter 206 of a plurality of laser; Make beam shape become the aperture 207 of the shape of regulation; And dwindle that the laser 204 that has passed through aperture 207 shines processing object dwindle optical system 208.
In such laser processing device 200A, from the laser 204 of laser oscillating part 203 output after by speculum 205, having changed light path, enlarge and incide aperture 207 by beam splitter 206,, by after aperture 207, be irradiated to the position of the regulation on etch resistant film 103 by dwindling optical system 208.Its result, forming a plurality of minute apertures in the etch resistant film 103 that forms on silicon substrate 101 is opening 104, exposes the silicon substrate 101(low resistance n type diffused layer 102L of substrate) surface.
Herein,, as laser oscillating part 203, use and to have made up Nd:YAG(Yttrium Aluminum Garnet, yttrium-aluminium-garnet) laser and 3 times of harmonic generators and the parts that obtain.Thus, the wavelength of laser becomes 355nm, becomes the wavelength that the SiN film can absorb.In addition, more than the depth of focus of optical system is configured to 10 μ m.In addition,, by being chosen on the basis of having removed the SiN film and then can forming the intensity of the laser of pit in the silicon substrate 101 of substrate, the ratio of pit depth and pit diameter can be further increased, the obturation effect of light can be increased.By experiment as can be known, at 0.4J/cm
2When above, can form opening in the SiN film, at 2J/cm
2When above, form pit in the silicon substrate 101 of substrate.Therefore,, used 3J/cm herein
2Laser intensity.In addition, as lasing light emitter, 3 times of high order harmonic components of Nd:YAG laser have been used, but become the texture etch depth with the lasing light emitter of 4 interior μ m with the laser of interior, shorter than 700nm wavelength so long as can export the breakage that silicon substrate 101 is caused by laser can be suppressed at, can also use other lasing light emitters.
In addition,, as the aperture 207 in described laser processing device 200A, the parts that metallic plate formation opening is obtained have been used.Passed through the laser 204 of aperture 207 and be irradiated to processing object after reduced, so also can make the patterns of openings of aperture 207 larger.Therefore, as aperture 207, also can be with utilizing wet etching or sandblasted to form the parts of opening in metallic plate.In addition, can also will form the glass mask of the film metal patterns such as chromium film as aperture 207 in glass plate.But, in this case, need to be careful the transmissivity of glass and the patience of metallic film.
Next,, by the opening 104 that forms in etch resistant film 103, the near surface of the silicon substrate 101 that comprises low resistance n type diffused layer 102L is carried out etching, and form recess 106(Fig. 5-5, Fig. 6-5).In this etching, carry out etching by 104 pairs of silicon substrates of fine opening 101, so, on the surface of silicon substrate 101, centered by fine opening 104,, at its concentric position place, form recess 106.If the etching solution that is by mixed acid carries out etching, can the crystal face orientation on silicon substrate 101 surfaces not impacted and form uniform texture, can make the few Photvoltaic device of surperficial reflection loss 100., as etching solution, use the mixed liquor of hydrofluoric acid and nitric acid herein.Mixing ratio is hydrofluoric acid 1: nitric acid 20: water 10.In addition, can according to etching speed, the etching shape of expectation, the mixing ratio of etching solution be altered to appropriate mixing ratio.In addition, in the surface of the recess 106 that forms by this etching,, in the substrate surface side, formed low resistance n type diffused layer 102L, but in the zone darker than it, do not imported impurity.
And then, when by this etching, forming recess 106, in the past, as shown in Fig. 4-2, the low resistance n type diffused layer 102L of light entrance face side is almost all removed, but, make the low resistance n type diffused layer 102L between adjacent recess 106 intentionally residual as shown in Fig. 5-5 and Fig. 6-5 herein, thereby make the photoelectric current that produces at light entrance face import to light incident side electrode (gate electrode 111) by the low resistance n type diffused layer 102L as low-resistance current path.
Next, use hydrofluoric acid etc. removed etch resistant film 103 after (Fig. 5-6, Fig. 6-6), silicon substrate 101 is put in thermal oxidation furnace again, at phosphorous oxychloride (POCl
3) heat under the existence of steam, and the surperficial low concentration ground that is formed on recess 106 has spread high resistance n type diffused layer 102H(Fig. 5-7, Fig. 6-7 of phosphorus).The diffusion temperature of this moment is made as 840 ℃.Herein, it is the residual part of low resistance n type diffused layer 102L when etching that electrode forms regional 105b, so even again carry out from the upper side the diffusion of low concentration, resistance is still kept lower.In addition, the inner surface that texture structure forms the recess 106 of regional 105a becomes the state of having removed low resistance n type diffused layer 102L when etching, but, by this DIFFUSION TREATMENT, forms high resistance n type diffused layer 102H.
In addition, the film resistor of low resistance n type diffused layer 102L is lower, and is better with the contact of electrode, and can get the configuration space of wide gate electrode 111, can suppress the impact of the shade on silicon substrate 101 that causes due to configuration gate electrode 111.But, in order to realize low resistance, the heating time while needing to increase diffusion or raising heating-up temperature, these are treated as the reason of the quality reduction that causes polysilicon (silicon substrate 101).Like this, the low resistance of low resistance n type diffused layer 102L and the quality of silicon substrate 101 are in compromise relation, so need to, to become the such condition of thin-film electro resistance of low resistance n type diffused layer 102L corresponding to the characteristic that requires with Photvoltaic device 100 to manufacturing, carry out the heat treated of silicon substrate 101.Generally, the surface film resistance of low resistance n type diffused layer 102L is preferably more than and equals 30 Ω/ less than 60 Ω/, but in the situation that also considered production, is preferably more than and equals 45 Ω/ less than 55 Ω/.In addition, general, the surface film resistance of high resistance n type diffused layer 102H is preferably more than and equals 60 Ω/ less than 150 Ω/, if but the stability of the characteristic while considering batch production be preferably more than and equal 70 Ω/ less than 100 Ω/.
Next, remove at phosphorous oxychloride (POCl in hydrofluoric acid solution
3) heat under the existence of steam and the phosphorus glass layer that forms.Afterwards, form antireflection film 109(Fig. 5-8, Fig. 6-8 that formed by SiN film etc. at cell surface by plasma CVD method).Set the thickness of this antireflection film 109 and refractive index for can suppress the light reflection value.In addition, also can the different film more than 2 layers of stacked refractive index.In addition, also can form by different film build methods such as sputtering methods.
Afterwards,, at surface and the back side of silicon substrate 101, form respectively surface electrode (gate electrode 111, bus electrode 113) and backplate (backside electrode 121, dorsal part collecting electrodes 122) (Fig. 5-9, Fig. 6-9).At first,, as backside electrode 121, form the slurry (paste) of having sneaked into aluminium by silk screen printing on whole herein.Next, as gate electrode 111(bus electrode 113), by silk screen printing, comb shape ground forms has sneaked into silver-colored slurry.Then, implement to bake processing.In addition, form at electrode the slurry that becomes the basis of gate electrode 111 on regional 105b.In addition, in air atmosphere, implement to bake processing under 760 ℃.At this moment, gate electrode 111 passes antireflection film 109 and with low resistance n type diffused layer 102L, contacts in bonding part 112.Thus, can obtain low resistance n type diffused layer 102L engages with the good resistive of upper electrode (gate electrode 111, bus electrode 113).In addition, by baking, the aluminium of backside electrode 121 is diffused into silicon substrate 101, forms within the limits prescribed P+ layer 110 from the back side of silicon substrate 101.As mentioned above, produce Photvoltaic device 100.
In addition, in described Fig. 5-4 and Fig. 6-4, at texture structure, form in the etch resistant film 103 of regional 105a while forming opening 104, both can be arranged on the triangle lattice point, also can be arranged on four jiaos of lattice points.Fig. 8-1st, be schematically illustrated in the figure of the surface configuration after the texture etching in the situation that is provided with opening on the triangle lattice point, and Fig. 8-2nd is schematically illustrated in the figure of the surface configuration after the texture etching in the situation that is provided with opening on four jiaos of lattice points.
As shown in Fig. 8-1, opening 104 is set on the triangle lattice point, carried out in the etched situation of texture, the ratio that does not form the part (par) 130 of the general planar of recess 106 is about 9% left and right, incide Photvoltaic device 100 light entrance face sunlight incide the pit (recess 106) that forms by etching more than 90%, so can effectively utilize light.
On the other hand,, as shown in Fig. 8-2, on four jiaos of lattice points, opening 104 is set, has carried out in the etched situation of texture, the ratio that does not form the par 130 of recess 106 surpasses 21%.Therefore, from the viewpoint of effective utilization of light, not as form the situation of recess 106 on the triangle lattice point.But, opening is counted than the situation that forms the triangle lattice point, lack, so from the viewpoint of batch productionization, be superior.In sum, the performance that requires according to the Photvoltaic device to manufacturing/cost ratio, judge and opening be set on the triangle lattice point, or on four jiaos of lattice points, opening be set.
according to this execution mode 1, the lower low resistance n type diffused layer 102L of resistance is set the scope of the degree of depth of regulation the surface of the sensitive surface side from sunlight, form regional 105a at texture structure and recess 106 is set interval according to the rules, inner surface at this recess 106 forms the higher high resistance n type diffused layer 102H of resistance, so when the sensitive surface side forms the gate electrode 111 of comb type, the light that will incide efficiently in Photvoltaic device 100 is transformed into photoelectric current, and with the photoelectric current that generates via the lower low resistance n type diffused layer 102L conveyance of resistance to gate electrode 111.That is, with the situation by high resistance n type diffused layer 102H, compare, resistance loss is suppressed, so have following effect: the interval that can make the gate electrode 111 that forms in the sensitive surface side is wider than the Photvoltaic device 100 of in the past structure.In addition, in the situation that with compare with the Photvoltaic device of same size (area) in the past, light-to-current inversion efficiency is more superior, so energy efficiency is good, and has energy-saving effect.
(execution mode 2)
In the explanation of execution mode 1, in Fig. 5-7 and Fig. 6-7 recess 106 is interior formed high resistance n type diffused layer 102H after, removed phosphorus glass layer on low resistance n type diffused layer 102L and high resistance n type diffused layer 102H with hydrofluoric acid solution, but also can, by the mixed liquor of for example hydrofluoric acid and nitric acid, to the utmost point most surface of low resistance n type diffused layer 102L and high resistance n type diffused layer 102H, carry out etching.In addition, other treatment process are identical with the operation of explanation in execution mode 1, so the description thereof will be omitted.
According to this execution mode 2, after the etching of the phosphorus glass layer on low resistance n type diffused layer 102L and high resistance n type diffused layer 102H, the mixed acid such as mixed liquor with hydrofluoric acid and nitric acid, most surface to these diffusion layers 102L, 102H is carried out etching, so have the charge carrier that can suppress in n type diffused layer again in conjunction with the such effect of speed.
(execution mode 3)
In this execution mode 3, the situation by forming opening with execution mode 1 diverse ways is described.Fig. 9 is the figure of an example that is illustrated in the structure of the laser processing device that uses in execution mode 3 in the formation of opening.This laser processing device 200B possesses: the platform 201 of mounting silicon substrate 101 processing objects such as grade; The laser oscillating part 203 of Output of laser 204; Be configured between platform 201 and laser oscillating part 203, while make laser 204 scan the 1st current mirror 211 in importing to light path on X-direction 212; And the laser 204 of reflection in the 1st current mirror 211 is scanned on Y direction 214, Yi Bian import to the 2nd current mirror 213 in light path.
In the laser processing device 200B of such structure, scan by making the 1st and the 2nd current mirror 211,213, will shine with the laser 204 that point-like is assembled the etch resistant film 103 on silicon substrate 101 regulation position and form opening 104.Like this, the 1st current mirror 211 is rotated and on X-direction 212 scan laser 204, the 2nd current mirror 213 is rotated and on Y direction 214 scan laser 204, thereby can in the whole zone of silicon substrate 101, form at high speed opening 104.Particularly,, at the laser that uses repetition rate 500kHz, according to 15 μ m spacings, for each scan line, form in the situation of 10000 openings 104, set the scanning frequency of the X-direction of the 1st current mirror 211 212 for 50Hz and get final product.On the other hand,, for the closeest configuration with on triangular lattice forms opening, the interval of the Y direction of scan line 214 need to be set for 13 μ m, so that the sweep speed of the Y direction 214 on 101 of silicon substrates is made as 0.65mm/ second.Like this, can, according to the closeest configuration of 15 μ m spacings in etch resistant film 103, form the opening 104 of diameter 5 μ m.
According to this execution mode 3, can use the 1st and the 2nd current mirror 211,213, surface on etch resistant film 103 as processing object is scanned and irradiating laser 204, so even have, be not that the multiple spot irradiation also can arrange the such effect of opening 104 at high speed.
(execution mode 4)
In this execution mode 4, the situation by forming opening with execution mode 1 diverse ways is described.Figure 10 is the figure of an example that is illustrated in the structure of the laser processing device that uses in execution mode 4 in the formation of opening.This laser processing device 200C possesses: the platform 201 of mounting silicon substrate 101 processing objects such as grade; The laser oscillating part 203 of Output of laser 204; Reflector laser 204 and import to speculum 205 in light path; Holographic optical elements (HOE) 221; And collector lens 222.
In this laser processing device 200C, can will export and by speculum 205, incide 1 bundle laser 204 of holographic optical elements (HOE) 221 from laser oscillating part 203,, by interference of light effect and collector lens 222,, according to the interval of expectation, shine simultaneously several 100 points on processing object.Then, for this laser that can shine simultaneously 204, shine on one side in the enterprising line scanning of etch resistant film 103 of silicon substrate 101 on one side, thereby with the laser processing device 200A that uses Fig. 7, Fig. 9, the situation of 200B, compare, can significantly shorten the process time that forms opening 104.
Like this, use the laser processing device 200C of holographic optical elements (HOE) 221 by utilization, can in the whole zone of silicon substrate 101, form extremely at high speed opening 104.Particularly, by using the laser of repetition rate 20kHz, as long as several 10 seconds, like this can be in etch resistant film 103 according to the about the closeest configuration of 15 μ m spacings, form the opening 104 of diameter 5 μ m in the processing of whole of the square silicon substrate 101 of 150mm.
, according to this execution mode 4, can use holographic optical elements (HOE) 221 to form a plurality of openings 104 by the laser pulse of 1 time (one-shot) in etch resistant film 103, so have the such effect of throughput that improves by leaps and bounds processing.
In addition, in execution mode 1～4, the situation of using the silicon substrate 101 of P types as silicon substrate 101 has been described, but at the silicon substrate 101 that uses N-type and in forming the Photvoltaic device 100 of opposite conduction type of p type diffused layer, has also played same effect.In addition, as substrate, used polysilicon, even but use monocrystalline silicon substrate, same effect also had.And then,, substrate thickness is made as 250 μ m herein, but can also have used the substrate of for example slimming to the 50 μ m left and right that can oneself keep (self-maintainable).In addition, size also is stated as 150mm * 150mm, but this is an example,, no matter larger or little than it, can obtain same effect.And then,, as substrate, take silicon substrate as example, be illustrated, but be not limited to silicon substrate, and can apply described execution mode 1～4 in all semiconductor substrates.
Utilizability on industry
As mentioned above, Photvoltaic device of the present invention is useful to the solar cell that generates electricity with sunlight.
Claims (8)
1. the manufacture method of a Photvoltaic device comprises:
The 1st diffusion layer forms operation, and the plane of incidence side at the light of the polysilicon of the 1st conduction type or monocrystalline silicon substrate, make the Impurity Diffusion of the 2nd conduction type, thereby form the 1st diffusion layer of the 1st concentration;
The etch resistant film forms operation, forms the etch resistant film with elching resistant on described the 1st diffusion layer;
Minute aperture forms operation, and the position of the regulation on described etch resistant film forms minute aperture, and described the 1st diffusion layer is exposed;
Recess forms operation,, by exposing centered by position of described the 1st diffusion layer, described the 1st diffusion layer and described polysilicon or monocrystalline silicon substrate is carried out etching, so that the smooth mode of upper surface of described the 1st diffusion layer between adjacent recess forms recess;
The 2nd diffusion layer forms operation, at the impurity of the face diffusion that forms described recess lower than the 2nd conduction type of the 2nd concentration of described the 1st concentration, thereby forms the 2nd diffusion layer; And
Surface electrode forms operation, at described recess, forms on described the 1st diffusion layer with smooth upper surface that forms in operation, and form gate electrode and connect bus electrode between described gate electrode,
The film resistor of described the 1st diffusion layer is more than or equal to 30 Ω/ and less than 60 Ω/,
The film resistor of described the 2nd diffusion layer is more than or equal to 60 Ω/ and less than 150 Ω/,
Described gate electrode contacts with described the 1st diffusion layer in bonding part, described the 1st diffusion layer obtains engaging with the good resistive of described gate electrode and described bus electrode thus.
2. the manufacture method of Photvoltaic device according to claim 1, is characterized in that,
Form in operation at described minute aperture, the laser of the wavelength that absorbs with described etch resistant film carries out the formation processing of minute aperture.
3. the manufacture method of Photvoltaic device according to claim 2, is characterized in that,
Form in operation at described etch resistant film, as described etch resistant film, form the SiN film,
Form in operation at described minute aperture, using wavelength is the following laser of 700nm.
4. the manufacture method of Photvoltaic device according to claim 2, is characterized in that,
Form in operation at described minute aperture, utilize mask to carry out shading to the part of described laser, thereby form simultaneously a plurality of described minute apertures in described etch resistant film.
5. the manufacture method of Photvoltaic device according to claim 2, is characterized in that,
Form in operation at described minute aperture, use current mirror and described laser is scanned on described etch resistant film, thereby form a plurality of described minute apertures.
6. the manufacture method of Photvoltaic device according to claim 2, is characterized in that,
Form in operation at described minute aperture, use holographic optical elements (HOE) and described laser is scanned on described etch resistant film, thereby form a plurality of described minute apertures.
7. the manufacture method of Photvoltaic device according to claim 2, is characterized in that,
Form in operation at described minute aperture,, on the triangle lattice point of described etch resistant film or on four jiaos of lattice points, form described minute aperture.
8. the manufacture method of Photvoltaic device according to claim 1, is characterized in that,
Form in operation at the described the 1st and the 2nd diffusion layer, heat under the existence of phosphorous oxychloride steam, thereby form the described the 1st and the 2nd diffusion layer;
Also comprise etching work procedure, in this etching work procedure, after described the 2nd diffusion layer forms operation, utilize the mixed liquor of hydrofluoric acid solution or hydrofluoric acid and nitric acid to carry out etching to the phosphorus glass layer on the described the 1st and the 2nd diffusion layer.
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| CN105405931A (en) * | 2015-12-23 | 2016-03-16 | 浙江晶科能源有限公司 | Solar cell and production method thereof |
| GR20150100472A (en) * | 2015-10-30 | 2017-07-03 | Πανεπιστημιο Πατρων | Polycrystalline silicon water with configured microstructures on their surfaces for improving solar absorption |
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| DE19522539C2 (en) * | 1995-06-21 | 1997-06-12 | Fraunhofer Ges Forschung | Solar cell with an emitter having a surface texture and method for producing the same |
| JP2006310368A (en) * | 2005-04-26 | 2006-11-09 | Shin Etsu Handotai Co Ltd | Solar cell manufacturing method and solar cell |
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| GR20150100472A (en) * | 2015-10-30 | 2017-07-03 | Πανεπιστημιο Πατρων | Polycrystalline silicon water with configured microstructures on their surfaces for improving solar absorption |
| CN105405931A (en) * | 2015-12-23 | 2016-03-16 | 浙江晶科能源有限公司 | Solar cell and production method thereof |
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