CN103399835B - A kind of data communications method and system - Google Patents
A kind of data communications method and system Download PDFInfo
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- CN103399835B CN103399835B CN201310329220.4A CN201310329220A CN103399835B CN 103399835 B CN103399835 B CN 103399835B CN 201310329220 A CN201310329220 A CN 201310329220A CN 103399835 B CN103399835 B CN 103399835B
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Abstract
The invention discloses a kind of data communications method, comprising: when adopting IIC communication to carry out production debugging, utilizing the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged to carry out data communication; When adopting SPI communication to carry out production debugging, the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged is utilized to carry out data communication.The invention also discloses a kind of data communication system.
Description
Technical field
The present invention relates to communication technical field, particularly relate to a kind of data communications method and system.
Background technology
When carrying out production debugging (as chip testing); usually IIC(Inter-IntegratedCircuit can be used; IC bus) communicate or SPI(SerialPeripheralInterface, serial peripheral interface bus) communicating or using IIC communication simultaneously communicates with SPI.When treating debug products and debugging, normal employing IIC communication and/or SPI communication mode obtain the relevant information of product, and existing IIC debugging acid and SPI debugging acid do not have the Peripheral Interface of standard, in the connected mode of traditional debugging acid and product to be debugged, IIC debugging acid or SPI debugging acid are directly connected with product to be debugged by jack/contact pin (or rectangular insert/socket), particularly, for the connected mode of contact pin/jack, utilize the jack at connecting line (thin electric wire) two to be connected respectively with the contact pin of debugging acid and product side to be debugged, for the connected mode of rectangular insert/socket, utilize the socket at winding displacement two to be connected respectively with the rectangular insert of debugging acid and product side to be debugged.
But, when needs frequent plug IIC interface or SPI interface, for the connected mode of contact pin/jack, plug action need one row one, pin row pin carries out correspondence and connects or opening operation, in order to ensure IIC debugging acid, SPI debugging acid and product electrical safety to be debugged, noting also during connection and first connecting public domain line, during disconnection, should be noted last disconnection public domain line, it is very inconvenient to use, and affects service efficiency; And for the connected mode of rectangular insert/socket, cannot ensure to connect public domain line at first when connecting, finally disconnect public domain line during disconnection, so the electrical safety of IIC debugging acid, SPI debugging acid and product to be debugged cannot be ensured.
Summary of the invention
In view of this, the fundamental purpose of the embodiment of the present invention is to provide a kind of data communications method and system, with facilitating the interface between communication facilities to plug on the basis of operation, ensures the object of the electrical safety between communication facilities further.
For achieving the above object, embodiments provide a kind of data communications method, comprising:
When adopting IIC communication to carry out production debugging, the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged is utilized to carry out data communication;
When adopting SPI communication to carry out production debugging, the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged is utilized to carry out data communication.
Preferably, in the above-mentioned methods,
If described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface, and the signal wire of described first USB interface comprises: the first bidirectional data line SDA, the first clock line SCL and the first ground wire GND; The signal wire of described secondary USB interface comprises: the second bidirectional data line SDA, second clock line SCL and the second ground wire GND; The signal wire of described 3rd USB interface comprises: the first primary input is from output data line MISO, and the first main output is from input data line MOSI, and the 3rd clock line SCLK, first select signal wire CS and the 3rd ground wire GND; The signal wire of described 4th USB interface comprises: the second primary input from output data line MISO, the second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND;
If described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, described secondary USB interface and described 4th USB interface are same USB interface, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line SDA, first clock line SCL, first ground wire GND, first primary input is from output data line MISO, first main output is from input data line MOSI, 3rd clock line SCLK, first selects signal wire CS and the 3rd ground wire GND, described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line SDA, second clock line SCL, the second ground wire GND, the second primary input are from output data line MISO, second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND.
Preferably, in the above-mentioned methods, the first bidirectional data line SDA is connected with the second bidirectional data line SDA, and the first clock line SCL is connected with second clock line SCL, and the first ground wire GND is connected with the second ground wire GND;
Describedly utilize the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged to carry out data communication to comprise:
When described first debugging acid utilizes described first bidirectional data line SDA to send the first data, described in described product utilization to be debugged, the first bidirectional data line SDA receives described first data;
When described in described product utilization to be debugged, the first bidirectional data line SDA sends the second data, described first debugging acid utilizes described first bidirectional data line SDA to receive described second data.
Preferably, in the above-mentioned methods, first primary input is connected from output data line MISO from output data line MISO with the second primary input, first main output is connected from input data line MOSI from input data line MOSI with the second main output, 3rd clock line SCLK is connected with the 4th clock line SCLK, first selects signal wire CS to be connected with the second chip selection signal line CS, and the 3rd ground wire GND is connected with the 4th ground wire GND;
Describedly utilize the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged to carry out data communication to comprise:
When described second debugging acid utilizes described first main output to send the 3rd data from input data line MOSI, the second main output described in described product utilization to be debugged receives described 3rd data from input data line MOSI;
When the primary input of described product utilization second to be debugged sends the 4th data from output data line MISO, described second debugging acid utilizes described first primary input to receive described 4th data from output data line MISO.
Preferably, in the above-mentioned methods,
When production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead VBVS, and described secondary USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises:
Described first debugging acid utilizes the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered;
Or, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead VBVS, and described 4th USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises:
Described second debugging acid utilizes the connecting line between described second source line VBVS and described second source line VBVS to be that described product to be debugged is powered.
Or when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead VBVS; Described secondary USB interface or described 4th USB interface also comprise: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises:
Described first debugging acid and described second debugging acid utilize the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
The embodiment of the present invention additionally provides a kind of data communication system, comprising: the first debugging acid, described second debugging acid, product to be debugged, the first USB interface, secondary USB interface, the 3rd USB interface and the 4th USB interface;
Described first debugging acid, for when adopting IIC communication to carry out production debugging, utilizes the secondary USB interface of the first USB interface and product side to be debugged to carry out data communication;
Described second debugging acid, for when adopting SPI communication to carry out production debugging, utilizes the 4th USB interface of the 3rd USB interface and product side to be debugged to carry out data communication.
Preferably, in said system,
If described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface, and the signal wire of described first USB interface comprises: the first bidirectional data line SDA, the first clock line SCL and the first ground wire GND; The signal wire of described secondary USB interface comprises: the second bidirectional data line SDA, second clock line SCL and the second ground wire GND; The signal wire of described 3rd USB interface comprises: the first primary input is from output data line MISO, and the first main output is from input data line MOSI, and the 3rd clock line SCLK, first select signal wire CS and the 3rd ground wire GND; The signal wire of described 4th USB interface comprises: the second primary input from output data line MISO, the second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND;
If described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, described secondary USB interface and described 4th USB interface are same USB interface, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line SDA, first clock line SCL, first ground wire GND, first primary input is from output data line MISO, first main output is from input data line MOSI, 3rd clock line SCLK, first selects signal wire CS and the 3rd ground wire GND, described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line SDA, second clock line SCL, the second ground wire GND, the second primary input are from output data line MISO, second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND.
Preferably, in said system, the first bidirectional data line SDA is connected with the second bidirectional data line SDA, and the first clock line SCL is connected with second clock line SCL, and the first ground wire GND is connected with the second ground wire GND;
Described first debugging acid, has for utilizing described first bidirectional data line SDA to send the first data;
Described product to be debugged, has for utilizing described first bidirectional data line SDA to receive described first data, and utilizes described first bidirectional data line SDA to send the second data;
Described first debugging acid, also has for utilizing described first bidirectional data line SDA to receive described second data.
Preferably, in said system, first primary input is connected from output data line MISO from output data line MISO with the second primary input, first main output is connected from input data line MOSI from input data line MOSI with the second main output, 3rd clock line SCLK is connected with the 4th clock line SCLK, first selects signal wire CS to be connected with the second chip selection signal line CS, and the 3rd ground wire GND is connected with the 4th ground wire GND;
Described second debugging acid, has for utilizing described first main output to send the 3rd data from input data line MOSI;
Described product to be debugged, has for utilizing described second main output to receive described 3rd data from input data line MOSI, and utilizes the second primary input to send the 4th data from output data line MISO;
Described second debugging acid, also has for utilizing described first primary input to receive described 4th data from output data line MISO.
Preferably, in said system,
When production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead VBVS, and described secondary USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described first debugging acid, also for utilizing the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
Or, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead VBVS, and described 4th USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described second debugging acid, also for utilizing the connecting line between described second source line VBVS and described second source line VBVS to be that described product to be debugged is powered.
Or when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead VBVS; Described secondary USB interface or described 4th USB interface also comprise: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described first debugging acid and described second debugging acid, also for utilizing the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
In the data communications method provided in the embodiment of the present invention and system, when adopting IIC communication to carry out production debugging, the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged is utilized to carry out data communication; When adopting SPI communication to carry out production debugging, the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged is utilized to carry out data communication.Due to when carrying out product test,
Need to connect or disconnect debugging acid and product to be debugged frequently, so, the embodiment of the present invention arranges special USB interface at debugging acid and product both sides to be debugged, when needing the plug operation carrying out interface frequently, utilize these USB interface, make plug convenient to operation, improve IIC and to communicate the work efficiency communicated in production debugging process with SPI, and ensure that the electrical safety of debugging acid and product to be debugged.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the schematic flow sheet of embodiment of the present invention data communications method;
Fig. 2 is embodiment of the present invention IIC/SPI communication interface schematic diagram;
Fig. 3 is the connection diagram of the embodiment of the present invention first debugging acid and product to be debugged;
Fig. 4 is the connection diagram of the embodiment of the present invention second debugging acid and product to be debugged;
Fig. 5 is the connection diagram of embodiment of the present invention debugging acid and product to be debugged;
Fig. 6 is the structural representation of embodiment of the present invention data communication system.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Because existing IIC debugging acid and SPI debugging acid do not have special Peripheral Interface, and jack/contact pin or rectangular insert/socket can only be adopted to realize IIC debugging acid and/or the connection between SPI debugging acid and product to be debugged, but, owing to needing between debugging acid and product to be tested frequently to plug operation, to occur that operating efficiency is low and the problems such as the electrical safety of debugging acid and product to be debugged can not be ensured, for this problem, the embodiment of the present invention realizes IIC communication and/or SPI communication on the basis not changing existing interface (such as USB interface) physical arrangement, namely pin and principle of work by redefining existing interface realize the communication between debugging acid and product to be tested (debugged product and tested chip), and facilitate interface plug operation and ensure that the electrical safety of debugging acid and product to be debugged.
Shown in Figure 1, the schematic flow sheet of the data communications method that Fig. 1 provides for the embodiment of the present invention, the step realizing the method comprises:
Step 101: when carrying out production debugging, determine communication type, described communication type comprises employing IIC communication and employing SPI communicates.
Step 102: when adopting IIC communication to carry out production debugging, utilize the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged to carry out data communication;
Step 103: when adopting SPI communication to carry out production debugging, utilize the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged to carry out data communication.
IIC/SPI communication interface schematic diagram shown in Figure 2, IIC communication bus generally has two signal wires, and one is bidirectional data line SDA, and another root is clock line SCL, but, also must there be a ground wire GND on the necessary common reference ground of 2 equipment of communication; SPI communication bus at least needs 4 lines, and they are that the primary input of MISO(data is from output), the main output of MOSI(data is from input), SCLK(clock), CS(sheet selects), but the necessary common reference ground of 2 equipment of communication, also must there is a ground wire GND.
The embodiment of the present invention does not change the physical arrangement of existing USB interface, but the pin of existing USB interface is redefined, be defined as the pin of IIC communication interface and/or SP communication interface, and utilize the USB interface redefined to realize IIC communication and/or SPI communication.
Wherein, described first debugging acid and described second debugging acid can be different debugging acids also can be same debugging acid, is specifically divided into following two kinds of situations:
If the first described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface.
First debugging acid shown in Figure 3 and the connection diagram of product to be debugged, when carrying out IIC communication, described first USB interface is arranged on described first debugging acid side, described secondary USB interface is arranged on described product side to be debugged, so that the IIC realized between the first debugging acid with product to be debugged by the first USB interface and secondary USB interface is communicated.Wherein, the signal wire of described first USB interface comprises: the first bidirectional data line SDA, the first clock line SCL and the first ground wire GND; The signal wire of described secondary USB interface comprises: the second bidirectional data line SDA, second clock line SCL and the second ground wire GND.
Second debugging acid shown in Figure 4 and the connection diagram of product to be debugged, when carrying out SPI communication, described 3rd USB interface is arranged on described second debugging acid side, described 4th USB interface is arranged on described product side to be debugged, so that the SPI realized between the second debugging acid with product to be debugged by the 3rd USB interface and the 4th USB interface is communicated.The signal wire of described 3rd USB interface comprises: the first primary input is from output data line MISO, and the first main output is from input data line MOSI, and the 3rd clock line SCLK, first select signal wire CS and the 3rd ground wire GND; The signal wire of described 4th USB interface comprises: the second primary input from output data line MISO, the second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND.
If the second described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, and described secondary USB interface and described 4th USB interface are same USB interface.
The connection diagram of debugging acid shown in Figure 5 and product to be debugged, described first USB interface (or described 3rd USB interface) is arranged on described first debugging acid (or second debugging acid) side, described secondary USB interface (or described 4th USB interface) is arranged on described product side to be debugged, to realize IIC communication or SPI communication or to carry out IIC communication communicating with SPI by the USB interface of both sides simultaneously.Wherein, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line SDA, the first clock line SCL, the first ground wire GND, the first primary input are from output data line MISO, first main output is from input data line MOSI, and the 3rd clock line SCLK, first select signal wire CS and the 3rd ground wire GND; Described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line SDA, second clock line SCL, the second ground wire GND, the second primary input are from output data line MISO, second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND.
See Fig. 3 and Fig. 5, the first bidirectional data line SDA is connected with the second bidirectional data line SDA, and the first clock line SCL is connected with second clock line SCL, and the first ground wire GND is connected with the second ground wire GND; Based on this, under the effect of clock signal SCL, the following method of main employing realizes the step 102 in the embodiment of the present invention:
When described first debugging acid utilizes described first bidirectional data line SDA to send the first data, described in described product utilization to be debugged, the first bidirectional data line SDA receives described first data;
When described in described product utilization to be debugged, the first bidirectional data line SDA sends the second data, described first debugging acid utilizes described first bidirectional data line SDA to receive described second data.
See Fig. 4 and Fig. 5, first primary input is connected from output data line MISO from output data line MISO with the second primary input, first main output is connected from input data line MOSI from input data line MOSI with the second main output, 3rd clock line SCLK is connected with the 4th clock line SCLK, and the 3rd ground wire GND is connected with the 4th ground wire GND; Based on this, under the effect of clock signal SCLK, the following method of main employing realizes the step 103 in the embodiment of the present invention:
When described second debugging acid utilizes described first main output to send the 3rd data from input data line MOSI, the second main output described in described product utilization to be debugged receives described 3rd data from input data line MOSI;
When the primary input of described product utilization second to be debugged sends the 4th data from output data line MISO, described second debugging acid utilizes described first primary input to receive described 4th data from output data line MISO.
Further, see Fig. 3, when production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead VBVS, and described secondary USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described first debugging acid utilizes the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered;
See Fig. 4, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead VBVS, and described 4th USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described second debugging acid utilizes the connecting line between described second source line VBVS and described second source line VBVS to be that described product to be debugged is powered.
See Fig. 5, when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead VBVS; Described secondary USB interface or described 4th USB interface also comprise: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described first debugging acid and described second debugging acid utilize the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
Further, the first USB interface in the embodiment of the present invention, secondary USB interface, the 3rd USB interface and the 4th USB interface are USB3.0 interface, typically, select to install USB3.0A type socket in debugging acid side; Consider the size of interface volume, select to install USB3.0Micro-B type socket in product side to be debugged, it takies small volume.
See table 1, be existing USB3.0A type and USB3.0Macro-B type pinout table, wherein, the left side is USB3.0A type pinout table, and the right is USB3.0Macro-B type pinout table.
Table 1
The embodiment of the present invention does not change the physical arrangement of USB3.0 interface, just changes its pinout and principle of work thereof.Because USB3.0 is interfaced to rare 9 pins, and IIC communication to communicate with SPI and needs 8 pins altogether, meets the demand of pin number.Sometimes debugged product and tested chip need external power supply, because the IIC debugging acid communicated with SPI that communicate can be powered to external unit, so 1 pin be left can be VBUS, to power use to external unit; In addition, in order to reduce the change to existing USB interface, original power signal line VBVS and the pinout of ground wire GND can be retained.
For Fig. 3, when only realizing IIC communication, following redefining can be carried out, see table 2 and table 3 to USB3.0A type pin and USB3.0Micro-B type pin:
Table 2
Table 3
For Fig. 4, when only realizing SPI communication, following redefining can be carried out, see table 4 and table 5 to USB3.0A type pin and USB3.0Micro-B type pin:
Table 4
Table 5
For Fig. 5, when to realize IIC communication and communicate with SPI simultaneously, following redefining can be carried out, see table 6 and table 7 to USB3.0A type pin and USB3.0Micro-B type pin:
Table 6
Table 7
Wherein, the pin of USB3.0 interface has outer cover metal layer Shell, and this outer cover metal layer Shell ground connection, for realizing the public domain of debugging acid or product to be debugged during interface plug, to reach the effect of proterctive equipment electrical safety.
It should be noted that, when not considering volume, DB9 interface can replace USB3.0 interface.DB9 interface is different with USB3.0 interface profile, and just DB9 interface volume is large, is widely used in RS232 communication, but the same with USB3.0 interface, frequently can plug easily and in plug process, realize the effect of protection electrical safety.
In the data communications method that the embodiment of the present invention provides, when adopting IIC communication to carry out production debugging, the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged is utilized to carry out data communication; When adopting SPI communication to carry out production debugging, the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged is utilized to carry out data communication.Due to when carrying out product test, need to connect or disconnect debugging acid and product to be debugged frequently, so, the embodiment of the present invention arranges special USB interface at debugging acid and product both sides to be debugged, when needing the plug operation carrying out interface frequently, utilizing these USB interface, making plug convenient to operation, improve IIC to communicate the work efficiency communicated in production debugging process with SPI, and ensure that the electrical safety of debugging acid and product to be debugged.
In addition, because the USB interface in the embodiment of the present invention (such as USB3.0 interface) is widely used in the various electronic equipment with USB interface (as computer, USB flash disk, portable hard drive and oscillograph etc.), when not needing extra manpower financial capacity to design and produce the interface with new physical arrangement, existing interface and wire rod thereof is adopted to realize the embodiment of the present invention.
See Fig. 6, the structural representation of the data communication system that Fig. 6 provides for the embodiment of the present invention, comprising: the first debugging acid 1, described second debugging acid 2, product to be debugged 3, first USB interface 4, secondary USB interface 5, the 3rd USB interface 6 and the 4th USB interface 7;
Described first debugging acid 1, for when adopting IIC communication to carry out production debugging, utilizes the first USB interface 4 to carry out data communication with the secondary USB interface 5 of product 3 side to be debugged;
Described second debugging acid 1, for when adopting SPI communication to carry out production debugging, utilizes the 3rd USB interface 6 to carry out data communication with the 4th USB interface 7 of product 3 side to be debugged.
If described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface, and the signal wire of described first USB interface comprises: the first bidirectional data line SDA, the first clock line SCL and the first ground wire GND; The signal wire of described secondary USB interface comprises: the second bidirectional data line SDA, second clock line SCL and the second ground wire GND; The signal wire of described 3rd USB interface comprises: the first primary input is from output data line MISO, and the first main output is from input data line MOSI, and the 3rd clock line SCLK, first select signal wire CS and the 3rd ground wire GND; The signal wire of described 4th USB interface comprises: the second primary input from output data line MISO, the second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND;
If described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, described secondary USB interface and described 4th USB interface are same USB interface, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line SDA, first clock line SCL, first ground wire GND, first primary input is from output data line MISO, first main output is from input data line MOSI, 3rd clock line SCLK, first selects signal wire CS and the 3rd ground wire GND, described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line SDA, second clock line SCL, the second ground wire GND, the second primary input are from output data line MISO, second main output from input data line MOSI, the 4th clock line SCLK, the second chip selection signal line CS and the 4th ground wire GND.
Wherein, the first bidirectional data line SDA is connected with the second bidirectional data line SDA, and the first clock line SCL is connected with second clock line SCL, and the first ground wire GND is connected with the second ground wire GND; Described first debugging acid 1, has for utilizing described first bidirectional data line SDA to send the first data; Described product to be debugged 3, has for utilizing described first bidirectional data line SDA to receive described first data, and utilizes described first bidirectional data line SDA to send the second data; Described first debugging acid 1, also has for utilizing described first bidirectional data line SDA to receive described second data.
Wherein, first primary input is connected from output data line MISO from output data line MISO with the second primary input, first main output is connected from input data line MOSI from input data line MOSI with the second main output, 3rd clock line SCLK is connected with the 4th clock line SCLK, first selects signal wire CS to be connected with the second chip selection signal line CS, and the 3rd ground wire GND is connected with the 4th ground wire GND; Described second debugging acid 2, has for utilizing described first main output to send the 3rd data from input data line MOSI; Described product to be debugged 3, has for utilizing described second main output to receive described 3rd data from input data line MOSI, and utilizes the second primary input to send the 4th data from output data line MISO; Described second debugging acid 2, also has for utilizing described first primary input to receive described 4th data from output data line MISO.
In addition, debugging acid can also be powered for product to be tested, particularly:
When production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead VBVS, and described secondary USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described first debugging acid, also for utilizing the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
Or, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead VBVS, and described 4th USB interface also comprises: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described second debugging acid, also for utilizing the connecting line between described second source line VBVS and described second source line VBVS to be that described product to be debugged is powered.
Or when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead VBVS; Described secondary USB interface or described 4th USB interface also comprise: second source line VBVS; Described first power lead VBVS is connected with described second source line VBVS; Described method also comprises: described first debugging acid and described second debugging acid, also for utilizing the connecting line between described first power lead VBVS and described second source line VBVS to be that described product to be debugged is powered.
In the data communication system that the embodiment of the present invention provides, when adopting IIC communication to carry out production debugging, the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged is utilized to carry out data communication; When adopting SPI communication to carry out production debugging, the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged is utilized to carry out data communication.Due to when carrying out product test, need to connect or disconnect debugging acid and product to be debugged frequently, so, the embodiment of the present invention arranges special USB interface at debugging acid and product both sides to be debugged, when needing the plug operation carrying out interface frequently, utilizing these USB interface, making plug convenient to operation, improve IIC to communicate the work efficiency communicated in production debugging process with SPI, and ensure that the electrical safety of debugging acid and product to be debugged.
In addition, because the USB interface in the embodiment of the present invention (such as USB3.0 interface) is widely used in the various electronic equipment with USB interface (as computer, USB flash disk, portable hard drive and oscillograph etc.), when not needing extra manpower financial capacity to design and produce the interface with new physical arrangement, existing interface and wire rod thereof is adopted to realize the embodiment of the present invention.
As seen through the above description of the embodiments, those skilled in the art can be well understood to the mode that all or part of step in above-described embodiment method can add required general hardware platform by software and realizes.Based on such understanding, technical scheme of the present invention can embody with the form of software product the part that prior art contributes in essence in other words, this computer software product can be stored in storage medium, as ROM/RAM, magnetic disc, CD etc., comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network communication equipments such as such as media gateway, etc.) perform the method described in some part of each embodiment of the present invention or embodiment.
It should be noted that, in this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.For method disclosed in embodiment, because it is corresponding with system disclosed in embodiment, so description is fairly simple, relevant part illustrates see components of system as directed.
Also it should be noted that, in this article, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operational zone, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (8)
1. a data communications method, is characterized in that, comprising:
When adopting IIC communication to carry out production debugging, utilize the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged to carry out data communication, described first USB interface and described secondary USB interface are IIC communication interface;
When adopting SPI communication to carry out production debugging, utilize the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged to carry out data communication, described 3rd USB interface and described 4th USB interface are SPI communication interface;
If described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface, and the signal wire of described first USB interface comprises: the first bidirectional data line, the first clock line and the first ground wire; The signal wire of described secondary USB interface comprises: the second bidirectional data line, second clock line and the second ground wire; The signal wire of described 3rd USB interface comprises: the first primary input is from output data line, and the first main output is from input data line, and the 3rd clock line, first select signal wire and the 3rd ground wire; The signal wire of described 4th USB interface comprises: the second primary input from output data line, the second main output from input data line, the 4th clock line, the second chip selection signal line and the 4th ground wire;
If described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, described secondary USB interface and described 4th USB interface are same USB interface, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line, the first clock line, the first ground wire, the first primary input are from output data line, first main output is from input data line, and the 3rd clock line, first select signal wire and the 3rd ground wire; Described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line, second clock line, the second ground wire, the second primary input are from output data line, second main output from input data line, the 4th clock line, the second chip selection signal line and the 4th ground wire.
2. method according to claim 1, is characterized in that, the first bidirectional data line is connected with the second bidirectional data line, and the first clock line is connected with second clock line, and the first ground wire is connected with the second ground wire;
Describedly utilize the secondary USB interface of the first USB interface of the first debugging acid side and product side to be debugged to carry out data communication to comprise:
When described first debugging acid utilizes described first bidirectional data line to send the first data, described in described product utilization to be debugged, the first bidirectional data line receives described first data;
When described in described product utilization to be debugged, the first bidirectional data line sends the second data, described first debugging acid utilizes described first bidirectional data line to receive described second data.
3. method according to claim 1, it is characterized in that, first primary input is connected from output data line from output data line with the second primary input, first main output is connected from input data line from input data line with the second main output, 3rd clock line is connected with the 4th clock line, first selects signal wire to be connected with the second chip selection signal line, and the 3rd ground wire is connected with the 4th ground wire;
Describedly utilize the 3rd USB interface of the second debugging acid side and the 4th USB interface of product side to be debugged to carry out data communication to comprise:
When described second debugging acid utilizes described first main output to send the 3rd data from input data line, the second main output described in described product utilization to be debugged receives described 3rd data from input data line;
When the primary input of described product utilization second to be debugged sends the 4th data from output data line, described second debugging acid utilizes described first primary input to receive described 4th data from output data line.
4. method according to claim 1, is characterized in that,
When production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead, and described secondary USB interface also comprises: second source line; Described first power lead is connected with described second source line; Described method also comprises:
Described first debugging acid utilizes the connecting line between described first power lead and described second source line to be that described product to be debugged is powered;
Or, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead, and described 4th USB interface also comprises: second source line; Described first power lead is connected with described second source line; Described method also comprises:
Described second debugging acid utilizes the connecting line between described second source line and described second source line to be that described product to be debugged is powered;
Or when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead; Described secondary USB interface or described 4th USB interface also comprise: second source line; Described first power lead is connected with described second source line; Described method also comprises:
Described first debugging acid and described second debugging acid utilize the connecting line between described first power lead and described second source line to be that described product to be debugged is powered.
5. a data communication system, is characterized in that, comprising: the first debugging acid, the second debugging acid, product to be debugged, the first USB interface, secondary USB interface, the 3rd USB interface and the 4th USB interface;
Described first debugging acid, for when adopting IIC communication to carry out production debugging, utilize the secondary USB interface of the first USB interface and product side to be debugged to carry out data communication, described first USB interface and described secondary USB interface are IIC communication interface;
Described second debugging acid, for when adopting SPI communication to carry out production debugging, utilize the 4th USB interface of the 3rd USB interface and product side to be debugged to carry out data communication, described 3rd USB interface and described 4th USB interface are SPI communication interface;
If described first debugging acid is different debugging acids from described second debugging acid, then described first USB interface, described secondary USB interface, described 3rd USB interface and described 4th USB interface are different USB interface, and the signal wire of described first USB interface comprises: the first bidirectional data line, the first clock line and the first ground wire; The signal wire of described secondary USB interface comprises: the second bidirectional data line, second clock line and the second ground wire; The signal wire of described 3rd USB interface comprises: the first primary input is from output data line, and the first main output is from input data line, and the 3rd clock line, first select signal wire and the 3rd ground wire; The signal wire of described 4th USB interface comprises: the second primary input from output data line, the second main output from input data line, the 4th clock line, the second chip selection signal line and the 4th ground wire;
If described first debugging acid and described second debugging acid are same debugging acid, then described first USB interface and described 3rd USB interface are same USB interface, described secondary USB interface and described 4th USB interface are same USB interface, described first USB interface or described 3rd USB interface comprise: the first bidirectional data line, the first clock line, the first ground wire, the first primary input are from output data line, first main output is from input data line, and the 3rd clock line, first select signal wire and the 3rd ground wire; Described secondary USB interface or described 4th USB interface comprise: the second bidirectional data line, second clock line, the second ground wire, the second primary input are from output data line, second main output from input data line, the 4th clock line, the second chip selection signal line and the 4th ground wire.
6. system according to claim 5, is characterized in that, the first bidirectional data line is connected with the second bidirectional data line, and the first clock line is connected with second clock line, and the first ground wire is connected with the second ground wire;
Described first debugging acid, has for utilizing described first bidirectional data line to send the first data;
Described product to be debugged, has for utilizing described first bidirectional data line to receive described first data, and utilizes described first bidirectional data line to send the second data;
Described first debugging acid, also has for utilizing described first bidirectional data line to receive described second data.
7. system according to claim 5, it is characterized in that, first primary input is connected from output data line from output data line with the second primary input, first main output is connected from input data line from input data line with the second main output, 3rd clock line is connected with the 4th clock line, first selects signal wire to be connected with the second chip selection signal line, and the 3rd ground wire is connected with the 4th ground wire;
Described second debugging acid, has for utilizing described first main output to send the 3rd data from input data line;
Described product to be debugged, has for utilizing described second main output to receive described 3rd data from input data line, and utilizes the second primary input to send the 4th data from output data line;
Described second debugging acid, also has for utilizing described first primary input to receive described 4th data from output data line.
8. system according to claim 5, is characterized in that,
When production debugging is carried out in employing IIC communication and described first debugging acid is different debugging acids from described second debugging acid, described first USB interface also comprises: the first power lead, and described secondary USB interface also comprises: second source line; Described first power lead is connected with described second source line; Described first debugging acid, also for utilizing the connecting line between described first power lead and described second source line to be that described product to be debugged is powered;
Or, when adopting SPI communication to carry out production debugging and described first debugging acid is different debugging acids from described second debugging acid time, described 3rd USB interface also comprises: the first power lead, and described 4th USB interface also comprises: second source line; Described first power lead is connected with described second source line; Described second debugging acid, also for utilizing the connecting line between described second source line and described second source line to be that described product to be debugged is powered;
Or when described first debugging acid and described second debugging acid are same debugging acid, described first USB interface or described 3rd USB interface also comprise: the first power lead; Described secondary USB interface or described 4th USB interface also comprise: second source line; Described first power lead is connected with described second source line; Described first debugging acid and described second debugging acid, also for utilizing the connecting line between described first power lead and described second source line to be that described product to be debugged is powered.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2888537Y (en) * | 2006-04-19 | 2007-04-11 | 武汉电信器件有限公司 | A digital communication interface conversion module |
| CN201876522U (en) * | 2009-12-31 | 2011-06-22 | 杭州士兰微电子股份有限公司 | General test equipment |
| CN102279827A (en) * | 2011-06-09 | 2011-12-14 | 惠州市德赛西威汽车电子有限公司 | Multifunctional communication transit box |
| CN102591835A (en) * | 2011-12-30 | 2012-07-18 | 武汉电信器件有限公司 | Portable downloader |
| CN202600083U (en) * | 2012-04-27 | 2012-12-12 | 深圳市瑞思科科技有限公司 | Device and system for testing flexible circuit board assembly |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8660817B2 (en) * | 2007-12-14 | 2014-02-25 | Broadcom Corporation | Hardware test and diagnosis system and method |
| CN201138370Y (en) * | 2007-12-28 | 2008-10-22 | 雅韬半导体(上海)有限公司 | CMMB mobile phone television demodulation chip test circuit |
| CN101290607B (en) * | 2008-05-31 | 2010-06-16 | 青岛海信电器股份有限公司 | Chip debugging interface device |
| CN201518128U (en) * | 2009-07-27 | 2010-06-30 | 青岛海信电器股份有限公司 | Software upgrading and debugging tool |
| CN101706550B (en) * | 2009-11-19 | 2012-02-22 | 福建联迪商用设备有限公司 | Method for testing mainboard |
| CN202815170U (en) * | 2012-03-08 | 2013-03-20 | 无锡华大国奇科技有限公司 | Chip test system |
| CN202711721U (en) * | 2012-07-06 | 2013-01-30 | 建荣集成电路科技(珠海)有限公司 | Novel compact disk-recordable (CD-R) machine |
-
2013
- 2013-07-31 CN CN201310329220.4A patent/CN103399835B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2888537Y (en) * | 2006-04-19 | 2007-04-11 | 武汉电信器件有限公司 | A digital communication interface conversion module |
| CN201876522U (en) * | 2009-12-31 | 2011-06-22 | 杭州士兰微电子股份有限公司 | General test equipment |
| CN102279827A (en) * | 2011-06-09 | 2011-12-14 | 惠州市德赛西威汽车电子有限公司 | Multifunctional communication transit box |
| CN102591835A (en) * | 2011-12-30 | 2012-07-18 | 武汉电信器件有限公司 | Portable downloader |
| CN202600083U (en) * | 2012-04-27 | 2012-12-12 | 深圳市瑞思科科技有限公司 | Device and system for testing flexible circuit board assembly |
Non-Patent Citations (2)
| Title |
|---|
| 基于USB接口的1553B测试卡设计与实现;郑波祥等;《测控技术》;20101231;全文 * |
| 基于USB的便携式集成芯片测试仪系统设计与实现;李琪等;《实验室研究与探索》;20081130;全文 * |
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