CN103391453A - PCR (Program Clock Reference) correction processing system and method of network set-top box - Google Patents
PCR (Program Clock Reference) correction processing system and method of network set-top box Download PDFInfo
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Abstract
The invention discloses a PCR (Program Clock Reference) correction processing system and method of a network set-top box. Encoding is performed through a PCR in the encoder PCR processing step in two routes; in the first route, a counter A is directly triggered through 27 MHZ pulses which are generated by a clock pulse generating module to generate an extended domain PCR_ext and the length of the route is 9 bits; the second route passes through a 300 frequency divider to generate 90 KHZ pulses which are sent into a 33 bit counter B to generate a 90 KHZ base value and listed into a PCR_base, the length of the second route is 33 bits, and the second route is used for comparing with a PTS and a DTS to generate synchronous signals of decoding and displaying of a user receiving end to form into a PCR domain so as to jointly form into the 42 bit PCR. The decoder PCR processing step comprises recovering a 27 MHZ system clock which is synchronized with an encoder through the PCR; performing decoding synchronization between audio and video through the DTS and the PTS in PES streams after the system clock is restored and setting the buffer duration of a decoder through VBV_Delay simultaneously; starting the decoder to perform initial decoding. The PCR correction processing system and method of the network set-top box can effectively decrease the times of operation and reduce the complexity of PCR correction processing.
Description
Technical field
The present invention relates to a kind of network machine top box PCR and proofread and correct treatment system and method.
Background technology
Program clock reference is called for short PCR(Program Clock Reference), be a RTTS.In order to guarantee the normal operation of sending and receiving end, the frequency of receiving terminal and transmitting terminal is consistent with phase place, must set up the synchronised clock of sending and receiving end, namely the PCR code, utilize counter to count system at transmitting terminal, after forming the PCR value, send the PCR value to receiving terminal with data at set intervals, receiving terminal has a local clock of working, and its rated power is identical with the transmitting terminal clock, equally also there is a counter to count it, form a local reference clock.At this moment, transmitting terminal can extract PCR from TS stream, insert in the PES bag with the coded message of audio frame, frame of video, receiving terminal is placed on the PCR value in audio frame, frame of video in buffer memory, occur etc. the value in the audio frequency and video of transmitting terminal to be compared, then, with output control voltage controlled oscillator relatively, make the frequency phase lock of sending and receiving end by adjustment, thereby realize the Complete Synchronization of sending and receiving end sound and image.
Existing network machine top box PCR proofreaies and correct and processes position and the PCR numerical value that need to wrap with the TS that comprises PCR of a large amount of memory stores a period of time, also needs to carry out with a plurality of multipliers the computing of least square method, and the complexity that PCR proofreaies and correct is higher.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of network machine top box PCR that can effectively reduce operation times, reduction PCR correction processing complexity to proofread and correct treatment system and method.
The objective of the invention is to be achieved through the following technical solutions: network machine top box PCR proofreaies and correct treatment system, and it comprises coding PCR correction processing unit and decoding PCR correction processing unit:
Coding PCR correction processing unit comprises video compression coding module, video PES package module, audio compression coding module, audio frequency PES package module, clock pulse generation module and program multiplexing device, the output of video compression coding module is connected with the program multiplexing device by video PES package module, and the output of audio compression coding module is connected with the program multiplexing device by audio frequency PES package module; The first via output of clock pulse generation module is connected with counter A, and counter A is connected with the program multiplexing device; The second tunnel output of clock pulse generation module is connected with counter B by frequency divider a, and the road output of counter B is connected with video PES package module, and another road output of counter B is connected with audio frequency PES package module; The Third Road output of clock pulse generation module is connected with the video compression coding module, and the output of clock pulse generation module De Disi road is connected with the audio compression coding module;
Decoding PCR correction processing unit comprises demodulation multiplexer, RID filtering module, PCR computing module, LP gain control module, video and audio CD disc VCD, video decode module, audio decoder module and synchronously simulating AV output module, the output of demodulation multiplexer is connected with the PID filtering module, one tunnel output of PID filtering module is connected with the input of video and audio CD disc VCD with the LP gain control module by PCR computing module, comparator successively, and the output of PCR computing module also is connected with counter C by the initialization loading module; The video PES output of PID filtering module is successively by video cache and video decode module and synchronously simulating AV output, and the audio frequency PES output of PID filtering module is successively by audio frequency buffer memory and audio decoder module and synchronously simulating AV output;
The first via output of described video and audio CD disc VCD is connected with counter C, the second tunnel output of video and audio CD disc VCD is connected with counter D by frequency divider b, the output of counter D connects respectively video cache and audio frequency buffer memory, and the output of video and audio CD disc VCD also is connected with video decode module, audio decoder module respectively.
Network machine top box PCR correction processing method, it comprises an encoder PCR treatment step and a decoder PCR treatment step:
In encoder PCR treatment step, PCR divides two-way to encode: the direct flip-flop number A of the 27MHz pulse that a route clock pulse generation module produces generates extension field PCR_ext, and length is 9bits; Produce the 90kHz pulse after another Lu Jingyi 300 frequency divider a, send into 33 digit counter B and generate the 90kHz base value, list PCR_base in, length 33bits, be used for and PTS/DTS compares, and produces the decoding of user's receiving terminal and the synchronizing signal of demonstration, form the PCR territory, jointly form the PCR of 42;
Decoder PCR treatment step comprises following substep:
S201: at first utilize PCR to recover the 27MHz system clock of with encoder, synchronizeing;
S202: after the recovery system clock, the decoding that utilizes DTS, PTS in PES stream to carry out between audio frequency and video is synchronous, utilizes simultaneously VBV_Delay that the buffering duration of decoder is set;
S203: start decoder and initially decode.
Further, the synchronous step of the described decoding of step S202 comprises following substep:
S2021: decoder solves PCR from the packet header of input code flow, and it is sent into the time restore circuit of system;
S2022: new PCR of the every reception of system time restore circuit, just carry out a local system time clock recovery and phase-locked;
S2023: after the demodulation multiplexer demultiplexing, solve Presentation Time Stamp PTS and Decoding Time Stamp DTS from PES packet header, and send in the Basic Flow decoder;
S2024: after the Basic Flow decoder receives PTS and DTS, deposit in corresponding FIFO and manage; , for the display unit that there is no PTS and DTS, its time label is carried out interpolation, and send in FIFO;
S2025: each display unit compares with corresponding system clock STC with its corresponding PTS, DTS before starting decoding, only at system clock STC, with PTS, when DTS equates, just starts decoding.
The invention has the beneficial effects as follows: the present invention can effectively reduce operation times, reduces PCR and proofreaies and correct the processing complexity.
Description of drawings
Fig. 1 is the position view of network machine top box PCR in the TS packet;
Fig. 2 is PCR correction processing unit structural representation block diagram in encoder;
Fig. 3 is the structural representation that contains the TS stream bag of PCR;
Fig. 4 is PCR correction processing unit structural representation block diagram in decoder.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail, but protection scope of the present invention is not limited to the following stated.
PCR (Program Clock Reference) is Program Clock Reference, and Main Function is the benchmark parameter as video decode in when decoding, carries out synchronizeing of receiving terminal audio frequency and video and transmitting terminal audio frequency and video.
The position of PCR in the TS packet as shown in Figure 1, the coding that comprises 6 bytes in the self adaptation district in packet header, be used for producing the reference clock of decoder, utilize the reference clock of known program, can make the decoded video of digital TV set-top box export the signal end that is locked in the Video coding input, in multiplexer/encoder, program clock is locked in incoming video signal.Standard Definition Television SDTV(Standard Definition Television) transmission of video reference clock is 27MHz(50Hz, 625 row or 59.94Hz, 525 row), program clock is also just 27MHz.PCR inserts packet header with fixing frequency, represents the clock of input source coding side, and the bit rate output of reflection coding, and receiving terminal is adjusted the clock frequency of decoding end according to PCR, to guarantee being correctly decoded video flowing.
Network machine top box PCR proofreaies and correct treatment system, comprises coding PCR correction processing unit and decoding PCR correction processing unit; Network machine top box PCR correction processing method, comprise an encoder PCR treatment step and a decoder PCR treatment step.
As shown in Figure 2, coding PCR correction processing unit comprises video compression coding module, video PES package module, audio compression coding module, audio frequency PES package module, clock pulse generation module and program multiplexing device, the output of video compression coding module is connected with the program multiplexing device by video PES package module, and the output of audio compression coding module is connected with the program multiplexing device by audio frequency PES package module; The first via output of clock pulse generation module is connected with counter A, and counter A is connected with the program multiplexing device; The second tunnel output of clock pulse generation module is connected with counter B by frequency divider a, and the road output of counter B is connected with video PES package module, and another road output of counter B is connected with audio frequency PES package module; The Third Road output of clock pulse generation module is connected with the video compression coding module, and the output of clock pulse generation module De Disi road is connected with the audio compression coding module;
In encoder PCR treatment step, in transport stream, the decoding of multi-channel program has oneself time origin independently, PCR also divides two-way to encode: the direct flip-flop number A of the 27MHz pulse that a route clock pulse generation module produces generates extension field PCR_ext, and length is 9bits; Produce the 90kHz pulse after another Lu Jingyi 300 frequency divider a, send into 33 digit counter B and generate the 90kHz base value, list PCR_base in, length 33bits, be used for and PTS/DTS compares, and produces the decoding of user's receiving terminal and the synchronizing signal of demonstration, form the PCR territory, jointly form the PCR of 42.
The numerical value that is coded in PCR (i) has represented t (i), and i refers to comprise last byte of PCR_base field.Concrete regulation is as follows:
PCR_base (i)=((system clock frequency * t (i))) DIV300) %2
PCR_ext (i)=((system clock frequency * t (i)) DIV1) %300
PCR(i)=PCR_base(i)*300+PCR_ext(i)
Contain PCR TS stream bag structure as shown in Figure 3.
As shown in Figure 4, decoding PCR correction processing unit comprises demodulation multiplexer, RID filtering module, PCR computing module, LP gain control module, video and audio CD disc VCD, video decode module, audio decoder module and synchronously simulating AV output module, the output of demodulation multiplexer is connected with the PID filtering module, one tunnel output of PID filtering module is connected with the input of video and audio CD disc VCD with the LP gain control module by PCR computing module, comparator successively, and the output of PCR computing module also is connected with counter C by the initialization loading module; The video PES output of PID filtering module is successively by video cache and video decode module and synchronously simulating AV output, and the audio frequency PES output of PID filtering module is successively by audio frequency buffer memory and audio decoder module and synchronously simulating AV output;
The first via output of described video and audio CD disc VCD is connected with counter C, the second tunnel output of video and audio CD disc VCD is connected with counter D by frequency divider b, the output of counter D connects respectively video cache and audio frequency buffer memory, and the output of video and audio CD disc VCD also is connected with video decode module, audio decoder module respectively.
Decoder PCR treatment step comprises following substep:
S201: at first utilize PCR to recover the 27MHz system clock of with encoder, synchronizeing;
S202: after the recovery system clock, the decoding that utilizes DTS, PTS in PES stream to carry out between audio frequency and video is synchronous, utilizes simultaneously VBV_Delay that the buffering duration of decoder is set;
S203: start decoder and initially decode.
Concrete, the synchronous step of the described decoding of step S202 comprises following substep:
S2021: decoder solves PCR from the packet header of input code flow, and it is sent into the time restore circuit of system;
S2022: new PCR of the every reception of system time restore circuit, just carry out a local system time clock recovery and phase-locked;
S2023: after the demodulation multiplexer demultiplexing, solve Presentation Time Stamp PTS and Decoding Time Stamp DTS from PES packet header, and send in the Basic Flow decoder;
S2024: after the Basic Flow decoder receives PTS and DTS, deposit in corresponding FIFO and manage; , for the display unit that there is no PTS and DTS, its time label is carried out interpolation, and send in FIFO;
S2025: each display unit compares with corresponding system clock STC with its corresponding PTS, DTS before starting decoding, only at system clock STC, with PTS, when DTS equates, just starts decoding.
The PCR tolerance is the limits of error that receive PCR, this error can by initial p CR value and in multiplexed process again the modification to PCR cause, do not comprise that the grouping that network jitter causes arrives time error, the tolerance of PCR has limited the PCR mistake of the storage copy of a transmission stream, in general, the tolerance of PCR is ± 500ns.
Claims (3)
1. network machine top box PCR proofreaies and correct treatment system, it is characterized in that: it comprises coding PCR correction processing unit and decoding PCR correction processing unit:
Coding PCR correction processing unit comprises video compression coding module, video PES package module, audio compression coding module, audio frequency PES package module, clock pulse generation module and program multiplexing device, the output of video compression coding module is connected with the program multiplexing device by video PES package module, and the output of audio compression coding module is connected with the program multiplexing device by audio frequency PES package module; The first via output of clock pulse generation module is connected with counter A, and counter A is connected with the program multiplexing device; The second tunnel output of clock pulse generation module is connected with counter B by frequency divider a, and the road output of counter B is connected with video PES package module, and another road output of counter B is connected with audio frequency PES package module; The Third Road output of clock pulse generation module is connected with the video compression coding module, and the output of clock pulse generation module De Disi road is connected with the audio compression coding module;
Decoding PCR correction processing unit comprises demodulation multiplexer, RID filtering module, PCR computing module, LP gain control module, video and audio CD disc VCD, video decode module, audio decoder module and synchronously simulating AV output module, the output of demodulation multiplexer is connected with the PID filtering module, one tunnel output of PID filtering module is connected with the input of video and audio CD disc VCD with the LP gain control module by PCR computing module, comparator successively, and the output of PCR computing module also is connected with counter C by the initialization loading module; The video PES output of PID filtering module is successively by video cache and video decode module and synchronously simulating AV output, and the audio frequency PES output of PID filtering module is successively by audio frequency buffer memory and audio decoder module and synchronously simulating AV output;
The first via output of described video and audio CD disc VCD is connected with counter C, the second tunnel output of video and audio CD disc VCD is connected with counter D by frequency divider b, the output of counter D connects respectively video cache and audio frequency buffer memory, and the output of video and audio CD disc VCD also is connected with video decode module, audio decoder module respectively.
2. network machine top box PCR correction processing method, it is characterized in that: it comprises an encoder PCR treatment step and a decoder PCR treatment step:
In encoder PCR treatment step, PCR divides two-way to encode: the direct flip-flop number A of the 27MHz pulse that a route clock pulse generation module produces generates extension field PCR_ext, and length is 9bits; Produce the 90kHz pulse after another Lu Jingyi 300 frequency divider a, send into 33 digit counter B and generate the 90kHz base value, list PCR_base in, length 33bits, be used for and PTS/DTS compares, and produces the decoding of user's receiving terminal and the synchronizing signal of demonstration, form the PCR territory, jointly form the PCR of 42;
Decoder PCR treatment step comprises following substep:
S201: at first utilize PCR to recover the 27MHz system clock of with encoder, synchronizeing;
S202: after the recovery system clock, the decoding that utilizes DTS, PTS in PES stream to carry out between audio frequency and video is synchronous, utilizes simultaneously VBV_Delay that the buffering duration of decoder is set;
S203: start decoder and initially decode.
3. network machine top box PCR correction processing method according to claim 2, it is characterized in that: the synchronous step of the described decoding of step S202 comprises following substep:
S2021: decoder solves PCR from the packet header of input code flow, and it is sent into the time restore circuit of system;
S2022: new PCR of the every reception of system time restore circuit, just carry out a local system time clock recovery and phase-locked;
S2023: after the demodulation multiplexer demultiplexing, solve Presentation Time Stamp PTS and Decoding Time Stamp DTS from PES packet header, and send in the Basic Flow decoder;
S2024: after the Basic Flow decoder receives PTS and DTS, deposit in corresponding FIFO and manage; , for the display unit that there is no PTS and DTS, its time label is carried out interpolation, and send in FIFO;
S2025: each display unit compares with corresponding system clock STC with its corresponding PTS, DTS before starting decoding, only at system clock STC, with PTS, when DTS equates, just starts decoding.
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