CN103377688B - The wiring method of serial interface flash memory device and status register thereof - Google Patents
The wiring method of serial interface flash memory device and status register thereof Download PDFInfo
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- CN103377688B CN103377688B CN201210112114.6A CN201210112114A CN103377688B CN 103377688 B CN103377688 B CN 103377688B CN 201210112114 A CN201210112114 A CN 201210112114A CN 103377688 B CN103377688 B CN 103377688B
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Abstract
The wiring method of a kind of serial interface flash memory device and status register thereof; wherein; the wiring method of status register comprises: the write order of the more new data of accepting state buffer; and judge whether the write protection data of status register are updated according to more new data; the renewal write protection data of more new data are write in the latch unit of volatibility, and sets more new logo.Then, when serial interface flash memory device enters power-off program, then according to more new logo is by the data write state buffer in latch unit, wherein, status register is made up of non-volatile memory device.
Description
Technical field
The invention relates to a kind of serial interface flash memory device (SerialInterfaceFlashMemoryApparatus), and relate to a kind of wiring method of status register of serial interface flash memory device especially.
Background technology
At serial peripheral interface (SerialPeripheralInterface, SPI) a status register (statusregister is had in NOR type flash memory, SR), this status register is constructed by multiple flash memory cell, and in order to store the data of multiple, these data stored can carry out the reading of status register or the action of renewal by user by the instruction of access.
In the data of multiple that above-mentioned status register stores, comprise so-called write protection data.Whether the storage unit that write protection data are used in setting flash memory can be carried out Data Update action.In the practical application of flash memory, regular being updated of write protection data in status register.But; because status register utilizes the multiple storage unit in flash memory to build, therefore, the regular action be updated of write protection data; be easy to the phenomenon that the status register in flash memory is damaged, the life cycle of flash memory is declined to a great extent.
Summary of the invention
The invention provides a kind of wiring method of status register, be applicable to serial interface flash memory device, that effectively reduces non-volatile status register is updated number of times.
The invention provides a kind of serial interface flash memory device, that effectively reduces its non-volatile status register is updated number of times.
The present invention proposes a kind of wiring method of status register; be applicable to serial interface flash memory device; comprise: the write order of the more new data of accepting state buffer; and judge whether the write protection data of status register are updated according to more new data; the renewal write protection data of more new data are write in the latch unit of volatibility, and sets more new logo.Then, when serial interface flash memory device enters power-off program, then according to more new logo is by the data write state buffer in latch unit, wherein, status register is made up of non-volatile memory device.
The present invention also proposes a kind of serial interface flash memory device, comprises status register, latch unit, instruction control unit and write control circuit.Status register is made up of non-volatile memory device, comprises and at least stores write protection data.Latch unit is made up of the memory element of volatibility.Instruction control unit, coupling access status buffer and this latch unit, the write order of the more new data of accepting state buffer, and judge whether the write protection data of status register are updated according to more new data.Renewal write protection data in more new data write in latch unit by instruction control unit, and set more new logo.Write control circuit coupling access status buffer and instruction control unit, write control circuit when serial interface flash memory device enters power-off program, according to more new logo by the data write state buffer in this latch unit.
Based on technique scheme; the present invention is when serial interface flash memory device is activated; when being updated when the write protection data of status register; the write protection data of renewal are write in advance the memory element latch unit of volatibility; and when serial interface flash memory device enters power-off program, just by the Data Update in latch unit in status register.Thus, the status register constructed by non-volatile memory device can reduce its number of times be updated, and promotes its life cycle.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate appended accompanying drawing to be described in detail below.
Accompanying drawing explanation
Fig. 1 illustrates the schematic diagram of the serial interface flash memory device 100 of one embodiment of the invention.
Fig. 2 illustrates the process flow diagram of the wiring method of the status register of the embodiment of the present invention.
Fig. 3 A and Fig. 3 B illustrates the process flow diagram of the wiring method of the status register of another embodiment of the present invention.
[main element symbol description]
100: serial interface flash memory device;
110: status register;
120: latch unit;
130: instruction control unit;
140: write control circuit;
150: voltage detector;
171: memory cell array;
172: column address decoder;
173: row address decoder;
/ HOLD, CLK ,/CS ,/WP: external control signal;
DI, DO: data-signal;
WPN: write-enable signal;
VCC: operating voltage;
PDA: power-off enabling signal;
S210 ~ S230, S310 ~ S370: the write step of status register.
Embodiment
Please refer to Fig. 1, Fig. 1 illustrates the schematic diagram of the serial interface flash memory device 100 of one embodiment of the invention.In the present embodiment, serial interface flash memory device 100 is such as the storage arrangement of serial peripheral interface.Serial interface flash memory device 100 comprises status register 110, latch unit 120, instruction control unit 130, write control circuit 140, voltage detector 150, memory cell array 171, column address decoder (columnaddressdecoder) 172 and row address decoder (rowaddressdecoder) 173.Status register 110 is made up of non-volatile memory device; and for storing the data of multiple; for example, status register 110 can store about different data such as the setting data of write protection data, quaternary serial peripheral interface, Safe Cache device locking data and write/programming halted state etc.
Instruction control unit 130 is coupled to status register 110.Instruction control unit 130 separately passes external control signal/HOLD, the CLK ,/CS and data-signal DI and DO of the multiple serial peripheral interface of receipts.Instruction control unit 130 reads according to external control signal/HOLD, the CLK of serial peripheral interface ,/CS and data-signal DI the order data that user assigns, received order data is carried out decoding by instruction control unit 130, and according to the decode results obtained, order about serial interface flash memory device 100 and perform corresponding command action.Certainly, instruction control unit 130 also can carry out the write activity of data to memory cell array 171 according to external control signal/HOLD, the CLK of serial peripheral interface ,/CS and data-signal DI, or also can carry out the read action of data to memory cell array 171 according to external control signal/HOLD, the CLK of serial peripheral interface ,/CS and data-signal DO.Be relevant to the wave setting mode of external control signal/HOLD, the CLK of serial peripheral interface ,/CS and data-signal DI and DO, be then technology well known to those of ordinary skill in the art, seldom repeat for this reason at this.
Please note at this; in the present embodiment; when instruction control unit 130 receive by external control signal/HOLD, the CLK of serial peripheral interface ,/CS and data-signal DI transmit to carry out the write order of more new data to status register 110 time, whether the write protection data that instruction control unit 130 judges in status register 110 according to reached more new data will be updated.If when the write protection data in status register 110 will be updated; then the write protection data that will upgrade write protection data in more new data are write in latch unit 120, and set more new logo (such as making more new logo equal logic level " 1 ").At this; instruction control unit 130 can be come by the write protection data of status register 110 original storage and renewal write protection data more in new data are compared; if have one or more position to be not identical when upgrading write protection data with original write protection data, namely instruction control unit 130 can carry out upgrading write protection data write latch unit 120 and setting the action of more new logo.
Latch unit 120 couples mutually with instruction control unit 130, noticeable, and latch unit 120 is constructed by the memory element of volatibility.In simple terms, latch unit 120 can be provided by the static memory configured in serial interface flash memory device 100, or is built by multiple logic gates (such as flip-flop and/or latch unit logic gate) of the breech locked data configured in serial interface flash memory device 100.
Write control circuit 140 is coupled to status register 110, and write control circuit 140 receives external control signal/WP, and write control circuit 140 and status register 110 receive write-enable signal WPN jointly.Write control circuit 140, when write-enable signal WPN is designated as write-enable state, can perform the action of data write to status register 110.Please note; in the write order judging to accept when instruction control unit 130; when only one or more positions of the write protection data of status register 110 being upgraded; it is disabled state that instruction control unit 130 can order about write-enable signal WPN, and write control circuit 140 pairs of status registers 110 of forbidding manufacture perform write activity.And can be write in latch unit 120 by instruction control unit 130 owing to upgrading write protection data, therefore, serial interface flash memory device 100 can obtain up-to-date write protection data by latch unit 120, to maintain its normal action.
Thus, the status register 110 constructed by non-volatile memory device just can reduce its number of times be written into, and extends its life cycle.
Subsidiary one carries; when instruction control unit 130 judges the write order that accepts; when the write protection data of status register 110 and other data are upgraded simultaneously; instruction control unit 130 setting write-enable signal WPN is disabled state; and order about write control circuit 140 will more in new data, the part of write-not protected data is updated in status register 110.Further, the write protection data division in status register 110 is not upgraded, but renewal write protection data are write to by latch unit 120.In addition; if instruction control unit 130 judges the write order accepted; when only other data outside the write protection data of status register 110 being upgraded; instruction control unit 130 setting write-enable signal WPN is enabled state, and other data of ordering about write control circuit 140 pairs of write-not protected datas upgrade.
For guaranteeing that the renewal write protection data be updated are unlikely to lose, instruction control unit 130 can when serial interface flash memory device 100 enters power-off program, according to the value of more new logo by the data write state buffer 110 that stores in latch unit 120.That is, the renewal write protection data of the final updating stored in latch unit 120 before serial interface flash memory device 100 completely power-off, can be written in status register 110 by instruction control unit 130.Thus, after serial interface flash memory device 100 power-off, the write protection data of last state effectively can be stored in unlikely loss in non-volatile status register 110.
In the present embodiment, by power-off enabling signal PDA, instruction control unit 130 can know whether serial interface flash memory device 100 has entered power-off program.And power-off enabling signal PDA can be produced by voltage detector 150.Wherein, voltage detector 150 is coupled to instruction control unit 130, and voltage detector 150 also receives the operating voltage VCC of serial interface flash memory device 100.Voltage detector 150 can be monitored for the voltage level of operating voltage VCC, and voltage detector 150 also drops to lower than producing the power-off enabling signal PDA indicating serial interface flash memory device 100 to enter power-off program during preset critical at the magnitude of voltage as operating voltage VCC.Subsidiary one carries, and above-mentioned preset critical can set according to the voltage level of operating voltage VCC by deviser.In simple terms, the ratio of the voltage level of default threshold value and operating voltage VCC can be R1, and R1 is wherein less than 1.
Below please refer to Fig. 2, Fig. 2 illustrates the process flow diagram of the wiring method of the status register of the embodiment of the present invention.The present embodiment is applicable to serial interface flash memory device; its step comprises: first; the write order of the more new data of accepting state buffer in step S210; then; in step S220; judge whether the write protection data of status register are updated according to more new data, and write in the latch unit of volatibility according to the renewal write protection data of judged result by more new data, and set more new logo.It should be noted that; write protection data are not defined as the data only having a position; write protection data also can be multiple position (such as four positions); and when having any one in write protection data or multiple position is updated; the write protection data upgraded all can be written into latch unit, and more new logo also can correspondence be set.
In step S230, then perform the detecting action whether serial interface flash memory device enters power-off program, and when entering power-off program when serial interface flash memory device, foundation more new logo by the data write state buffer in latch unit.That is; when serial interface flash memory device enters power-off program; if detect to upgrade and be designated the state be set; represent that the write protection data in status register should be not identical with the data in latch unit; therefore; data in latch unit can be write in status register at this moment, to prevent the write protection loss of data of final updating.
Below the flow process example lifting an actual act again, to further illustrate feature of the present invention, makes those of ordinary skill in the art more can understand feature of the present invention, and obtains tool to implement.
Please refer to the process flow diagram that Fig. 3 A and Fig. 3 B, Fig. 3 A and Fig. 3 B illustrates the wiring method of the status register of another embodiment of the present invention.Please also refer to Fig. 3 A, in step S310, perform the write order of the more new data of accepting state buffer, and under write protection data have the state be updated, perform step S320 write protection data to be write in latch unit.In addition; state then for more new logo in step S330 judges; if upgrade and be designated the non-state (equaling logic level " 0 ") be set; then represent that write protection data first time is set; therefore; perform step S340 to set more new logo (being set as logic level " 1 "), and the content of deleting status register is ready to be updated at any time to make status register.Contrary, if step S330 judges to upgrade the state (equaling logic level " 1 ") being designated and being set, then represent that write protection data non-first time is required to upgrade, and without the need to performing step S340.
Then please refer to Fig. 3 B again, in step S350, compare for the operating voltage of serial interface flash memory device and default threshold value, and perform step S360 when being less than default threshold value when operating voltage.Relative, if when operating voltage continues to be not less than default threshold value, then maintain the comparison of operating voltage and default threshold value.In step S360, then judge more whether new logo equals logic level " 1 ", if so, then perform step S370 with by the Data Update in latch unit in status register.Relative, if when judging in step S360 that more new logo not equals logic level " 1 ", then terminate the execution of the present embodiment.
Subsidiary one carries, owing to the data of status register being deleted in the step S340 of Fig. 3 A, therefore, when the step S370 of Fig. 3 B then still can support that serial interface flash memory device carries out action at operating voltage fast, just complete the action upgrading status register.In addition, the data of deleting in the step S340 of Fig. 3 A can be only the parts of the write protection data in status register.
In sum, the present invention is not directly stored in status register by the write protection data stored by the status register of serial interface flash memory device, and by the latch unit of write protection data write volatibility.Further, when serial interface flash memory device enters power-off program, then by the Data Update in latch unit in status register.Thus; may by under the situation that repeatedly resets in write protection data; status register can carry out the update action of corresponding same number; only need serial interface flash memory device perform power-off program time carry out once be written into action, effectively can promote the life-span of non-volatile status register.
Although the present invention with embodiment openly as above; so itself and be not used to limit the present invention; those of ordinary skill in any art; without departing from the spirit and scope of the present invention; when doing change and the modification of part, therefore protection scope of the present invention is when being as the criterion depending on the claim person of defining.
Claims (16)
1. a wiring method for status register, is applicable to One serial interface flash memory device, comprises:
By a serial peripheral interface receive a status register one more new data one write order;
According to this more new data write protection data upgraded to write protection data and one compare, judge whether these write protection data of this status register are updated, these renewal write protection data of this more new data are write in a latch unit of volatibility, and sets a more new logo; And
When this serial interface flash memory device enters a power-off program, according to this more new logo the data in this latch unit are write in this status register,
Wherein, this status register is made up of non-volatile memory device.
2. the wiring method of status register according to claim 1, wherein according to this more new data judge that the step whether these write protection data of this status register are updated comprises:
When these write protection data of this status register are updated at least partially, these write protection data are write in this latch unit, and set this more new logo.
3. the wiring method of status register according to claim 2, wherein according to this more new data judge that the step whether these write protection data of this status register are updated also comprises:
The part of these more these write protection data non-of new data is updated in this status register.
4. the wiring method of status register according to claim 1, wherein according to this more new data judge that the step whether these write protection data of this status register are updated comprises:
When these write protection data of this status register are not updated, by this renewal Data Update in this status register.
5. the wiring method of status register according to claim 1, wherein also comprises:
Detect the decline state of the operating voltage that this serial interface flash memory device receives, and use and judge whether this serial interface flash memory device enters this power-off program.
6. the wiring method of status register according to claim 5, wherein when this operating voltage is less than a default threshold value, judges that this serial interface flash memory device enters this power-off program.
7. the wiring method of status register according to claim 6, wherein, when serial interface flash memory device enters this power-off program, according to this more new logo the step that the data in this latch unit write in this status register is comprised:
When this renewal is designated set condition, the data in this latch unit are write this status register.
8. the wiring method of status register according to claim 1; wherein according to this more new data judge whether these write protection data of this status register are updated; by this more the writing at least partially in this latch unit of volatibility of new data, and the step setting this more new logo also comprises:
When this renewal is designated the state be set, delete the data in this status register.
9. a serial interface flash memory device, comprising:
One status register, is made up of non-volatile memory device, at least storing write protection data;
One latch unit, is made up of the memory element of volatibility;
One instruction control unit, couple this status register and this latch unit, by a serial peripheral interface receive this status register one more new data one write order, and according to this more new data write protection data upgraded to write protection data and one compare, judge whether these write protection data of this status register are updated, these renewal write protection data in this more new data to be write in this latch unit, and set a more new logo; And
One write control circuit, couples this status register and this instruction control unit, this write control circuit when this serial interface flash memory device enters a power-off program, according to this more new logo the data in this latch unit are write in this status register.
10. serial interface flash memory device according to claim 9, wherein this instruction control unit is when these write protection data of this status register are updated at least partially, these write protection data is write in this latch unit, and sets this more new logo.
11. serial interface flash memory devices according to claim 10, wherein the part of these more these write protection data non-of new data is also updated in this status register by this write control circuit.
12. serial interface flash memory devices according to claim the 9, when these write protection data of this status register are not updated, this instruction control unit by this renewal Data Update in this status register.
13. serial interface flash memory devices according to claim 9, wherein also comprise:
One voltage detector, couples this instruction control unit and receives this serial interface flash memory device one operating voltage, and this voltage detector is according to detecting the decline state of this operating voltage to judge whether this serial interface flash memory device enters this power-off program.
14. serial interface flash memory devices according to claim 13, wherein this voltage detector detects this operating voltage when being less than a default threshold value, judges that this serial interface flash memory device enters this power-off program.
15. serial interface flash memory devices according to claim 14, wherein, enter this power-off program at this serial interface flash memory device, and when this renewal is designated set condition, the data in this latch unit are write this status register by this write control circuit.
16. serial interface flash memory devices according to claim 9, wherein when this renewal is designated the state be set, this instruction control unit deletes the data in this status register.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1455337A (en) * | 2003-05-29 | 2003-11-12 | 无敌科技(西安)有限公司 | Memory operating method and device |
| CN101399084A (en) * | 2007-09-28 | 2009-04-01 | 旺宏电子股份有限公司 | Memory devices |
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| US20060069848A1 (en) * | 2004-09-30 | 2006-03-30 | Nalawadi Rajeev K | Flash emulation using hard disk |
| US8169839B2 (en) * | 2009-02-11 | 2012-05-01 | Stec, Inc. | Flash backed DRAM module including logic for isolating the DRAM |
| US8489907B2 (en) * | 2009-09-16 | 2013-07-16 | Apple Inc. | Method of selective power cycling of components in a memory device independently by reducing power to a memory array or memory controller |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1455337A (en) * | 2003-05-29 | 2003-11-12 | 无敌科技(西安)有限公司 | Memory operating method and device |
| CN101399084A (en) * | 2007-09-28 | 2009-04-01 | 旺宏电子股份有限公司 | Memory devices |
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