CN103368580A

CN103368580A - Parallel-to-serial structure-based single pulse time domain amplifier

Info

Publication number: CN103368580A
Application number: CN201310288068XA
Authority: CN
Inventors: 王小松; 张海英
Original assignee: Jiangsu IoT Research and Development Center
Current assignee: Jiangsu IoT Research and Development Center
Priority date: 2013-07-09
Filing date: 2013-07-09
Publication date: 2013-10-23

Abstract

The invention relates to a parallel-to-serial structure-based single pulse time domain amplifier. The parallel-to-serial structure-based single pulse time domain amplifier comprises a digital gain control unit used for controlling the on-off states of gain selection switches, n gain selection switches which are connected in parallel, and a parallel pulse-to-single pulse converter, wherein the n is a positive integer greater than 1; the parallel pulse-to-single pulse converter comprises n signal input ports and a signal output port; and the signal input ports are respectively in one-to-one correspondence with the gain selection switches. The parallel pulse-to-single pulse converter converts a single pulse signal which is input in a parallel way into a single pulse which is output in a serial way. By the time domain amplifier disclosed by the invention, a time amplification gain value which is linear and accurate and can be set dynamically can be realized; and the conversion rate of the TDC (time-digital converter) can be improved by applying the time domain amplifier to the TDC.

Description

Based on and walk to the pulse time domain amplifier of serial structure

Technical field

The present invention relates to a kind of for the time meta-digital quantizer (TDC) time domain amplifier (time amplifier), especially a kind of based on and walk to the pulse time domain amplifier of serial structure.

Background technology

The digitrend (as: all-digital phase-locked loop ADPLL and time-domain mode number converter ADC) of simulation, mixed signal circuit is so that time domain to numeric field transducer (TDC) becomes more and more important.In ADPLL, TDC and digital loop filters (DLF) have been substituted traditional analog circuit (charge pump and loop filter); In time-domain mode number converter ADC, voltage to time domain converter (V2T) and TDC then replaced the voltage domain comparator.

Because these circuit major parts realize based on digital technology, so along with the progress of CMOS technology, their performance can be improved.Yet owing to lacking the TDC of high accuracy, two-forty, the performance of these circuit is not greatly improved as expection.Therefore, precision and the speed of raising TDC become one of focus of current academia and industrial quarters.

At present, in order to obtain high accuracy, two-forty TDC, its general solution is to adopt the time domain amplifier.Be similar to the voltage domain amplifier and little voltage difference can be enlarged into large voltage difference, the time domain amplifier can be enlarged into the little time difference the large time difference.So the time domain amplifier can be used for improving precision and the transfer ratio of TDC, just as the voltage domain amplifier the application in the high-precision adc.

For this reason, there is the researcher to propose dissimilar time domain amplifier.At document [Time difference amplifier] and [A 9b, 1.25ps resolution coarse-fine time-to-digital converter in 90nm CMOS that amplifies a time residue] in, the time domain amplifier becomes the SR latch that postpones when inputting by adopting to be realized.As shown in Figure 2, the SR latch works in metastable zone, but its shortcoming is: the 1. unpredictable and inaccuracy of the gain of this time domain amplifier; 2. owing to its meta-stable behavior, so need to proofread and correct; 3. input the range of linearity very little, gain immutable.

Document [A 1.25ps resolution 8b cyclic TDC in 0.13 μ m CMOS] has proposed a kind of different metastable state time domain amplifier, as shown in Figure 3.Although also adopting, this circuit is similar to cross coupling structure shown in Figure 2, but its gain is easy to control relatively, because its gain decides by the different discharge capacities that arrange between two discharge paths, gain is approximately 2, owing to being the cross-coupled structure, still there is the problem of gain inexactness and input range of linearity deficiency in this circuit, so also need to proofread and correct.

Document [A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging] another time domain amplifier proposed, as shown in Figure 4, it is different from the two kinds of time domain amplifiers in front, by adopting cross-couplings chain of delay and the difference in their transmission times, obtain the amplification of time.But the problem that this structure also exists non-linear gain and needs DLL to proofread and correct simultaneously, gains immutable.

In order in wide input range, to obtain linear, accurate and variable gain, document [A 7bit, 3.75ps resolution two-step time-to-digital converter in 65nm CMOS using pulse-train time amplifier] a kind of pulse train time domain amplifier has been proposed, as shown in Figure 5.The basic thought of this structure is that the sequence that N identical pulse (pulse duration is Tin) consists of is equivalent to a wide pulse, and the pulse duration of this broad pulse is N * Tin.Pulse train has identical total pulse widths with broad pulse, therefore by this concept, can realize that the Tin pulse duration is enlarged into the pulse duration of N * Tin.But this time domain amplifier architecture is interpulse overlapping in the pulse train, and it needs sufficiently long time of delay, so this can cause the reduction of TDC switching rate.

In view of above background, need to propose a kind ofly can to satisfy the time domain amplifier architecture that in wide input range, can obtain linearity, accurate and variable gain and can improve the TDC switching rate of its application.

Summary of the invention

The objective of the invention is to overcome the deficiencies in the prior art, provide a kind of based on and walk to the pulse time domain amplifier of serial structure, this time domain amplifier in wide input range, can obtain linearity, accurately, capable of dynamic sets, variable gain.

According to technical scheme provided by the invention, described based on and walk to the pulse time domain amplifier of serial structure, comprise the digital gain control unit for ride gain selector switch break-make; Feature is: also comprise the individual gain-selector switch that is connected in parallel of n with also horizontal pulse is to the pulse transducer, n is the positive integer greater than 1; Described and horizontal pulse to pulse transducer comprises n signal input port and a signal output port, and signal input port connects one to one with gain-selector switch respectively.

Described and horizontal pulse is converted to the individual pulse signal of parallel mode input to the pulse transducer individual pulse of serial mode output.

Time domain amplifier of the present invention can be realized linearity, accurately and time gain amplifier value that can dynamic setting, and it is applied among the TDC, can so that the switching rate of TDC obtain to improve.

Description of drawings

Fig. 1 is based on the schematic diagram of the time domain amplifier of SR latch in the prior art.

Fig. 2 is the schematic diagram of the time domain amplifier of meta-stable behavior in the prior art.

Fig. 3 is based on the schematic diagram of the time domain amplifier of cross-couplings chain of delay in the prior art.

Fig. 4 is the schematic diagram of pulse train time domain amplifier of the prior art.

Fig. 5 is the schematic diagram of time domain amplifier of the present invention.

Fig. 6 is the working timing figure of time domain amplifier of the present invention.

Embodiment

The invention will be further described below in conjunction with concrete accompanying drawing.

As shown in Figure 5: described based on and the pulse time domain amplifier that walks to serial structure comprise a plurality of gain-selector switches that are connected in parallel (1,2 ... n-1, n, n are the positive integer greater than 1), digital gain control unit 4 and and horizontal pulse to pulse transducer 5; Described and horizontal pulse to pulse transducer 5 comprises n signal input port (i ₁, i ₂... i _N-1, i _n) and a signal output port O, signal input port connects one to one with gain-selector switch respectively;

The break-make of the control signal ride gain selector switch of described digital gain control unit 4 decides single pulse signal Tin to be input to also horizontal pulse to the number of pulse transducer 5 signal input parts, realizes change control that gains big or small with this.Described digital gain control unit 4 adopts single-chip microcomputer or host computer or the control of embedded-type ARM system.

Single narrow pulse signal (the L described and horizontal pulse is inputted parallel mode to pulse transducer 5 ₁, L ₂L _N-1, L _n) be converted to the single broad pulse of serial mode output, according to the single narrow pulse signal number n of parallel input, the single broad pulse Tout width of output be input single narrow pulse signal Tin width n doubly; Wherein, n is the yield value of time gain amplifier, the setting of can programming.

The working timing figure of time domain amplifier of the present invention as shown in Figure 6, gain-selector switch is controlled by the control signal of digital gain control unit 4 outputs respectively, if gain-selector switch conducting, then input single pulse signal Tin and be input to also horizontal pulse to pulse transducer 5 corresponding signal input ports, if gain-selector switch disconnects, corresponding and horizontal pulse to pulse transducer 5 input ports are low level.And horizontal pulse to the pulse transducer 5 pulse Tin that is input to its each input port that will walk abreast carries out serial conversion, export a pulse, the pulse duration of the pulse of output is according to the difference of the gain-selector switch number n of conducting and difference, and pulse duration is n * Tin.As shown in Figure 6, realized that pulse duration is that the pulse input of Tin is converted to the single broad pulse output that pulse duration is n * Tin, namely realized the amplification on the time-domain, the gain size is n, n is integer, conducting that can be by the ride gain selector switch or disconnect the setting of programming.

Claims

One kind based on and walk to the pulse time domain amplifier of serial structure, comprise the digital gain control unit (4) for ride gain selector switch break-make, it is characterized in that: also comprise the individual gain-selector switch that is connected in parallel of n with also horizontal pulse is to pulse transducer (5), n is the positive integer greater than 1; Described and horizontal pulse to pulse transducer (5) comprises n signal input port (i ₁, i ₂... i _N-1, i _n) and a signal output port (O), signal input port connects one to one with gain-selector switch respectively.
As claimed in claim 1 based on and walk to the pulse time domain amplifier of serial structure, it is characterized in that: described and horizontal pulse is to the individual pulse signal (L of pulse transducer (5) with the parallel mode input ₁, L ₂L _N-1, L _n) be converted to the individual pulse of serial mode output.