CN103368360B - A kind of switch power supply control method, switching power source control circuit and switch power supply - Google Patents
A kind of switch power supply control method, switching power source control circuit and switch power supply Download PDFInfo
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Abstract
Switch power supply control method disclosed by the invention, switching power source control circuit and switch power supply. according to described first control signal and the 2nd control signal, generate and send and drive described main power stage circuit to carry out the actuate signal started according to different frequency, even if when system is in light-load mode, described main power stage circuit can also carry out unlatching and the shutoff of corresponding frequencies according to described actuate signal, and sleep state can not be entered, and then the system that it also avoid is when light-load mode, the problem that the described main power stage circuit that brownout in output capacitance causes is low to the regulating power of output voltage, and avoid the noise that the frequency that described main power stage circuit starts can be reduced to the scope that people's ear can hear and produce.
Description
Technical field
The present invention relates to switch power technology field, particularly relate to a kind of switch power supply control method, switching power source control circuit and switch power supply.
Background technology
In the switch power supply adopting peak value comparison method mode, we adopt the reference as peak point current that outputs signal of error amplifier to measure usually, therefore, by arranging high clamp value and low clamp value for the output signal of error amplifier, it is possible to obtain maximum value and the minimum value of peak point current. When the output signal of error amplifier is by low clamper, expression system has entered light-load mode, and in the prior art, when system enters light-load mode, its most of module is in the sleep state of closedown.
This kind of control mode of prior art can save the power consumption of system works at light-load mode, but owing to, under light-load mode, the main power stage circuit of system enters sleep state and stops work, and the energy of load can only be provided by output capacitance; When the voltage in output capacitance is lower than certain value, system controls main power stage circuit according to feedback signal and restarts; When main power stage circuit is different to the response speed of feedback signal, the time of system recovery work also can be different; When response speed is slower, may there is too low situation in the voltage in output capacitance, now, is reduced by the regulating power of output voltage after being restarted by the main power stage circuit causing system. And, when response speed slow to a certain extent time, the frequency even causing the main power stage circuit of system to start can be reduced to the scope that people's ear can be heard, and then produces noise.
Summary of the invention
In view of this, the present invention provides a kind of switch power supply control method, switching power source control circuit and switch power supply, to solve prior art, output voltage regulating power is low and can produce the problem of noise.
In order to realize above-mentioned purpose, the existing scheme proposed is as follows:
A kind of switch power supply control method, for the main power stage circuit of trip switch power supply, comprises the following steps:
Receive output voltage feedback signal and the output voltage reference signal of described main power stage circuit, and described output voltage feedback signal and described output voltage reference signal are compared and enlarged, generate and send output voltage error signal;
Receive maximum output voltage error signal, instantaneous peak voltage signal, actuate signal and described output voltage error signal, when described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; And described output voltage error signal and instantaneous peak voltage signal are compared and generate comparative result, generate minimum ON time signal according to described actuate signal, and generate and send the first control signal according to described comparative result and described minimum ON time signal;
Receive minimum output voltage error signal and described output voltage error signal, described output voltage error signal and minimum output voltage error signal are compared, and generates and sends the 2nd control signal according to comparative result;
Receive described first control signal and the 2nd control signal, according to described first control signal and the 2nd control signal, generate and send described actuate signal to described main power stage circuit, drive described main power stage circuit to start according to different frequencies.
Preferably, when described output voltage error signal is greater than maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; Making described first control signal be significant condition when described peak voltage signal reaches described maximum output voltage error signal, the frequency of described 2nd control signal is fixed frequency; Taking the switching frequency of switching tube that controls in described main power circuit and ON time as fixed value, and the inductance peak point current controlled in described main power circuit is stabilized in maximum inductance peak point current.
Preferably, when described output voltage error signal is less than maximum output voltage error signal and is greater than minimum output voltage error signal, making described first control signal be significant condition when described peak voltage signal reaches described output voltage error signal, the frequency of described 2nd control signal is fixed frequency; Taking the switching frequency of switching tube that controls in described main power circuit as fixed value, but ON time follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit follows described output voltage error signal intensity.
Preferably, when described output voltage error signal is less than minimum output voltage error signal, described first control signal is made to be significant condition when the ON time of described switching tube reaches minimum ON time, output voltage error signal intensity described in the frequency following of described 2nd control signal; Taking the ON time of switching tube that controls in described main power circuit as fixed value, but switching frequency follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit is stabilized in minimum inductance peak point current.
Preferably, when described output voltage error signal is less than certain value, controls described main power circuit and enter sleep pattern.
A kind of switching power source control circuit, power stage circuit main with switch power supply is connected, and described switching power source control circuit comprises:
Error signal generation circuit, an input terminus of described error signal generation circuit as described switching power source control circuit input terminus, be connected with described main power stage circuit output terminal, receive output voltage feedback signal; Described error signal generation circuit also receives output voltage reference signal, and described output voltage feedback signal and described output voltage reference signal is compared and enlarged, and generates and sends output voltage error signal;
Peak value comparison method circuit, the input terminus of described peak value comparison method circuit is connected with described error signal generation circuit output terminal, receives described output voltage error signal; Described peak value comparison method circuit also receives maximum output voltage error signal, instantaneous peak voltage signal and actuate signal, when described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; And described output voltage error signal and instantaneous peak voltage signal are compared and generate comparative result, generate minimum ON time signal according to described actuate signal, and generate and send the first control signal according to described comparative result and described minimum ON time signal;
Frequency control circuit, the input terminus of described frequency control circuit is connected with described error signal generation circuit output terminal, receives described output voltage error signal; Described frequency control circuit also receives minimum output voltage error signal, described output voltage error signal and minimum output voltage error signal is compared, and generates and sends the 2nd control signal according to comparative result;
Drive signal generation circuit, the first input terminus of described drive signal generation circuit is connected with described peak value comparison method circuit output end, receives described first control signal; 2nd output terminal of described drive signal generation circuit is connected with described frequency control circuit output end, receives described 2nd control signal; Described drive signal generation circuit is according to described first control signal and the 2nd control signal, generate and send described actuate signal to described peak value comparison method circuit and described main power stage circuit, driving described main power stage circuit to start according to different frequencies, the output terminal of described drive signal generation circuit is the output terminal of described switching power source control circuit.
Preferably, described error signal generation circuit comprises:
Error amplifier, the inverting input of described error amplifier, as described error signal generation circuit input terminus, receives described output voltage feedback signal; The in-phase input end of described error amplifier receives output voltage reference signal; The output terminal of described error amplifier is the output terminal of described error signal generation circuit, produces described output voltage error signal.
Preferably, described peak value comparison method circuit comprises:
First comparer, the inverting input of described first comparer, as described peak value comparison method circuit input end, receives described output voltage error signal, and the in-phase input end of described first comparer receives described instantaneous peak voltage signal;
High clamping circuit, one end of described high clamping circuit is connected with described first comparer inverting input, receives described output voltage error signal, and the other end of described high clamping circuit receives described maximum output voltage error signal; When described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal;
Time signal produces circuit, and the input terminus that described time signal produces circuit receives described actuate signal, and the output terminal that described time signal produces circuit exports described minimum ON time signal;
With door, the output terminal that the described input terminus with door produces circuit with described first comparer and described time signal respectively is connected, and the described output terminal with door is the output terminal of described peak value comparison method circuit, generates described first control signal; When described output voltage error signal is greater than maximum output voltage error signal, and when the described peak voltage signal of described first comparer reception reaches described maximum output voltage error signal, described described first control signal become with pupil is significant condition; When described output voltage error signal is less than maximum output voltage error signal and is greater than minimum output voltage error signal, and the described peak voltage signal that described first comparer receives is when reaching described output voltage error signal, described described first control signal become with pupil is significant condition; When described output voltage error signal is less than minimum output voltage error signal, and when the minimum ON time of described time signal generation circuit evolving is high level, described described first control signal become with pupil is significant condition.
Preferably, described high clamping circuit is the first diode;The positive pole of described first diode is connected with described first comparer inverting input, receives described output voltage error signal; The negative pole of described first diode receives described maximum output voltage error signal.
Preferably, described high clamping circuit comprises: mirror current source and voltage follow device;
One end of described mirror current source is connected with described first comparer inverting input, receives described output voltage error signal; The other end of described mirror current source is connected with the output terminal of described voltage follow device;
The in-phase input end of described voltage follow device receives described maximum output voltage error signal.
Preferably, described time signal generation circuit comprises:
Recommend circuit, described in recommend circuit and be connected between power supply and the current source of ground connection, described in recommend circuit input terminus receive described actuate signal;
Electric capacity, one end of described electric capacity is connected with the described output terminal recommending circuit, the other end ground connection of described electric capacity;
Schmidt trigger, the input terminus of described Schmidt trigger is connected with the described output terminal recommending circuit, and the output terminal of described Schmidt trigger exports described minimum ON time signal.
Preferably, described frequency control circuit comprises:
Operational transconductance amplifier (OTA), the inverting input of described operational transconductance amplifier (OTA), as described frequency control circuit input end, receives described output voltage error signal, and the in-phase input end of described operational transconductance amplifier (OTA) receives described minimum output voltage error signal; Described output voltage error signal and minimum output voltage error signal are compared, and exports comparative result;
One-way conduction circuit, the input terminus of described one-way conduction circuit is connected with described operational transconductance amplifier (OTA) output terminal, described one-way conduction circuit determines whether conducting according to the described comparative result received, and when described one-way conduction circuit conducting, is forwarded by described comparative result;
Vibrator, the input terminus of described vibrator is connected with the output terminal of described one-way conduction circuit, when described one-way conduction circuit conducting, receive described comparative result, and generate and send the 2nd control signal of output voltage error signal intensity described in frequency following according to described comparative result; When described one-way conduction circuit not conducting, the frequency of described 2nd control signal generated and sent is the natural frequency of described vibrator inside; The output terminal of described vibrator is the output terminal of described frequency control circuit.
Preferably, described drive signal generation circuit comprises: RS triggering device;
The reset end R of described RS triggering device is the first input terminus of described drive signal generation circuit;
The set end S of described RS triggering device is the 2nd input terminus of described drive signal generation circuit;
The output terminal Q of described RS triggering device is the output terminal of described drive signal generation circuit;
When described output voltage error signal is greater than maximum output voltage error signal, described RS triggering device controls the switching frequency of the switching tube in described main power circuit and ON time is fixed value, and the inductance peak point current controlled in described main power circuit is stabilized in maximum inductance peak point current.
When described output voltage error signal is less than maximum output voltage error signal and is greater than minimum output voltage error signal, it is fixed value that described RS triggering device controls the switching frequency of the switching tube in described main power circuit, but ON time follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit follows described output voltage error signal intensity.
When described output voltage error signal is less than minimum output voltage error signal, it is fixed value that described RS triggering device controls the ON time of the switching tube in described main power circuit, but switching frequency follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit is stabilized in minimum inductance peak point current.
When described output voltage error signal is less than certain value, described RS triggering device controls described main power circuit and enters sleep pattern.
A kind of switch power supply, comprises the switching power source control circuit described in main power stage circuit and above-mentioned any one.
As can be seen from above-mentioned technical scheme, switch power supply control method disclosed by the invention, according to described first control signal and the 2nd control signal, generate and send and drive described main power stage circuit to carry out the actuate signal started according to different frequency, even if when system is in light-load mode, described main power stage circuit can also carry out unlatching and the shutoff of corresponding frequencies according to described actuate signal, and sleep state can not be entered, and then the system that it also avoid is when light-load mode, the problem that the described main power stage circuit that brownout in output capacitance causes is low to the regulating power of output voltage, and avoid the noise that the frequency that described main power stage circuit starts can be reduced to the scope that people's ear can hear and produce.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, it is briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is switch power supply disclosed by the invention control method flow diagram;
Fig. 2 is disclosed another switch power supply control method flow diagram of another embodiment of the present invention;
Fig. 3 is disclosed another switch power supply control method flow diagram of another embodiment of the present invention;
Fig. 4 is disclosed another switch power supply control method flow diagram of another embodiment of the present invention;
Fig. 5 is disclosed another switch power supply control method flow diagram of another embodiment of the present invention;
Fig. 6 is the signal relation figure of switching power source control circuit disclosed in another embodiment of the present invention;
Fig. 7 is switch power supply circuit block diagram disclosed in another embodiment of the present invention;
Fig. 8 is switching power source control circuit structure iron disclosed in another embodiment of the present invention;
Fig. 9 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 10 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 11 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 12 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 13 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 14 is the schematic circuit diagram of one-way conduction circuit and vibrator disclosed in another embodiment of the present invention;
Figure 15 is the schematic circuit diagram of another embodiment of the present invention another one-way conduction circuit disclosed and vibrator;
Figure 16 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 17 is another embodiment of the present invention another switching power source control circuit structure iron disclosed;
Figure 18 is the signal waveforms of switching power source control circuit disclosed in another embodiment of the present invention;
Figure 19 is the signal waveforms of another embodiment of the present invention another switching power source control circuit disclosed.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only the present invention's part embodiment, instead of whole embodiments. Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.
The present invention provides a kind of switch power supply control method, for the main power stage circuit of trip switch power supply, to solve prior art, output voltage regulating power is low and can produce the problem of noise.
Concrete, as shown in Figure 1, comprise the following steps:
S101, the output voltage feedback signal FB and output voltage reference signal REF that receive described main power stage circuit, and output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generate and send output voltage error signal Ve;
Wherein, the output voltage error signal V generated according to output voltage feedback signal FB and output voltage reference signal REFe, it is possible to characterize the relation between output voltage feedback signal FB and output voltage reference signal REF of described main power stage circuit.
S102, receive maximum output voltage error signal VH, instantaneous peak voltage signal VIPK, actuate signal VqAnd output voltage error signal Ve, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare and generate comparative result, according to actuate signal VqGenerate minimum ON time signal Ton.min, and according to described comparative result and minimum ON time signal Ton.minGenerate and send the first control signal Vk1;
Wherein, maximum output voltage error signal VHOutput voltage error signal V when sign inductance peak point current is maximum inductance peak point currenteMagnitude of voltage; Instantaneous peak voltage signal VIPKCharacterize the magnitude of voltage that inductance peak point current is corresponding; Actuate signal VqGenerate by step S104.
S103, receive minimum output voltage error signal TH and output voltage error signal Ve, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2;
Wherein, output voltage error signal V when minimum output voltage error signal TH sign inductance peak point current is minimum inductance peak point currenteMagnitude of voltage; 2nd control signal Vk2Frequency depend on output voltage error signal VeWith the described comparative result of minimum output voltage error signal TH.
S104, receive the first control signal Vk1And the 2nd control signal Vk2, according to the first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo described main power stage circuit, described main power stage circuit is driven to start according to different frequencies;
Concrete, the first control signal Vk1And the 2nd control signal Vk2Frequency will determine actuate signal VqFrequency; The actuate signal V generatedqIt is used for feeding back to step S102 on the one hand, it is used on the other hand driving described main power stage circuit to start according to different frequencies, it is achieved to the control of described main power stage circuit.
Switch power supply control method disclosed in the present embodiment, according to the first control signal Vk1With the 2nd control signal Vk2, generate and send and drive described main power stage circuit to carry out the actuate signal V started according to different frequencyqEven if when system is in light-load mode, described main power stage circuit can also according to actuate signal VqCarry out unlatching and the shutoff of corresponding frequencies, and sleep state can not be entered, and then the system that it also avoid is when light-load mode, the problem that the described main power stage circuit that brownout in output capacitance causes is low to the regulating power of output voltage, and avoid the noise that the frequency that described main power stage circuit starts can be reduced to the scope that people's ear can hear and produce.
Another embodiment of the present invention additionally provides another switch power supply control method, as shown in Figure 2, comprises the following steps:
S201, the output voltage feedback signal FB and output voltage reference signal REF that receive described main power stage circuit, and output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generate and send output voltage error signal Ve;
S202, receive maximum output voltage error signal VH, instantaneous peak voltage signal VIPK, actuate signal VqAnd output voltage error signal Ve, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare and generate comparative result, according to actuate signal VqGenerate minimum ON time signal Ton.min, and according to described comparative result and minimum ON time signal Ton.minGenerate and send the first control signal Vk1; As output voltage error signal VeIt is greater than maximum output voltage error signal VH, and peak voltage signal VIPKReach maximum output voltage error signal VHTime, the first control signal Vk1For significant condition;
Concrete, peak voltage signal VIPKWhen described main power circuit starts be gradually on rise to peak value, then by peak-fall, until switching tube in described main power circuit turns off; In above process, as peak voltage signal VIPKReach maximum output voltage error signal VHTime, the first control signal Vk1For significant condition.
S203, receive minimum output voltage error signal TH and output voltage error signal Ve, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2; As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, the 2nd control signal Vk2Frequency be fixed frequency ff;
Concrete, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, illustrate that now system is in the fully loaded situation of load, the 2nd control signal Vk2Frequency be fixed frequency ff。
S204, receive the first control signal Vk1And the 2nd control signal Vk2, according to the first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo described main power stage circuit, described main power stage circuit is driven to start according to different frequencies; As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, actuate signal VqThe switching frequency and the ON time that control the switching tube in described main power circuit are fixed value, and control the inductance peak point current I in described main power circuitpkIt is stabilized in maximum inductance peak point current IpkH;
Concrete, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, illustrate that now system is in the fully loaded situation of load, according to the first control signal Vk1And the 2nd control signal Vk2The actuate signal V generatedq, drive the switching frequency of the switching tube in described main power stage circuit and ON time to be fixed value, and control the inductance peak point current I in described main power circuitpkIt is stabilized in maximum inductance peak point current IpkH。
In the present embodiment, other control methods are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switch power supply control method, as shown in Figure 3, comprises the following steps:
S301, the output voltage feedback signal FB and output voltage reference signal REF that receive described main power stage circuit, and output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generate and send output voltage error signal Ve;
S302, receive maximum output voltage error signal VH, instantaneous peak voltage signal VIPK, actuate signal VqAnd output voltage error signal Ve, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare and generate comparative result, according to actuate signal VqGenerate minimum ON time signal Ton.min, and according to described comparative result and minimum ON time signal Ton.minGenerate and send the first control signal Vk1; As output voltage error signal VeIt is less than maximum output voltage error signal VH, it is greater than minimum output voltage error signal TH, and peak voltage signal VIPKReach output voltage error signal VeTime, the first control signal Vk1For significant condition;
Concrete, peak voltage signal VIPKWhen described main power circuit starts be gradually on rise to peak value, then by peak-fall, until switching tube in described main power circuit turns off; In above process, as peak voltage signal VIPKReach output voltage error signal VeTime, the first control signal Vk1For significant condition.
S303, receive minimum output voltage error signal TH and output voltage error signal Ve, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2; As output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, the 2nd control signal Vk2Frequency be fixed frequency ff;
Concrete, as output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, illustrate that now system is in the situation of normal operation, the 2nd control signal Vk2Frequency be fixed frequency ff。
S304, receive the first control signal Vk1And the 2nd control signal Vk2, according to the first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo described main power stage circuit, described main power stage circuit is driven to start according to different frequencies; As output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, actuate signal VqThe switching frequency controlling the switching tube in described main power circuit is fixed value, but ON time follows output voltage error signal VeChange, and control the inductance peak point current I in described main power circuitpkFollow output voltage error signal VeChange;
Concrete, as output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, illustrate that now system is in the situation of normal operation, according to the first control signal Vk1And the 2nd control signal Vk2The actuate signal V generatedq, the switching frequency controlling the switching tube in described main power circuit is fixed value, but ON time follows output voltage error signal VeChange, and the inductance peak point current controlled in described main power circuit follows output voltage error signal VeChange.
In the present embodiment, other control methods are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switch power supply control method, as shown in Figure 4, comprises the following steps:
S401, the output voltage feedback signal FB and output voltage reference signal REF that receive described main power stage circuit, and output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generate and send output voltage error signal Ve;
S402, receive maximum output voltage error signal VH, instantaneous peak voltage signal VIPK, actuate signal VqAnd output voltage error signal Ve, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare and generate comparative result, according to actuate signal VqGenerate minimum ON time signal Ton.min, and according to described comparative result and minimum ON time signal Ton.minGenerate and send the first control signal Vk1; As output voltage error signal VeIt is less than minimum output voltage error signal TH, and the ON time of described switching tube reaches minimum ON time Ton.minTime, the first control signal Vk1For significant condition;
Concrete, peak voltage signal VIPKWhen described main power circuit starts be gradually on rise to peak value, then by peak-fall, until switching tube in described main power circuit turns off; In above process, when the ON time of described switching tube reaches minimum ON time Ton.minTime, the first control signal Vk1For significant condition.
S403, receive minimum output voltage error signal TH and output voltage error signal Ve, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2; As output voltage error signal VeWhen being less than minimum output voltage error signal TH, the 2nd control signal Vk2Frequency fvFollow output voltage error signal VeChange;
Concrete, as output voltage error signal VeWhen being less than minimum output voltage error signal TH, illustrate that now system is in the situation of light-load mode, the 2nd control signal Vk2Frequency fvFollow output voltage error signal VeChange.
S404, receive the first control signal Vk1And the 2nd control signal Vk2, according to the first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo described main power stage circuit, described main power stage circuit is driven to start according to different frequencies; As output voltage error signal VeWhen being less than minimum output voltage error signal TH, actuate signal VqThe ON time controlling the switching tube in described main power circuit is fixed value, but switching frequency follows output voltage error signal VeChange, and control the inductance peak point current I in described main power circuitpkIt is stabilized in minimum inductance peak point current IpkL;
Concrete, as output voltage error signal VeWhen being less than minimum output voltage error signal TH, illustrate that now system is in the situation of light-load mode, according to the first control signal Vk1And the 2nd control signal Vk2The actuate signal V generatedq, the switching frequency controlling the switching tube in described main power circuit follows output voltage error signal VeChange, the ON time of the switching tube in described main power circuit is fixed value, and controls the inductance peak point current I in described main power circuitpkIt is stabilized in minimum inductance peak point current IpkL。
In the present embodiment, other control methods are same as the previously described embodiments, repeat no more herein.
Preferably, another embodiment of the present invention additionally provides another switch power supply control method, as output voltage error signal VeWhen being less than certain value TS, control described main power circuit and enter sleep pattern.
In the present embodiment, other control methods are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switch power supply control method, as shown in Figure 5, comprises the following steps:
S501, the output voltage feedback signal FB and output voltage reference signal REF that receive described main power stage circuit, and output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generate and send output voltage error signal Ve;
S502, receive maximum output voltage error signal VH, instantaneous peak voltage signal VIPK, actuate signal VqAnd output voltage error signal Ve, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare and generate comparative result, according to actuate signal VqGenerate minimum ON time signal Ton.min, and according to described comparative result and minimum ON time signal Ton.minGenerate and send the first control signal Vk1; As output voltage error signal VeIt is greater than maximum output voltage error signal VH, and peak voltage signal VIPKReach maximum output voltage error signal VHTime, or as output voltage error signal VeIt is less than maximum output voltage error signal VHAnd be greater than minimum output voltage error signal TH, and peak voltage signal VIPKReach output voltage error signal VeTime, or as output voltage error signal VeIt is less than minimum output voltage error signal TH, and the ON time of described switching tube reaches minimum ON time Ton.minTime, the first control signal Vk1For significant condition;
S503, receive minimum output voltage error signal TH and output voltage error signal Ve, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2; As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, or as output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, the 2nd control signal Vk2Frequency be fixed frequency ff; As output voltage error signal VeWhen being less than minimum output voltage error signal TH, the 2nd control signal Vk2Frequency fvFollow output voltage error signal VeChange;
S504, receive the first control signal Vk1And the 2nd control signal Vk2, according to the first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo described main power stage circuit, described main power stage circuit is driven to start according to different frequencies; As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, actuate signal VqThe switching frequency and the ON time that control the switching tube in described main power circuit are fixed value, and control the inductance peak point current I in described main power circuitpkIt is stabilized in maximum inductance peak point current IpkH; As output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, actuate signal VqThe switching frequency controlling the switching tube in described main power circuit is fixed value, but ON time follows output voltage error signal VeChange, and control the inductance peak point current I in described main power circuitpkFollow output voltage error signal VeChange; As output voltage error signal VeWhen being less than minimum output voltage error signal TH, actuate signal VqThe ON time controlling the switching tube in described main power circuit is fixed value, but switching frequency follows output voltage error signal VeChange, and control the inductance peak point current I in described main power circuitpkIt is stabilized in minimum inductance peak point current IpkL; As output voltage error signal VeWhen being less than certain value TS, control described main power circuit and enter sleep pattern.
The graph of a relation that Fig. 6 show in said process between each signal.
In the present embodiment, other control methods are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switching power source control circuit, and as shown in Fig. 7 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises:
Error signal generation circuit 102, an input terminus of error signal generation circuit 102, as the input terminus of described switching power source control circuit, is connected with main power stage circuit 101 output terminal;
Peak value comparison method circuit 103, the input terminus of peak value comparison method circuit 103 is connected with error signal generation circuit 102 output terminal;
Frequency control circuit 104, the input terminus of frequency control circuit 104 is connected with error signal generation circuit 102 output terminal;
Drive signal generation circuit 105, first input terminus of drive signal generation circuit 105 is connected with peak value comparison method circuit 103 output terminal, 2nd input terminus is connected with frequency control circuit 104 output terminal, and the output terminal of drive signal generation circuit 105 is the output terminal of described switching power source control circuit.
Concrete principle of work is:
Error signal generation circuit 102 receives the output voltage feedback signal FB and output voltage reference signal REF of main power stage circuit 101, output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, generates and sends output voltage error signal Ve;
Peak value comparison method circuit 103 receives output voltage error signal Ve, maximum output voltage error signal VH, instantaneous peak voltage signal VIPKAnd actuate signal Vq, wherein, instantaneous peak voltage signal VIPKCharacterize the instantaneous inductor current peak in main power stage circuit 101, as output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; And by output voltage error signal VeWith instantaneous peak voltage signal VIPKCompare generation comparative result, according to actuate signal VqGenerate minimum switching tube ON time signal Ton.min, and according to described comparative result and minimum switching tube ON time signal Ton.minGenerate and send the first control signal Vk1;
Frequency control circuit 104 receives output voltage error signal VeWith minimum output voltage error signal TH, by output voltage error signal VeCompare with minimum output voltage error signal TH, and generate and send the 2nd control signal V according to comparative resultk2;
Drive signal generation circuit 105 receives described first control signal Vk1With the 2nd control signal Vk2, according to described first control signal Vk1And the 2nd control signal Vk2, generate and send actuate signal VqTo peak value comparison method circuit 103 and main power stage circuit 101, control main power stage circuit 101 and start according to different frequencies.
Switching power source control circuit disclosed in the present embodiment, by drive signal generation circuit 105 according to described first control signal Vk1With the 2nd control signal Vk2, generate and send and drive main power stage circuit 101 to carry out the actuate signal V started according to different frequencyqEven if when system is in light-load mode, main power stage circuit 101 can also carry out unlatching and the shutoff of corresponding frequencies according to the actuate signal that drive signal generation circuit exports, and sleep state can not be entered, and then the system that it also avoid is when light-load mode, the problem that the main power stage circuit 101 that brownout in output capacitance causes is low to the regulating power of output voltage, and the frequency that the main power stage circuit 101 of the system that avoids starts can be reduced to the noise that the scope that people's ear can hear produces.
Another embodiment of the present invention additionally provides another switching power source control circuit, as shown in Fig. 8 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises: error signal generation circuit 102, peak value comparison method circuit 103, frequency control circuit 104 and drive signal generation circuit 105.
With above-described embodiment institute the difference is that:
Error signal generation circuit 102 comprises:
Error amplifier, the inverting input of described error amplifier is as error signal generation circuit 102 input terminus; The output terminal of described error amplifier is the output terminal of error signal generation circuit 102.
The in-phase input end of described error amplifier receives output voltage reference signal REF, inverting input receives output voltage feedback signal FB, output voltage feedback signal FB and output voltage reference signal REF is compared and enlarged, by error signal generation circuit 102 output terminal output voltage error signal Ve。
In concrete practical application, the way of realization of error signal generation circuit 102 is not limited to foregoing description, it is possible to think the voltage error operational amplifier with compensate function, or other can realize the when circuit that error amplifies.
Concrete mode of connection and the principle of work of the present embodiment other circuit modules interior are identical with the embodiment in Fig. 7, repeat no more herein.
Another embodiment of the present invention additionally provides another switching power source control circuit, as shown in Fig. 9 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises: error signal generation circuit 102, peak value comparison method circuit 103, frequency control circuit 104 and drive signal generation circuit 105.
With in Fig. 7 embodiment institute the difference is that:
Peak value comparison method circuit 103 comprises:
First comparer A1, the inverting input of the first comparer A1, as peak value comparison method circuit 103 input terminus, receives output voltage error signal Ve, the in-phase input end of the first comparer A1 receives instantaneous peak voltage signal VIPK;
High clamping circuit 1031, one end of high clamping circuit 1031 is connected with the first comparer A1 inverting input, and the other end of high clamping circuit 1031 receives maximum output voltage error signal VH;
Time signal produces circuit 1032, and the input terminus that time signal produces circuit 1032 receives actuate signal Vq, the output terminal that time signal produces circuit 1032 exports minimum ON time signal Ton.min;
With door, the described input terminus with door is connected with the output terminal of the first comparer A1 and time signal generating circuit 1032 respectively, and the described output terminal with door is the output terminal of peak value comparison method circuit 103.
Concrete principle of work is:
Due to the high clamper effect of high clamping circuit 1031, the output voltage error signal V that the first comparer A1 inverting input receiveseThe maximum output voltage error signal V that high clamping circuit 1031 receives can not be greater thanH; As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, by output voltage error signal VeClamper is at maximum output voltage error signal VH; The output voltage error signal V that inverting input is received by the first comparer A1eWith the instantaneous peak voltage signal V that in-phase input end receivesIPKCompare and generate comparative result Vb, time signal produces circuit 1032 according to the actuate signal V receivedqGenerate and export minimum ON time signal Ton.min; Then comparative result Vb and minimum ON time signal Ton.minAfter inputing to described and door, generate described first control signal Vk1;As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, and the peak voltage signal V that the first comparer A1 receivesIPKReach maximum output voltage error signal VHTime, described the first control signal V become with pupilk1For significant condition; As output voltage error signal VeIt is less than maximum output voltage error signal VHAnd be greater than minimum output voltage error signal TH, and the peak voltage signal V that the first comparer A1 receivesIPKReach output voltage error signal VeTime, described the first control signal V become with pupilk1For significant condition; As output voltage error signal VeWhen being less than minimum output voltage error signal TH, and the minimum ON time signal T that time signal generation circuit 1032 generateson.minDuring for high level, described the first control signal V become with pupilk1For significant condition.
Concrete mode of connection and the principle of work of the present embodiment other circuit modules interior are identical with the embodiment in Fig. 7, repeat no more herein.
Preferably, in another embodiment, as shown in Figure 10, high clamping circuit 1031 is the first diode D1; The positive pole of the first diode D1 is connected with the first comparer A1 inverting input; The negative pole of the first diode D1 receives maximum output voltage error signal VH。
Concrete mode of connection and the principle of work of the present embodiment other circuit modules interior are identical with the embodiment in Fig. 7, repeat no more herein.
Preferably, in another embodiment, as shown in figure 11, high clamping circuit 1031 comprises: mirror current source and voltage follow device;
One end of described mirror current source is connected with the first comparer A1 inverting input, receives output voltage error signal Ve; The other end of described mirror current source is connected with the output terminal of described voltage follow device;
The in-phase input end of described voltage follow device receives maximum output voltage error signal VH。
In concrete practical application, high clamping circuit 1031 does not limit the way of realization of above-mentioned two embodiments, and the specific implementation form of the known high clamping circuit 1031 of personnel in the art can also be made up of other suitable circuit according to concrete applied environment.
Concrete mode of connection and the principle of work of the present embodiment other circuit modules interior are identical with the embodiment in Fig. 7, repeat no more herein.
Preferably, in another embodiment, as shown in figure 12, time signal generation circuit 1032 comprises:
Recommend circuit, described in recommend circuit and be connected between power supply and the current source of ground connection, described in recommend circuit input terminus receive actuate signal Vq;
Electric capacity C, one end of electric capacity C is connected with the described output terminal recommending circuit, the other end ground connection of electric capacity C;
Schmidt trigger, the input terminus of described Schmidt trigger is connected with the described output terminal recommending circuit, and the output terminal of described Schmidt trigger exports minimum ON time signal Ton.min。
Concrete mode of connection and the principle of work of the present embodiment other components and parts interior are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switching power source control circuit, as shown in Figure 13 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises: error signal generation circuit 102, peak value comparison method circuit 103, frequency control circuit 104 and drive signal generation circuit 105.
With above-described embodiment institute the difference is that:
Frequency control circuit 104 comprises:
Operational transconductance amplifier (OTA) GM, the inverting input of operational transconductance amplifier (OTA) GM, as frequency control circuit 104 input terminus, receives output voltage error signal Ve, the in-phase input end of operational transconductance amplifier (OTA) GM receives minimum output voltage error signal TH;
One-way conduction circuit 1041, the input terminus of one-way conduction circuit 1041 is connected with operational transconductance amplifier (OTA) GM output terminal;
Vibrator 1042, the input terminus of vibrator 1042 is connected with one-way conduction circuit 1041 output terminal, and the output terminal of vibrator 1042 is the output terminal of frequency control circuit 104.
Concrete principle of work is:
The minimum output voltage error signal TH that in-phase input end is received by operational transconductance amplifier (OTA) GM and the output voltage error signal V that inverting input receiveseCompare, the comparative result of the output according to operational transconductance amplifier (OTA) GM, one-way conduction circuit 1041 determines whether conducting, when the state of one-way conduction circuit 1041 is conducting, receive described comparative result, and generate and send frequency following output voltage error signal V according to described comparative resulte2nd control signal V of changek2; When one-way conduction circuit 1041 not conducting, the 2nd control signal V generated and sentk2Frequency be the natural frequency f of vibrator 1042 insidef。
In concrete actual application environment, the internal structure of vibrator 1042 and the way of realization of one-way conduction circuit 1041 cooperatively interact and select, as shown in Figure 14 and Figure 15.
Concrete mode of connection and the principle of work of the present embodiment other components and parts interior are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention additionally provides another switching power source control circuit, as shown in Figure 16 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises: error signal generation circuit 102, peak value comparison method circuit 103, frequency control circuit 104 and drive signal generation circuit 105.
With in Fig. 7 embodiment institute the difference is that:
Drive signal generation circuit 105 is: RS triggering device;
The reset end R of described RS triggering device is the first input terminus of drive signal generation circuit 105;
The set end S of described RS triggering device is the 2nd input terminus of drive signal generation circuit 105;
The output terminal Q of described RS triggering device is the output terminal of drive signal generation circuit 105.
Concrete principle of work is:
The first control signal V that described RS triggering device receives according to reset end Rk1With the 2nd control signal V that set end S receivesk2Generate and send actuate signal VqTo peak value comparison method circuit 103 and main power stage circuit 101, main power stage circuit 101 is driven to carry out starting and turning off according to different frequencies.
As output voltage error signal VeIt is greater than maximum output voltage error signal VHTime, described RS triggering device controls the switching frequency of the switching tube in described main power circuit and ON time is fixed value, and controls the inductance peak point current I in described main power circuitpkIt is stabilized in maximum inductance peak point current IpkH。
As output voltage error signal VeIt is less than maximum output voltage error signal VHAnd when being greater than minimum output voltage error signal TH, it is fixed value that described RS triggering device controls the switching frequency of the switching tube in described main power circuit, but ON time follows output voltage error signal VeChange, and the inductance peak point current Ipk controlled in described main power circuit follows output voltage error signal VeChange.
As output voltage error signal VeWhen being less than minimum output voltage error signal TH, it is fixed value that described RS triggering device controls the ON time of the switching tube in described main power circuit, but switching frequency follows output voltage error signal VeChange, and the inductance peak point current Ipk controlled in described main power circuit is stabilized in minimum inductance peak point current IpkL。
As output voltage error signal VeWhen being less than certain value TS, described RS triggering device controls described main power circuit and enters sleep pattern.
In concrete actual application environment, drive signal generation circuit 105 is not defined as RS triggering device, according to actual needs, various logic door can also be adopted to be interconnected and to realize the function identical with described RS triggering device, it is also possible to comprise further and drive enhancing circuit.
Concrete mode of connection and the principle of work of the present embodiment other circuit modules interior are identical with the embodiment in Fig. 7, repeat no more herein.
Another embodiment of the present invention additionally provides another switching power source control circuit, as shown in Figure 17 broken box, the described switching power source control circuit being connected with main power stage circuit 101 comprises: error signal generation circuit 102, peak value comparison method circuit 103, frequency control circuit 104 and drive signal generation circuit 105.
And error signal generation circuit 102 comprises:
Error amplifier, the inverting input of described error amplifier is as error signal generation circuit 102 input terminus; The output terminal of described error amplifier is the output terminal of error signal generation circuit 102.
Peak value comparison method circuit 103 comprises:
First comparer A1, the inverting input of the first comparer A1, as peak value comparison method circuit 103 input terminus, receives output voltage error signal Ve, the in-phase input end of the first comparer A1 receives instantaneous peak voltage signal VIPK;
High clamping circuit 1031, one end of high clamping circuit 1031 is connected with the first comparer A1 inverting input, and the other end of high clamping circuit 1031 receives maximum output voltage error signal VH;
Time signal produces circuit 1032, and the input terminus that time signal produces circuit 1032 receives actuate signal Vq, the output terminal that time signal produces circuit 1032 exports minimum ON time signal Ton.min;
With door, the described input terminus with door is connected with the output terminal of the first comparer A1 and time signal generating circuit 1032 respectively, and the described output terminal with door is the output terminal of peak value comparison method circuit 103.
Frequency control circuit 104 comprises:
Operational transconductance amplifier (OTA) GM, the inverting input of operational transconductance amplifier (OTA) GM, as frequency control circuit 104 input terminus, receives output voltage error signal Ve, the in-phase input end of operational transconductance amplifier (OTA) GM receives minimum output voltage error signal TH;
One-way conduction circuit 1041, the input terminus of one-way conduction circuit 1041 is connected with operational transconductance amplifier (OTA) GM output terminal;
Vibrator 1042, the input terminus of vibrator 1042 is connected with one-way conduction circuit 1041 output terminal, and the output terminal of vibrator 1042 is the output terminal of frequency control circuit 104.
One-way conduction circuit 1041 and vibrator 1042 show example with Fig. 8 and are described.
Drive signal generation circuit 105 is: RS triggering device;
The reset end R of described RS triggering device is the first input terminus of drive signal generation circuit 105;
The set end S of described RS triggering device is the 2nd input terminus of drive signal generation circuit 105;
The output terminal Q of described RS triggering device is the output terminal of drive signal generation circuit 105.
Preferably, high clamping circuit 1031 is the first diode D1; The positive pole of the first diode D1 is connected with the first comparer A1 inverting input; The negative pole of the first diode D1 receives maximum output voltage error signal VH。
Preferably, time signal generation circuit 1032 comprises:
Recommend circuit, described in recommend circuit and be connected between power supply and the current source of ground connection, described in recommend circuit input terminus receive actuate signal Vq;
Electric capacity C, one end of electric capacity C is connected with the described output terminal recommending circuit, the other end ground connection of electric capacity C;
Schmidt trigger, the input terminus of described Schmidt trigger is connected with the described output terminal recommending circuit, and the output terminal of described Schmidt trigger exports minimum ON time signal Ton.min。
Below in conjunction with the signal waveforms shown in Figure 18 and Figure 19 and the signal relation figure shown in Fig. 6, concrete principle of work is described in detail:
(1) as output voltage error signal VeHigher than maximum output voltage error signal VHTime, when also namely system is in the situation that load is fully loaded with, due to the high clamper effect of the first diode D1, the output voltage error signal V that the first comparer A1 inverting input receiveseEqual the maximum output voltage error signal V that the first diode D1 negative pole receivesH; The maximum output voltage error signal V that inverting input is received by the first comparer A1HWith the instantaneous peak voltage signal V that in-phase input end receivesIPKCompare, wherein, instantaneous peak voltage signal VIPKCharacterize the instantaneous inductor current peak of main power stage circuit, can obtain by prior art, not repeat them here, and maximum output voltage error signal VHMaximum inductance peak point current IpkH required when can be fully loaded according to load sets; Now, the comparative result V that the first comparer A1 exportsbFor lower level; Therefore, the minimum ON time signal T that no matter time signal generation circuit 1032 produceson.minWhether it is high level, comparative result VbWith minimum ON time signal Ton.minThrough described with door after, the described first control signal V of generationk1For lower level.
The output voltage error signal V that now operational transconductance amplifier (OTA) GM inverting input receiveseIt is greater than the minimum output voltage error signal TH that in-phase input end receives, operational transconductance amplifier (OTA) GM will extract electric current from outside, but the one-way conduction characteristic due to one-way conduction circuit 1041, operational transconductance amplifier (OTA) GM can not extract electric current, therefore, vibrator 1042 is not by the impact of operational transconductance amplifier (OTA) GM, and the frequency of its described 2nd control signal Vk2 exported is the fixed value f of internal presetf, wherein, fixed value ffBy the value setting of the capacitance that arranges in vibrator 1042 and current source.
The reset end R of described RS triggering device receives the first control signal Vk1, set end S receives the 2nd control signal Vk2; As the 2nd control signal Vk2During for high level, the actuate signal V that the output terminal Q of RS triggering device exportsqFor high level, controlling the switching tube conducting in main power stage circuit 101, the inductance peak point current Ipk in main power stage circuit 101 continues to rise; Until when inductance peak point current Ipk arrives maximum inductance peak point current IpkH, namely characterizing the instantaneous peak voltage signal V of inductance peak point current IpkIPKArrive maximum output voltage error signal VHTime, the comparative result V that the first comparer A1 exportsbUpset, saltus step is high level; And now, due to actuate signal VqRemain high level always, after minimum ON time, minimum ON time signal Ton.minSaltus step is high level; Therefore, comparative result Vb and minimum ON time signal Ton.minThrough described with door after generate the first control signal Vk1Also being high level, reset described RS triggering device, the actuate signal V that the output terminal Q of RS triggering device exportsqControl the switching tube in main power stage circuit 101 to turn off; So system is when load is fully loaded, by described switching power source control circuit, according to the fixed frequency f of vibrator 1042 internal presetfOpen the switching tube in main power stage circuit 101, and when the value of inductance peak point current Ipk reaches maximum inductance peak point current IpkH, i.e. instantaneous peak voltage signal VIPKArrive maximum output voltage error signal VHTime, turn off the switching tube in main power stage circuit 101.Circulate with this, ensure that the value of inductance peak point current Ipk is basically stable at maximum inductance peak point current IpkH.
(2) as output voltage error signal VeLower than maximum output voltage error signal VH, time but higher than minimum output voltage error signal TH, when also namely system is in the situation of normal operation, the first diode D1 is to output voltage error signal VeDo not play clamper effect; Therefore, working process and above-mentioned situation due to each components and parts is similar, it is seen that, described switching power source control circuit, according to the fixed frequency f of vibrator 1042 internal presetfOpen the switching tube in main power stage circuit 101, as instantaneous peak voltage signal VIPKArrive output voltage error signal VeTime, turn off the switching tube in main power stage circuit 101. Circulate with this, it is achieved inductance peak point current Ipk follows output voltage error signal V substantiallyeChange.
(3) load of reference shown in Figure 13 is the signal waveforms in underloading situation, and when output voltage error signal Ve is lower than minimum output voltage error signal TH, when also namely system is in light-load mode, equally, the first diode D1 is to output voltage error signal VeDo not play clamper effect. As the 2nd control signal Vk2During for high level, the switching tube in main power stage circuit 101 is opened, instantaneous peak voltage signal VIPKContinue to rise, as instantaneous peak voltage signal VIPKRise to output voltage error signal VeTime, the comparative result V that the first comparer A1 exportsbSaltus step is high level; Owing to the ON time of now switching tube does not also arrive minimum switching tube ON time Ton.min, instantaneous peak voltage signal VIPKContinue to rise until the ON time of switching tube is minimum switching tube ON time Ton.min, time signal T saltus step is high level, now, and instantaneous peak voltage signal VIPKRise to minimum peak voltage signal VIPKL; Therefore, comparative result VbWith time signal T through with door after export the first control signal Vk1Also saltus step is high level, controls the actuate signal V that described RS triggering device exportsqFor lower level, control the switching tube in main power stage circuit 101 and turn off, minimum voltage peak value VIPKLStart decline until zero; As the 2nd control signal Vk2When being high level again, repeat said process, ensure that inductance peak point current Ipk is basically stable at minimum inductance peak point current IpkL with this.
Now, the output voltage error signal V that operational transconductance amplifier (OTA) GM inverting input receiveseIt is less than the minimum output voltage error signal TH that in-phase input end receives, the outside outward current of operational transconductance amplifier (OTA) GM, through one-way conduction circuit 1041 so that the capacitor discharge speed in vibrator 1042 slows down, the 2nd control signal V that therefore vibrator 1042 exportsk2Frequency reduce, and along with output voltage error signal VeReduction and reduce;
As can be seen here, the operating frequency controlling the switching tube in main power stage circuit 101 will open and shut off with more low-frequency, and sleep state can not be entered, and then the system that it also avoid is when light-load mode, the problem that the main power stage circuit 101 that brownout in output capacitance causes is low to the regulating power of output voltage, and the frequency that the main power stage circuit 101 of the system that avoids starts can be reduced to the noise that the scope that people's ear can hear produces. Simultaneously, moreover it is possible to ensure that inductance peak point current Ipk is basically stable at minimum inductance peak point current IpkL.
(4) as output voltage error signal VeWhen continuing to be reduced to certain value, system just can enter sleep state.
Another embodiment of the present invention additionally provides another switch power supply, comprises main power stage circuit 101 and the described switching power source control circuit in any one Fig. 7 to Figure 17. Described main power stage circuit 101 for adopting the topological framework of peak value comparison method scheme, can comprise buck, boost, buck-boost etc.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are enable to realize or use the present invention. To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments. Therefore, the present invention can not be limited in these embodiments shown in this article, but be met the widest scope consistent with principle disclosed herein and features of novelty.
Claims (14)
1. a switch power supply control method, for the main power stage circuit of trip switch power supply, it is characterised in that, comprise the following steps:
Receive output voltage feedback signal and the output voltage reference signal of described main power stage circuit, and described output voltage feedback signal and described output voltage reference signal are compared and enlarged, generate and send output voltage error signal;
Receive maximum output voltage error signal, instantaneous peak voltage signal, actuate signal and described output voltage error signal, when described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; And described output voltage error signal and instantaneous peak voltage signal are compared and generate comparative result, generate minimum ON time signal according to described actuate signal, and generate and send the first control signal according to described comparative result and described minimum ON time signal;
Receive minimum output voltage error signal and described output voltage error signal, described output voltage error signal and minimum output voltage error signal are compared, and generates and sends the 2nd control signal according to comparative result;
Receive described first control signal and the 2nd control signal, according to described first control signal and the 2nd control signal, generate and send described actuate signal to described main power stage circuit, drive described main power stage circuit under fully loaded, normal, underloading and sleep operation mode, start according to different frequencies;
When main power stage circuit is in underloading operating mode, inductance peak point current is stabilized in minimum inductance peak point current, and switching frequency changes with output voltage error signal, and the ON time of the switch device in each switch periods is fixing.
2. switch power supply control method according to claim 1, it is characterised in that, when described output voltage error signal is greater than maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; Making described first control signal be significant condition when described instantaneous peak voltage signal reaches described maximum output voltage error signal, the frequency of described 2nd control signal is fixed frequency; Taking the switching frequency of switching tube that controls in described main power circuit and ON time as fixed value, and the inductance peak point current controlled in described main power circuit is stabilized in maximum inductance peak point current.
3. switch power supply control method according to claim 1, it is characterized in that, when described output voltage error signal is less than described maximum output voltage error signal and is greater than described minimum output voltage error signal, making described first control signal be significant condition when described peak voltage signal reaches described output voltage error signal, the frequency of described 2nd control signal is fixed frequency; Taking the switching frequency of switching tube that controls in described main power circuit as fixed value, but ON time follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit follows described output voltage error signal intensity.
4. switch power supply control method according to claim 1, it is characterized in that, when described output voltage error signal is less than described minimum output voltage error signal, described first control signal is made to be significant condition when the ON time of described switching tube reaches described minimum ON time, output voltage error signal intensity described in the frequency following of described 2nd control signal;Taking the ON time of switching tube that controls in described main power circuit as fixed value, but switching frequency follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit is stabilized in minimum inductance peak point current.
5. switch power supply control method according to claim 1, it is characterised in that, when described output voltage error signal is less than certain value, controls described main power circuit and enter sleep pattern.
6. a switching power source control circuit, power stage circuit main with switch power supply is connected, it is characterised in that, described switching power source control circuit comprises:
Error signal generation circuit, an input terminus of described error signal generation circuit as described switching power source control circuit input terminus, be connected with described main power stage circuit output terminal, receive output voltage feedback signal; Described error signal generation circuit also receives output voltage reference signal, and described output voltage feedback signal and described output voltage reference signal is compared and enlarged, and generates and sends output voltage error signal;
Peak value comparison method circuit, the input terminus of described peak value comparison method circuit is connected with described error signal generation circuit output terminal, receives described output voltage error signal; Described peak value comparison method circuit also receives maximum output voltage error signal, instantaneous peak voltage signal and actuate signal, when described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal; And described output voltage error signal and instantaneous peak voltage signal are compared and generate comparative result, generate minimum ON time signal according to described actuate signal, and generate and send the first control signal according to described comparative result and described minimum ON time signal;
Frequency control circuit, the input terminus of described frequency control circuit is connected with described error signal generation circuit output terminal, receives described output voltage error signal; Described frequency control circuit also receives minimum output voltage error signal, described output voltage error signal and minimum output voltage error signal is compared, and generates and sends the 2nd control signal according to comparative result;
Drive signal generation circuit, the first input terminus of described drive signal generation circuit is connected with described peak value comparison method circuit output end, receives described first control signal; 2nd output terminal of described drive signal generation circuit is connected with described frequency control circuit output end, receives described 2nd control signal; Described drive signal generation circuit is according to described first control signal and the 2nd control signal, generate and send actuate signal to described peak value comparison method circuit and described main power stage circuit, drive described main power stage circuit under fully loaded, normal, underloading and sleep operation mode, starting according to different frequencies, the output terminal of described drive signal generation circuit is the output terminal of described switching power source control circuit;
When main power stage circuit is in underloading operating mode, inductance peak point current is stabilized in minimum inductance peak point current, and switching frequency changes with output voltage error signal, and the ON time of the switch device in each switch periods is fixing.
7. switching power source control circuit according to claim 6, it is characterised in that, described error signal generation circuit comprises:
Error amplifier, the inverting input of described error amplifier, as described error signal generation circuit input terminus, receives described output voltage feedback signal; The in-phase input end of described error amplifier receives output voltage reference signal; The output terminal of described error amplifier is the output terminal of described error signal generation circuit, produces described output voltage error signal.
8. switching power source control circuit according to claim 6, it is characterised in that, described peak value comparison method circuit comprises:
First comparer, the inverting input of described first comparer, as described peak value comparison method circuit input end, receives described output voltage error signal, and the in-phase input end of described first comparer receives described instantaneous peak voltage signal;
High clamping circuit, one end of described high clamping circuit is connected with described first comparer inverting input, receives described output voltage error signal, and the other end of described high clamping circuit receives described maximum output voltage error signal; When described output voltage error signal is greater than described maximum output voltage error signal, by described output voltage error signal clamper at described maximum output voltage error signal;
Time signal produces circuit, and the input terminus that described time signal produces circuit receives described actuate signal, and the output terminal that described time signal produces circuit exports described minimum ON time signal;
With door, the output terminal that the described input terminus with door produces circuit with described first comparer and described time signal respectively is connected, and the described output terminal with door is the output terminal of described peak value comparison method circuit, generates described first control signal; When described output voltage error signal is greater than maximum output voltage error signal, and when the described peak voltage signal of described first comparer reception reaches described maximum output voltage error signal, described described first control signal become with pupil is significant condition; When described output voltage error signal is less than maximum output voltage error signal and is greater than minimum output voltage error signal, and the described peak voltage signal that described first comparer receives is when reaching described output voltage error signal, described described first control signal become with pupil is significant condition; When described output voltage error signal is less than minimum output voltage error signal, and when the minimum ON time of described time signal generation circuit evolving is high level, described described first control signal become with pupil is significant condition.
9. switching power source control circuit according to claim 8, it is characterised in that, described high clamping circuit is the first diode; The positive pole of described first diode is connected with described first comparer inverting input, receives described output voltage error signal; The negative pole of described first diode receives described maximum output voltage error signal.
10. switching power source control circuit according to claim 8, it is characterised in that, described high clamping circuit comprises: mirror current source and voltage follow device;
One end of described mirror current source is connected with described first comparer inverting input, receives described output voltage error signal; The other end of described mirror current source is connected with the output terminal of described voltage follow device;
The in-phase input end of described voltage follow device receives described maximum output voltage error signal.
11. switching power source control circuits according to claim 8, it is characterised in that, described time signal produces circuit and comprises:
Recommend circuit, described in recommend circuit and be connected between power supply and the current source of ground connection, described in recommend circuit input terminus receive described actuate signal;
Electric capacity, one end of described electric capacity is connected with the described output terminal recommending circuit, the other end ground connection of described electric capacity;
Schmidt trigger, the input terminus of described Schmidt trigger is connected with the described output terminal recommending circuit, and the output terminal of described Schmidt trigger exports described minimum ON time signal.
12. switching power source control circuits according to claim 6, it is characterised in that, described frequency control circuit comprises:
Operational transconductance amplifier (OTA), the inverting input of described operational transconductance amplifier (OTA), as described frequency control circuit input end, receives described output voltage error signal, and the in-phase input end of described operational transconductance amplifier (OTA) receives described minimum output voltage error signal; Described output voltage error signal and minimum output voltage error signal are compared, and exports comparative result;
One-way conduction circuit, the input terminus of described one-way conduction circuit is connected with described operational transconductance amplifier (OTA) output terminal, described one-way conduction circuit determines whether conducting according to the described comparative result received, and when described one-way conduction circuit conducting, is forwarded by described comparative result;
Vibrator, the input terminus of described vibrator is connected with the output terminal of described one-way conduction circuit, when described one-way conduction circuit conducting, receive described comparative result, and generate and send the 2nd control signal of output voltage error signal intensity described in frequency following according to described comparative result; When described one-way conduction circuit not conducting, the frequency of described 2nd control signal generated and sent is the natural frequency of described vibrator inside; The output terminal of described vibrator is the output terminal of described frequency control circuit.
13. switching power source control circuits according to claim 6, it is characterised in that, described drive signal generation circuit comprises: RS triggering device;
The reset end R of described RS triggering device is the first input terminus of described drive signal generation circuit;
The set end S of described RS triggering device is the 2nd input terminus of described drive signal generation circuit;
The output terminal Q of described RS triggering device is the output terminal of described drive signal generation circuit;
When described output voltage error signal is greater than maximum output voltage error signal, described RS triggering device controls the switching frequency of the switching tube in described main power circuit and ON time is fixed value, and the inductance peak point current controlled in described main power circuit is stabilized in maximum inductance peak point current;
When described output voltage error signal is less than maximum output voltage error signal and is greater than minimum output voltage error signal, it is fixed value that described RS triggering device controls the switching frequency of the switching tube in described main power circuit, but ON time follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit follows described output voltage error signal intensity;
When described output voltage error signal is less than minimum output voltage error signal, it is fixed value that described RS triggering device controls the ON time of the switching tube in described main power circuit, but switching frequency follows described output voltage error signal intensity, and the inductance peak point current controlled in described main power circuit is stabilized in minimum inductance peak point current;
When described output voltage error signal is less than certain value, described RS triggering device controls described main power circuit and enters sleep pattern.
14. 1 kinds of switch power supplies, it is characterised in that, comprise the switching power source control circuit described in any one in main power stage circuit and claim 6-13.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103683908B (en) | 2013-12-19 | 2015-11-25 | 矽力杰半导体技术(杭州)有限公司 | Switching power source control circuit, Switching Power Supply and control method thereof |
| CN103683868B (en) | 2013-12-25 | 2016-08-24 | 矽力杰半导体技术(杭州)有限公司 | Switching power source control circuit, Switching Power Supply and control method thereof |
| CN103683869A (en) | 2013-12-26 | 2014-03-26 | 矽力杰半导体技术(杭州)有限公司 | Switching power supply control circuit, switching power supply and control method of switching power supply |
| CN104319998B (en) * | 2014-09-29 | 2017-12-05 | 矽力杰半导体技术(杭州)有限公司 | A kind of switching power source control circuit, Switching Power Supply and control method |
| CN104991597B (en) * | 2015-06-30 | 2016-09-28 | 南京矽力杰半导体技术有限公司 | Peak current control circuitry |
| CN105048781A (en) * | 2015-08-09 | 2015-11-11 | 安徽普为智能科技有限责任公司 | Control method for switching power supply circuit |
| CN105896934B (en) * | 2016-04-13 | 2018-10-30 | 成都芯源系统有限公司 | Switching power supply with adaptive clock and controller and control method thereof |
| US10008933B1 (en) * | 2016-12-16 | 2018-06-26 | Stmicroelectronics Asia Pacific Pte Ltd | Frequency detection to perform dynamic peak current control |
| CN108512538B (en) * | 2018-04-13 | 2023-12-26 | 杭州士兰微电子股份有限公司 | Power converter and control circuit and control method thereof |
| WO2021226978A1 (en) * | 2020-05-15 | 2021-11-18 | 深圳市汇顶科技股份有限公司 | Power supply management circuit, chip, and device |
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| CN103078496A (en) * | 2012-12-12 | 2013-05-01 | 青岛联盟电子仪器有限公司 | Voltage reduction circuit |
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