CN103367141B - Work function method of testing - Google Patents
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- CN103367141B CN103367141B CN201210101757.0A CN201210101757A CN103367141B CN 103367141 B CN103367141 B CN 103367141B CN 201210101757 A CN201210101757 A CN 201210101757A CN 103367141 B CN103367141 B CN 103367141B
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Abstract
The present invention provides manufacture method and the MOS capacitor of a kind of MOS capacitor. Described manufacture method, including: providing substrate, described substrate comprises multiple region; The oxytropism adulterant of variable concentrations and/or the kind of adulterating respectively in multiple described regions; Multiple described regions are formed oxide skin(coating); And on described oxide skin(coating), sequentially form metal level and contact block. The method of the present invention by forming the region of the oxytropism adulterant with variable concentrations and/or kind in same substrate, multiple MOS capacitor with different work functions can be formed on the same substrate, therefore can avoid the waste of a large amount of wafer when carrying out work function test, and then reduce cost.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly to a kind of work function method of testing.
Background technology
Along with constantly reducing of dimensions of semiconductor devices, high-dielectric constant metal grid pole (HighK-valueMetalGate, HKMG) technology almost has become as the indispensable technology of below 45nm technique. For HKMG device, work function (WorkFunction, WF) test is a kind of very important analysis means. In order to test the work function of HKMG device, it will usually first make MOS capacitor (MOSCapacitor, MOSCAP) to utilize MOS capacitor to obtain capacitance-voltage (C-V) curve, then pass through capacitance-voltage curve and obtain work function.
MOS capacitor is the simple Devices with sandwich structure, and Fig. 1 is the generalized section of existing MOS capacitor. As it is shown in figure 1, be formed with dielectric layer 101 on a semiconductor substrate 100, dielectric layer 101 is formed with metal level 102, metal level 102 is formed contact block 103. When carrying out capacitance-voltage curve test, load Dc bias at the two poles of the earth of MOS capacitor and utilize an AC signal measurement simultaneously. Flat-band voltage (FlatBandVoltage can be calculated by the capacitance-voltage curve recorded, Vfb), then obtain Vfb-EOT (equivalent oxide thickness) curve, from Vfb-EOT curve EOT is extrapolated to and namely can obtain work function equal to zero.
But, due to the restriction of existing technique, the dielectric layer 101 of the MOS capacitor on each wafer can only have a kind of predetermined thickness, therefore to obtain Vfb-EOT curve, it usually needs make a series of MOS capacitor wafer. Further, in the development phase of HKMG device, it is necessary to various metal materials are tested, need to make the dielectric layer 101 of the various thickness corresponding to this metal material hence for every kind of metal material, to make it have different work functions. Thus need to make substantial amounts of MOS capacitor wafer to use for analyzing, therefore can cause the waste of a large amount of wafer.
Accordingly, it would be desirable to a kind of work function method of testing, to solve problems of the prior art.
Summary of the invention
Introducing the concept of a series of reduced form in Summary, this will further describe in detailed description of the invention part. The Summary of the present invention is not meant to the key feature and the essential features that attempt to limit technical scheme required for protection, does not more mean that the protection domain attempting to determine technical scheme required for protection.
In order to solve problems of the prior art, the present invention proposes a kind of work function method of testing, including: providing substrate, described substrate comprises multiple region; The oxytropism adulterant of variable concentrations and/or the kind of adulterating respectively in multiple described regions; Multiple described regions are formed oxide skin(coating); And on described oxide skin(coating), sequentially form metal level and contact block; Utilize the plurality of multiple MOS capacitor with different work functions to obtain capacitance-voltage curve, then pass through described capacitance-voltage curve and obtain work function.
Preferably, described oxytropism adulterant includes phosphorus or arsenic.
Preferably, the technique that described doping adopts is ion implantation technology.
Preferably, the implantation dosage of described ion implantation technology is more than zero and less than or equal to 2 �� 1015/cm2��
Preferably, the injection length of described ion implantation technology is the 10-100 second.
Preferably, the thickness of described oxide skin(coating) is 10-30 angstrom.
Preferably, the method forming described oxide is rapid thermal oxidation.
Preferably, the reaction temperature of described rapid thermal oxidation is 600-1200 degree Celsius.
Preferably, the response time of described rapid thermal oxidation is the 5-60 second.
The method of the present invention by forming the region of the oxytropism adulterant with variable concentrations and/or kind in same substrate, multiple MOS capacitor with different work functions can be formed on the same substrate, therefore can avoid the waste of a large amount of wafer when carrying out work function test, and then reduce cost.
Accompanying drawing explanation
The drawings below of the present invention is used for understanding the present invention in this as the part of the present invention. Shown in the drawings of embodiments of the invention and description thereof, it is used for explaining principles of the invention. In the accompanying drawings,
Fig. 1 is the generalized section of existing MOS capacitor;
Fig. 2 is the flow chart making MOS capacitor according to one embodiment of the present invention; And
Fig. 3 is the generalized section of the MOS capacitor made according to one embodiment of the present invention.
Detailed description of the invention
It follows that the present invention will be more fully described by conjunction with accompanying drawing, shown in the drawings of embodiments of the invention. But, the present invention can implement in different forms, and should not be construed as being limited to embodiments presented herein. On the contrary, provide these embodiments will make openly thoroughly with complete, and will fully convey the scope of the invention to those skilled in the art. In the accompanying drawings, in order to clear, the size in Ceng He district and relative size are likely to be exaggerated. Same reference numerals represents identical element from start to finish.
It is understood that, when element or layer be referred to as " ... on ", " with ... adjacent ", " being connected to " or " being coupled to " other element or during layer, its can directly on other element or layer, adjacent thereto, be connected or coupled to other element or layer, or can there is element between two parties or layer. On the contrary, when element be referred to as " directly exist ... on ", " with ... direct neighbor ", " being directly connected to " or " being directly coupled to " other element or during layer, then be absent from element between two parties or layer.
A kind of manufacture method of MOS capacitor. Fig. 2 is the flow chart making MOS capacitor according to one embodiment of the present invention.
Perform step 201, it is provided that substrate, this substrate comprises multiple region.
Exemplarily, substrate can be at least one in the following material being previously mentioned: stacking SiGe (S-SiGeOI), germanium on insulator SiClx (SiGeOI) and germanium on insulator (GeOI) etc. on stacking silicon (SSOI), insulator on silicon, silicon-on-insulator (SOI), insulator. Substrate comprises multiple region, and the plurality of region is for respectively forming MOS capacitor, and each region is only formed a MOS capacitor. The size in these regions and quantity can carry out self-defined according to the quantity and size etc. of the effective area of substrate, MOS capacitor to be formed by Producer.
Perform step 202, the oxytropism adulterant of variable concentrations and/or the kind of adulterating respectively in multiple regions.
The oxytropism adulterant of variable concentrations and/or the kind of adulterating respectively in above-mentioned each region, the concentration of the oxytropism adulterant namely adulterated in each region is different, or the kind of oxytropism adulterant is different, or the concentration of oxytropism adulterant and kind are all different. Oxytropism adulterant by adulterate in different regions variable concentrations and/or kind, it is possible to make regions different on substrate have different oxyphie characteristics, in order to can have different work functions when being subsequently formed oxide skin(coating) such as what hereinafter will describe.
Kinds of processes can be adopted to adulterate in the zones of different of substrate the oxytropism adulterant of variable concentrations and/or kind. According to one embodiment of the present invention, the technique that doping adopts is ion implantation technology, adopt this method and can control to be easy to doping content easily by control implantation dosage and injection length, and also can change dopant species easily by changing target source. Specifically, when adopting ion implantation technology to adulterate, oxytropism adulterant for adulterate in different regions variable concentrations and/or kind, photoetching process can be coordinated to use together, namely when needing to be adulterated in the first area in multiple regions, it is possible to form the first photoresist layer only exposing first area on substrate; Then ion implantation technology is carried out; Finally remove the first photoresist layer. When the second area in multiple regions is adulterated, it is possible to form the second photoresist layer only exposing second area on substrate; Then ion implantation technology is carried out; Finally remove the second photoresist layer. The like, until all of region all completes doping on substrate.
Compared with forming oxide skin(coating) with on unadulterated region, when forming oxide skin(coating) on the region doped with oxytropism adulterant, oxide skin(coating) can have higher growth rate. The oxytropism adulterant with this characteristic includes phosphorus or arsenic etc.
Further, the implantation dosage of ion implantation technology is more than zero and less than or equal to 2 �� 1015/cm2, to avoid the injection of high dose that substrate surface is caused damage. From the viewpoint of time efficiency etc., it is preferable that the injection length of ion implantation technology can be the 10-100 second. Predetermined concentration according to the region adulterated, it is possible to suitably select in implantation dosage given above and the scope of injection length, reasonably to arrange technological parameter under the premise meeting doping content and reaching predetermined concentration.
Perform step 203, multiple regions are formed oxide skin(coating) (i.e. the dielectric layer of MOS capacitor).
Zones of different at substrate is respectively formed on oxide skin(coating), and owing to the concentration of oxytropism adulterant adulterated in zones of different and/or kind are different, therefore, the growth rate of the oxide skin(coating) in zones of different is different, and then makes it have different work functions. Preferably, the thickness of oxide skin(coating) can be 10-30 angstrom, to ensure oxide skin(coating) effectiveness in MOS capacitor. Oxide skin(coating) can adopt multiple method to grow, it is preferable that the method forming oxide is rapid thermal oxidation. By adopting rapid thermal oxidation to carry out grown oxide layer, oxytropism adulterant is relatively big on the impact of the growth rate of oxide skin(coating), and then is easier to be formed the oxide skin(coating) of different-thickness in different regions.
Oxide skin(coating) well known to a person skilled in the art oxide skin(coating) or composite oxide layer typically. The exemplary embodiment of oxide skin(coating) includes but not limited to: the composite bed that alumina layer, tantalum oxide layers, titanium oxide layer, zirconia layer, yttrium oxide layer, Gadolinia. layer, lanthana layer, silicon oxide layer, lanthana aluminium lamination, hafnium oxide layer and above-mentioned various material layers are formed.
Exemplarily, the reaction temperature of rapid thermal oxidation is 600-1200 degree Celsius. Exemplarily, the response time of rapid thermal oxidation is the 5-60 second.
Perform step 204, sequentially form metal level on the oxide layer and contact block.
Exemplarily, the material of metal level can include the metals such as titanium, zirconium, hafnium, niobium or tantalum or the nitride of above-mentioned metal or nitrogen oxides etc. Exemplarily, the material contacting cap can be made up of the material with less contact resistance, for instance nickel or nisiloy material layer. Can adopt with the forming method contacting cap for metal level and it is known in the art, such as chemical vapour deposition technique, atomic layer deposition method etc., therefore no longer describe in detail.
The method of the present invention by forming the region of the oxytropism adulterant with variable concentrations and/or kind in same substrate, multiple MOS capacitor with different work functions can be formed on the same substrate, therefore can avoid the waste of a large amount of wafer when carrying out work function test, and then reduce cost.
Additionally, the present invention also provides for a kind of MOS capacitor. Fig. 3 is the generalized section of the MOS capacitor made according to one embodiment of the present invention. MOS capacitor is to adopt said method to be formed. Specifically, MOS capacitor includes substrate 300, has different regions in substrate 300, for instance region A, region B and region C. The quantity in region shown in Fig. 3 and position are only exemplary, therefore should not be construed as limitation of the present invention. At region A, region B and region C respectively doped with the oxytropism adulterant of variable concentrations. It is respectively formed on oxide skin(coating) 301 at region A, region B and region C, oxide skin(coating) 301 has been formed metal level 302, metal level 302 has been formed contact cap 303. Oxide skin(coating) 301, metal level 302 can be above-mentioned cited material with the material contacting cap 303, it is of course possible to be capable of the material of respective function for other.
The present invention is illustrated already by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to citing and descriptive purpose, and is not intended to limit the invention in described scope of embodiments. In addition it will be appreciated by persons skilled in the art that and the invention is not limited in above-described embodiment, more kinds of variants and modifications can also be made according to the teachings of the present invention, within these variants and modifications all fall within present invention scope required for protection. Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (9)
1. a work function method of testing, it is characterised in that including:
Thering is provided substrate, described substrate comprises multiple region;
The oxytropism adulterant of variable concentrations and/or the kind of adulterating respectively in multiple described regions;
Multiple described regions are formed the oxide skin(coating) that thickness is different; And
Described oxide skin(coating) sequentially forms metal level and contacts block, to form multiple MOS capacitor with different work functions;
Utilize the plurality of multiple MOS capacitor with different work functions to obtain capacitance-voltage curve, then pass through described capacitance-voltage curve and obtain work function.
2. work function method of testing according to claim 1, it is characterised in that described oxytropism adulterant includes phosphorus or arsenic.
3. work function method of testing according to claim 1, it is characterised in that the technique that described doping adopts is ion implantation technology.
4. work function method of testing according to claim 3, it is characterised in that the implantation dosage of described ion implantation technology is more than zero and less than or equal to 2 �� 1015/cm2��
5. work function method of testing according to claim 3, it is characterised in that the injection length of described ion implantation technology is the 10-100 second.
6. work function method of testing according to claim 1, it is characterised in that the thickness of described oxide skin(coating) is 10-30 angstrom.
7. work function method of testing according to claim 1, it is characterised in that the method forming described oxide is rapid thermal oxidation.
8. work function method of testing according to claim 7, it is characterised in that the reaction temperature of described rapid thermal oxidation is 600-1200 degree Celsius.
9. work function method of testing according to claim 7, it is characterised in that the response time of described rapid thermal oxidation is the 5-60 second.
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| US9905707B1 (en) * | 2016-10-28 | 2018-02-27 | Globalfoundries Inc. | MOS capacitive structure of reduced capacitance variability |
| US10685886B2 (en) | 2017-12-15 | 2020-06-16 | International Business Machines Corporation | Fabrication of logic devices and power devices on the same substrate |
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| CN101512774A (en) * | 2006-06-27 | 2009-08-19 | 国立大学法人东北大学 | Semiconductor device |
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| US6555484B1 (en) * | 1997-06-19 | 2003-04-29 | Cypress Semiconductor Corp. | Method for controlling the oxidation of implanted silicon |
| JP3194370B2 (en) * | 1998-05-11 | 2001-07-30 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
| JP4656854B2 (en) * | 2004-04-06 | 2011-03-23 | 富士通セミコンダクター株式会社 | Manufacturing method of semiconductor device |
| US8008143B2 (en) * | 2009-12-30 | 2011-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method to form a semiconductor device having gate dielectric layers of varying thicknesses |
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