CN103365738A - Light weight soft information obtaining method of multi-layer flash memory device - Google Patents

Abstract

The invention discloses a light weight soft information obtaining method of a multi-layer flash memory device, aiming at extracting the soft information of data stored in the multi-layer flash memory device through a method of quantitatively recording noises in a flash memory channel and a corresponding statistic method, providing accurate and reliable soft information for an LDPC (Low Density Parity Check Code)error correction algorithm, obviously enhancing the LDPC error correction performance, reducing the uncorrectable error probability of a flash memory chip, and effectively prolonging the service life of the multi-layer flash memory device. The soft information obtaining technology aiming at the multi-layer flash memory device can be also widely applied to systems adopting 2-bit MLC, 3-bit MLC (TLC) flash memories as storage media, and the service life of the flash memory chip can be prolonged.

Description

The soft information getting method of lightweight of multi-level flush memory device

Technical field

The present invention relates to the technical field of data storage take flush memory device as storage medium such as solid-state hard disk controller, flash controller, be specifically related to a kind of lightweight software information acquisition methods for flash disk operation.

Background technology

In solid state hard disc, adopt in a large number non-volatile flash chip as storage medium.Yet flash chip is along with the increase of erase-write cycles, and its physical characteristics progressively fails, and causes the mistake of save data to roll up.Finally, the bit number of mistake can surpass the error correcting capability of system, thereby causes user data to lose efficacy.The decline of the physical characteristics of flash chip seems more remarkable along with the raising of flash chip manufacture craft, and especially after manufacturing process entered into the stage of inferior 20 nanometers, the flash memory life-span of adopting new technology only can reach adopted 1/3 of previous generation technique flash memory.The fast-descending trend in the serviceable life of flash chip has greatly restricted the application of flash chip, and particularly in the solid state hard disc field, the introducing of new technology is to having formed huge challenge in serviceable life of solid state hard disc.

In order to prolong the serviceable life of flash chip, guarantee the safety of user data, be designed with correction module in the solid-state hard disk controller, the data that read from flash chip are carried out correction process, eliminate the mistake in the data.Traditionally, the Error Correction of Coding of main flow all adopts BCH code, and this coded system is calculated fast, and error correcting capability is strong.Yet along with the raising of flash chip manufacturing process, the BCH error correction algorithm can't provide enough error correcting capabilities for flash chip.Widely used LDPC code (low density parity check code) relies on its powerful error correcting capability to begin to become the new trend of in the future flash error correction development in communication field.

Although LDPC code error-correcting performance is powerful, bring into play its function need to provide the soft information of reading out data as input.Yet flash controller can only read the discrete message that is made of logic ' 0 ' and logic ' 1 ' from the standard interface of flash chip, can't directly provide its needed soft information for LDPC.At present, the voltage sensor of the main many groups of different threshold values by flash chip inside of existing paper and patent is sampled to storage unit internal physical voltage status in the flash chip, and by the ADC(analog-digital conversion) analog voltage of storage unit in the flash chip is quantified as the mode of digital quantity, obtain soft information, and carry out the LDPC decode operation based on this.Although this mode is accurate, but complicated operation, and need to depend on flash memory vendors provides the internal command of flash chip to help obtain soft information, and the internal command that different flash memory vendors provides is not quite similar again, thereby limited the application of LDPC code in solid state hard disc, such as reference paper [1] Guiqiang Dong, Ningde Xie, Tong Zhang.On the Use of Soft-Decision Error-Correction Codes in NAND Flash Memory.IEEE Transactions on circuits and system – I:Regular papers, Vol.58No.2.2011.2; Reference paper [2] Jiadong Wang, Thomas Courtade, Hari Shankar, Richard D.Wesel.Soft Information for LDPC Decoding in Flash:Mutual-Information Optimized Quantization.IEEE Globecom2011proceedings; Reference paper [3] Dong-hwan Lee.Estimation of NAND Flash Memory Threshold Voltage Distribution for Optimum Soft-Decision Error Correction.IEEE Transactions on Signal Processing, Vol.61, Issue2.2013.1.The obtain manner of another soft information is the Disturbance Model of utilizing between the flash memory cell, by from the logical value of flash memory output, recovering the soft information of data, such as reference paper [4] Daesung Kim, Jinho Choi, Jeongseok Ha.On the Soft Information Extraction from Hard-Decision Outputs in MLC NAND Flash Memory.IEEE Globecom2012proceedings.This mode need to be utilized the many groups voltage sensor in the flash chip equally, is subjected to the flash chip structural limitations, and calculation of complex, is unfavorable for Project Realization.

Summary of the invention

Technical matters to be solved by this invention provides the soft information getting method of a kind of lightweight for multi-level storage unit flash memory, be different from prior art and require the accurately method of the threshold voltage value of estimation, can realize from the flush memory device of standard interface, directly obtaining soft information, the serviceable life of having improved flash chip in engineering.

For can optimization LDPC Algorithm Performance, corresponding soft information need to be arranged as input, yet flash chip can only provide the discrete logic information after the quantification.Therefore, the present invention proposes a kind of method of obtaining the soft information of flush memory device by statistics.Its technical conceive is, by the statistics in the past error message in the flash chip physical block, quantitatively estimate the noise of flash-memory channels, when the flash controller reading out data, calculate the soft information of reading out data according to the error characteristic of Physical Page in the noise figure of estimating and the physical block, utilize at last the LDPC algorithm that the data that read are carried out error correction calculations, thereby obtain accurately data message.

For the MLC flash chip, 4 voltage statuss of 1 physical memory cell correspond respectively to 2 logical values, i.e. high-order (MSB) logical value and low level (LSB) logical value.According to the mapping relations that interweave of flash chip internal logic value and physics voltage status, can be obtained by the logical value of MSB and LSB the voltage status of floating boom in the physical memory cell, this process is called the computing that interweaves; Similarly, also can be obtained by the floating boom voltage status in the physical memory cell MSB and the LSB logical value of respective memory unit, this process is called the deinterleaving computing.

The soft information getting method of the lightweight for multi-level storage unit flash memory that the present invention proposes may further comprise the steps:

Step ⅰ, the voltage status of establishing the flash memory physical memory cell are X _i(X _i∈ X, X={X ₀, X ₁, X ₂, X ₃), the voltage status that the logical value of reading from flash chip obtains by the deinterleaving computing is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃), then in the process of flash chip operation, to add up take physical block as unit, the voltage status of preserving when physical memory cell is X _iThe time, it is Y by the interweave voltage status of resulting this physical memory cell of computing of de-interleaving _jProbability P (Y _j| X _i), P (Y _j| X _i) characterized in the flash-memory channels noise to the interference of data message;

Step ⅱ, when flash controller during from the flash chip reading out data, the logical data collected according to the computing that interweaves of the mapping relations of flash chip, is obtained the physics voltage status Y that physical memory cell is preserved in the current flash chip _j

Step ⅲ, utilize Bayesian formula to calculate respectively when being Y by the resulting flash memory physics of deinterleaving computing voltage status _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃) time, the physics voltage status that its storage unit is preserved is X _iProbability P (X _i| Y _j); X _iBe respectively X ₀, X ₁, X ₂And X ₃Probability be respectively:

$P\left(X_0\right|Y_j)=\frac{P\left(Y_j\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(1\right)$

$P\left(X_1\right|Y_j)=\frac{P\left(Y_j\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(2\right)$

$P\left(X_2\right|Y_j)=\frac{P\left(Y_j\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(3\right)$

$P\left(X_3\right|Y_j)=\frac{P\left(Y_j\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(4\right)$

Wherein, P (X ₀), P (X ₁), P (X ₂) and P (X ₃) be respectively recording voltage state X in the flash memory ₀, X ₁, X ₂, X ₃Prior probability, i.e. prior known X ₀, X ₁, X ₂And X ₃Distribution probability; P (Y _j| X ₀), P (Y _j| X ₁), P (Y _j| X ₂) and P (Y _j| X ₃) be the probability record of having collected.

Step ⅳ, according to the mapping relations of deinterleaving computing, calculate the log-likelihood ratio (Log Likelihood Ratio) of data message, thereby obtain the soft information of receive data.

The flash memory physical state that receives when flash controller is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃) time, the log-likelihood ratio of corresponding MSB and LSB logical value can obtain by following formula:

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P\left(X_2\right|Y_j)+P\left(X_3\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_1\right|Y_j)}---\left(5\right)$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P\left(X_1\right|Y_j)+P\left(X_2\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_3\right|Y_j)}---\left(6\right)$

Like this, will

With

To be updated in the LDPC error correction algorithm as the soft information of MSB and LSB logical value and calculate, thereby bring into play to greatest extent the performance of LDPC error correction algorithm.

The technical scheme of further optimizing is, after finishing LDPC error correction calculations, counts under the current state, and the physics voltage status of preserving when storage unit is X _iThe time, be Y by the resulting flash memory physics of deinterleaving computing voltage status _jProbability P _Δ(Y _j| X _i).When obtaining the soft information of lightweight, use P next time _Δ(Y _j| X _i) P (Y in replacement formula (1)-(6) _j| X _i), the log-likelihood ratio of calculating MSB and LSB logical value.Be conducive to like this improve the accuracy of each soft acquisition of information computing.

Further be that establishing and obtain the soft information of lightweight for the t time, finish the later storage unit physics voltage status of LDPC error correction calculations is X _i, be Y by the resulting flash memory physics of deinterleaving computing voltage status _jThe probability meter make P ^(t)(Y _j| X _i), t is natural number.Then utilize following formula iterative computation P ^(t)(Y _j| X _i):

P ^(t)(X _i|Y _j)＝α ₁P ^(t-1)(X _i|Y _j)+α ₂P _Δ(X _i|Y _j), α ₁,α ₁∈[0,1]

Wherein, α ₁And α ₂Be respectively P ^(t-1)(Y _j| X _i) and P _Δ(Y _j| X _i) weighted value.Probability P when iteration begins ⁽⁰⁾(Y _j| X _i) can rule of thumb provide.When obtaining the soft information of lightweight, use P next time ^(t)(Y _j| X _i) P (Y in replacement formula (1)-(6) _j| X _i), the log-likelihood ratio of calculating MSB and LSB logical value.Thereby more improved the accuracy of each soft acquisition of information computing.

Further, in the MLC flash chip, the error property between the inner different Physical Page of Same Physical piece is also inhomogeneous, therefore, in order to optimize the performance of LDPC error correction algorithm, the present invention further considers the error characteristic information of Physical Page in the process of calculating soft information.At record probability P (Y _j| X _i) time, the present invention will record respectively the probability situation of each Physical Page: P ₁(Y _j| X _i), P ₂(Y _j| X _i), P ₃(Y _j| X _i) ... P _n(Y _j| X _i), wherein n is the number of Physical Page in the physical block.When flash controller need to be to the soft information calculations in k the Physical Page, only need to adopt P _k(Y _j| X _i) calculate and get final product:

$P_k\left(X_0\right|Y_0)=\frac{P_k\left(Y_0\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_1\right|Y_0)=\frac{P_k\left(Y_0\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_2\right|Y_0)=\frac{P_k\left(Y_0\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_3\right|Y_0)=\frac{P_k\left(Y_0\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P_k\left(X_2\right|Y_j)+P_k\left(X_3\right|Y_j)}{P_k\left(X_0\right|Y_j)+P_k\left(X_1\right|Y_j)}$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P_k\left(X_1\right|Y_j)+P_k\left(X_2\right|Y_j)}{P_k\left(X_0\right|Y_j)+P_k\left(X_3\right|Y_j)}$

Method after process is optimized improves the accuracy in the soft information access process, provides more information to process to the LDPC error correction algorithm, reduces the not probability of correctable error to occur.The present invention utilizes the method for statistics to extract the soft information of its storage data from multi-level flush memory device (2-bit MLC, 3-bit TLC), thereby has significantly improved the performance of error correction algorithm, has effectively prolonged the serviceable life of multi-level flush memory device.This technology is fit to be applied in the occasions take flush memory device as storage medium such as solid-state hard disk controller, flash controller, to improve the robustness of memory device, prolongs the serviceable life of memory device.

Description of drawings

Below in conjunction with the drawings and specific embodiments technical scheme of the present invention is further described in detail.

Fig. 1 is the mapping schematic diagram of logical value and physics voltage status in the flash memory cell.

Fig. 2 is flash-memory channels model schematic diagram.

Fig. 3 is the schematic flow sheet of soft technology for information acquisition.

Embodiment

In the MLC flash chip, can keep 4 kinds of stable voltage statuss in 1 physical memory cell.These 4 kinds of voltage statuss are mapped as the combination of 2 logical values, thereby realize 2 logical values of 1 physical memory cell preservation.Fig. 1 has described the mapping relations in a certain MLC flash chip.Be set with four kinds of physics voltage status: E, D1, D2 and D3 in the physical memory cell of this MLC flash chip.Corresponding logical value is divided into high-order logical value (MSB) and low level logical value (LSB) with it, and corresponds respectively to { 1,1}, { 1,0}, { 0,0}, { 0,1}.

Flash chip has been realized the mapping operations between physics voltage status and the logical value by computing and this dual mode of deinterleaving computing of interweaving.In the process of programming to flash chip, flash chip is converted into the physics voltage status that physical memory cell should be preserved with the logical value of input by the computing that interweaves.For example, when MSB and the LSB of input be during 1,0}, and flash chip inner understand corresponding physical memory cell is programmed into voltage status D1.Correspondingly, in reading the process of flash memory chip data, flash chip is quantified as definite voltage status with the magnitude of voltage of current preservation, and then carries out the deinterleaving computing, is converted to corresponding logical value after the physics voltage status is quantized.For example, when the voltage status after quantizing in the flash chip physical memory cell is D1, by the deinterleaving computing, flash chip will export to the outside that MSB is 1, LSB is 0 logical value.

When information is kept at the inside of flash chip, can be subject to inevitably the interference of chip internal noise.As shown in Figure 2, write fashionablely from the flash chip outside when data, flash chip at first carries out interlace operation, and the physics voltage status that then will write by programming operation is converted into the magnitude of voltage of the required preservation of storage unit.When needs during from the inner reading out data of flash chip, flash chip is the mode by quantizing to read then, and analog voltage is quantified as definite voltage status, then by the deinterleaving operation, obtains corresponding logical value.The aanalogvoltage information that is kept in the storage unit can be subject to the disturbing influence of various additive noises, and changes.Serious noise even can make reads the logical data that the obtains upset that meets accident, thereby leads to errors.

Noise disturbance in the flash chip is unfixing, and along with flash chip loss in use, the disturbance of noise presents the trend of continuous enhancing.This noise disturbance has affected the serviceable life of flash chip.Therefore, in order to obtain more exactly the soft information in the flash chip, need to carry out record to the impact of voltage status in the storage unit to the noise of flash chip in operating process.

In the ideal case, the voltage status of flash memory cell storage is E, D1, D2, D3.In operating process, hypothetical record primary voltage state corresponding with perfect condition in flash memory cell is X _i(X _i∈ X, X={X ₀, X ₁, X ₂, X ₃); The voltage status that the logical value of reading from flash chip obtains by the deinterleaving computing is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃).Through after the error correction calculations, flash controller can obtain being recorded in the primary voltage state of flash memory cell, by the primary voltage state of storage is compared with the number of the voltage status of reading, can obtain: when the primary voltage state is X _iThe time, the read-out voltage state is Y _jProbability P (Y _j| X _i).For example, be X by statistics primary voltage state ₃Number, and be X at the primary voltage state ₃And the voltage status of reading is Y ₂Number, can calculate when the primary voltage state be X ₃The time read-out voltage state be Y ₂Probability P (Y ₂| X ₃).Because the noise disturbance in the flash chip is along with operation is also changing, its impact on flash memory cell is also changing, so, probability P (Y after each error-correction operation finishes _j| X _i) all will go on record.

The interface of flash chip can only provide the logical value of storage unit, yet the LDPC error correction algorithm need to soft information as input, therefore, need and can get access to the probabilistic information of the data of accepting as the input of LDPC error correction algorithm from the logical message that receives.The present invention at first to the logical data collected according to the computing that interweaves of the mapping relations of flash chip, obtain the physics voltage status Y that storage array is preserved in the current flash chip.After calculating the voltage status of current memory cell, the present invention will utilize Bayesian formula according to the probability record of flash chip, and calculating respectively the flash memory physical state that ought receive is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃) time, the physical state that its storage unit is preserved is X _i(X _i∈ X, X={X ₀, X ₁, X ₂, X ₃) posterior probability P (X _i| Y _j).

For example, the flash memory physical state that receives when flash controller is Y ₀The time, the voltage status that this storage unit is preserved is respectively X ₀, X ₁, X ₂And X ₃Probability be respectively:

$P\left(X_0\right|Y_j)=\frac{P\left(Y_j\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(1\right)$

$P\left(X_1\right|Y_j)=\frac{P\left(Y_j\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(2\right)$

$P\left(X_2\right|Y_j)=\frac{P\left(Y_j\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(3\right)$

$P\left(X_3\right|Y_j)=\frac{P\left(Y_j\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(4\right)$

Wherein, P (X ₀), P (X ₁), P (X ₂) and P (X ₃) be respectively in the flash memory prior probability of storage information, i.e. prior known X ₀, X ₁, X ₂And X ₃Distribution probability; P (Y ₀| X ₀), P (Y ₀| X ₁), P (Y ₀| X ₂) and P (Y ₀| X ₃) can be obtained by the probability that the past collects.In like manner, can also calculate P (X ₀| Y ₁), P (X ₁| Y ₁), P (X ₂| Y ₁), P (X ₃| Y ₁), P (X ₀| Y ₂), P (X ₁| Y ₂), P (X ₂| Y ₂), P (X ₃| Y ₂), P (X ₀| Y ₃), P (X ₁| Y ₃), P (X ₂| Y ₃), P (X ₃| Y ₃).

Finish on the basis that posterior probability is calculated, the present invention will according to the mapping relations of deinterleaving computing, calculate and MSB and the corresponding log-likelihood ratio of LSB logical value (Log Likelihood Ratio), as the soft information of receive data

For example, the flash memory physical state that receives when flash controller is Y ₀The time, the log-likelihood ratio of corresponding MSB and LSB logical value can obtain by following formula:

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P\left(X_2\right|Y_j)+P\left(X_3\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_1\right|Y_j)}---\left(5\right)$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P\left(X_1\right|Y_j)+P\left(X_2\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_3\right|Y_j)}---\left(6\right)$

In like manner, can calculate

Finally, with resulting LLR _MSB|YAnd LLR _LSB|YTo in the LDPC error correction algorithm, calculate as the soft input information of MSB and LSB logical value, thereby bring into play to greatest extent the performance of LDPC error correction algorithm.

After finishing the LDPC error correction calculations, the present invention will compare the data message before and after the error correction computing, and counting the physical state of preserving when storage unit is X _iThe time, it is Y by the resulting flash memory physical state of deinterleaving computing _jProbability P (Y _j| X _i), as the current erroneous condition P of flash chip physical block _Δ(Y _j| X _i).On this basis, the present invention will be according to the probability P of collecting in physical block past the t-1 time iterative process ^(t-1)(Y _j| X _i), utilize following formula to carry out interative computation, calculate and carry out the needed probability P of iteration the t time ^(t)(Y _j| X _i):

P ^(t)(X _i|Y _j)＝α ₁P ^(t-1)(X _i|Y _j)+α ₂P _Δ(X _i|Y _j), α ₁,α ₁∈[0,1]

Wherein, α ₁And α ₂Be respectively P ^(t-1)(Y _j| X _i) and P _Δ(Y _j| X _i) weighted value.Probability P when iteration begins ⁽⁰⁾(Y _j| X _i) can rule of thumb provide.New probability record P ^(t)(Y _j| X _i) will be to this physical block record of the probability in soft information calculations process P (Y next time _j| X _i) participate in computing, thus the accuracy of each soft acquisition of information computing guaranteed.

In order to optimize further soft technology for information acquisition, the present invention has added up respectively the probabilistic information of each Physical Page in the physical block when statistics P (Y|X).For 1 physical block structure with 128 Physical Page.In the process of flash chip operation, the error probability of each Physical Page is also inhomogeneous.The present invention further considers the error characteristic information of Physical Page in the process of calculating soft information, take meticulousr recording mode, substitutes the probability P (Y of state variation in the general record physical block _j| X _i).The probability of each Physical Page will be collected respectively in the physical block: P ₁(Y _j| X _i), P ₂(Y _j| X _i), P ₃(Y _j| X _i) ... P _n(Y _j| X _i), wherein n is the number of Physical Page in the physical block.When flash controller need to be to the soft information calculations of k Physical Page, only need to use P _k(Y _j| X _i) calculate and get final product.

For example, when the data message of flash controller to the 13rd Physical Page, when carrying out soft acquisition of information, by the probability record P in this Physical Page past of index ₁₃(Y _j| X _i), be updated to Bayesian formula and calculate and get final product.

$P_{13}\left(X_0\right|Y_0)=\frac{P_{13}\left(Y_0\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_{13}\left(Y_0\right|X_i)}$

$P_{13}\left(X_1\right|Y_0)=\frac{P_{13}\left(Y_0\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_{13}\left(Y_0\right|X_i)}$

$P_{13}\left(X_2\right|Y_0)=\frac{P_{13}\left(Y_0\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_{13}\left(Y_0\right|X_i)}$

$P_{13}\left(X_3\right|Y_0)=\frac{P_{13}\left(Y_0\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_{13}\left(Y_0\right|X_i)}$

Because the probability P for Physical Page ₁₃(Y _j| X _i) than the probability P (Y of past for physical block _j| X _i) record meticulouslyr, the quantity of information that comprises is more, therefore, has improved the correctness to soft information calculations, has strengthened the performance of error correction algorithm.The account form of its LLR is:

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P_{13}\left(X_2\right|Y_j)+P_{13}\left(X_3\right|Y_j)}{P_{13}\left(X_0\right|Y_j)+P_{13}\left(X_1\right|Y_j)}$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P_{13}\left(X_1\right|Y_j)+P_{13}\left(X_2\right|Y_j)}{P_{13}\left(X_0\right|Y_j)+P_{13}\left(X_3\right|Y_j)}$

The complete workflow of soft technology for information acquisition proposed by the invention as shown in Figure 3.In realizing process of the present invention, can be with the error probability P (Y in the operating process _j| X _i) (wherein, i ≠ j) preserve.When starting soft technology for information acquisition, at first judge whether it is to start for the first time.If start for the first time, then the historical experience configuration error probability according to the past records P (Y _j| X _i) initial value; Otherwise, will directly begin reading out data from flash chip.After reading out the logical value of data message, obtain voltage status Y according to the mapping relations between logical message and the voltage status _j, and statistical computation probability record P (Y _j| X _i), then utilize formula (1)-(6) to calculate the soft information of corresponding MSB and LSB logical value, and substitution LDPC error correction algorithm calculates, thereby obtain the correct result after the verification.Behind the LDPC error checking and correction, iteration is upgraded error probability record P (Y _j| X _i) value, to guarantee the next time accuracy of soft acquisition of information.After finishing renewal, the present invention will check whether also have new operation, if also need new data to read, will proceed data read operation, otherwise with out of service.

It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (4)

1. the soft information getting method of the lightweight of a multi-level flush memory device is characterized in that, may further comprise the steps:

Step ⅰ, the voltage status of establishing the flash memory physical memory cell are X _i(X _i∈ X, X={X ₀, X ₁, X ₂, X ₃), the voltage status that the logical value of reading from flash chip obtains by the deinterleaving computing is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃), then in the process of flash chip operation, to add up take physical block as unit, the voltage status of preserving when physical memory cell is X _iThe time, it is Y by the interweave voltage status of resulting this physical memory cell of computing of de-interleaving _jProbability P (Y _j| X _i), P (Y _j| X _i) characterized in the flash-memory channels noise to the interference of data message;

Step ⅱ, when flash controller during from the flash chip reading out data, the logical data collected according to the computing that interweaves of the mapping relations of flash chip, is obtained the physics voltage status Y that physical memory cell is preserved in the current flash chip _j

Step ⅲ, utilize Bayesian formula to calculate respectively when being Y by the resulting flash memory physics of deinterleaving computing voltage status _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃) time, the physics voltage status that its storage unit is preserved is X _iProbability P (X _i| Y _j); X _iBe respectively X ₀, X ₁, X ₂And X ₃Probability be respectively:

$P\left(X_0\right|Y_j)=\frac{P\left(Y_j\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(1\right)$

$P\left(X_1\right|Y_j)=\frac{P\left(Y_j\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(2\right)$

$P\left(X_2\right|Y_j)=\frac{P\left(Y_j\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(3\right)$

$P\left(X_3\right|Y_j)=\frac{P\left(Y_j\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P\left(Y_j\right|X_i)}---\left(4\right)$

Wherein, P (X ₀), P (X ₁), P (X ₂) and P (X ₃) be respectively recording voltage state X in the flash memory ₀, X ₁, X ₂, X ₃Prior probability, i.e. prior known X ₀, X ₁, X ₂And X ₃Distribution probability; P (Y _j| X ₀), P (Y _j| X ₁), P (Y _j| X ₂) and P (Y _j| X ₃) be the probability record of having collected;

Step ⅳ, according to the mapping relations of deinterleaving computing, calculate the log-likelihood ratio (Log Likelihood Ratio) of data message, thereby obtain the soft information of receive data;

The flash memory physical state that receives when flash controller is Y _j(Y _j∈ Y, Y={Y ₀, Y ₁, Y ₂, Y ₃) time, the log-likelihood ratio of corresponding MSB and LSB logical value can obtain by following formula:

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P\left(X_2\right|Y_j)+P\left(X_3\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_1\right|Y_j)}---\left(5\right)$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P\left(X_1\right|Y_j)+P\left(X_2\right|Y_j)}{P\left(X_0\right|Y_j)+P\left(X_3\right|Y_j)}---\left(6\right).$

2. the soft information getting method of the lightweight of multi-level flush memory device according to claim 1 is characterized in that, and is further comprising the steps of:

After finishing LDPC error correction calculations, count under the current state, the physics voltage status of preserving when storage unit is X _iThe time, be Y by the resulting flash memory physics of deinterleaving computing voltage status _jProbability P _Δ(Y _j| X _i);

When obtaining the soft information of lightweight, use P next time _Δ(Y _j| X _i) P (Y in replacement formula (1)-(6) _j| X _i), the log-likelihood ratio of calculating MSB and LSB logical value.

3. the soft information getting method of the lightweight of multi-level flush memory device according to claim 2 is characterized in that, and is further comprising the steps of:

If obtaining the soft information of lightweight for the t time, finishing the later storage unit physics voltage status of LDPC error correction calculations is X _i, be Y by the resulting flash memory physics of deinterleaving computing voltage status _jThe probability meter make P ^(t)(Y _j| X _i), t is natural number; Then utilize following formula iterative computation P ^(t)(Y _j| X _i):

P ^(t)(X _i|Y _j)＝α ₁P ^(t-1)(X _i|Y _j)+α ₂P _Δ(X _i|Y _j), α ₁,α ₁∈[0,1]

Wherein, α ₁And α ₂Be respectively P ^(t-1)(Y _j| X _i) and P _Δ(Y _j| X _i) weighted value, the probability P when iteration begins ⁽⁰⁾(Y _j| X _i) can rule of thumb provide;

When obtaining the soft information of lightweight, use P next time ^(t)(Y _j| X _i) P (Y in replacement formula (1)-(6) _j| X _i), the log-likelihood ratio of calculating MSB and LSB logical value.

4. according to claim 1 to the soft information getting method of lightweight of one of 3 described multi-level flush memory devices, it is characterized in that, further comprising the steps of: at record probability P (Y _j| X _i) time, record respectively the probability situation P of each Physical Page _k(Y _j| X _i): P ₁(Y _j| X _i), P ₂(Y _j| X _i), P ₃(Y _j| X _i) ... P _n(Y _j| X _i), wherein n is the number of Physical Page in the physical block, 1≤k≤n;

When flash controller need to be to the soft information calculations in k the Physical Page, only need to adopt a following formula to calculate and get final product:

$P_k\left(X_0\right|Y_0)=\frac{P_k\left(Y_0\right|X_0)P\left(X_0\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_1\right|Y_0)=\frac{P_k\left(Y_0\right|X_1)P\left(X_1\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_2\right|Y_0)=\frac{P_k\left(Y_0\right|X_2)P\left(X_2\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

$P_k\left(X_3\right|Y_0)=\frac{P_k\left(Y_0\right|X_3)P\left(X_3\right)}{\underset{i=0}{\overset{3}{\mathrm{\Σ}}}P\left(X_i\right)P_k\left(Y_0\right|X_i)}$

${\mathrm{LLR}}_{{\mathrm{MSB}|Y}_j}=\log \frac{P_k\left(X_2\right|Y_j)+P_k\left(X_3\right|Y_j)}{P_k\left(X_0\right|Y_j)+P_k\left(X_1\right|Y_j)}.$

${\mathrm{LLR}}_{{\mathrm{LSB}|Y}_j}=\log \frac{P_k\left(X_1\right|Y_j)+P_k\left(X_2\right|Y_j)}{P_k\left(X_0\right|Y_j)+P_k\left(X_3\right|Y_j)}.$

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