CN103346873A

CN103346873A - Method and device for time synchronization

Info

Publication number: CN103346873A
Application number: CN2013102608604A
Authority: CN
Inventors: 侯思剑; 傅健新; 葛湘
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2013-06-27
Filing date: 2013-06-27
Publication date: 2013-10-09
Anticipated expiration: 2033-06-27
Also published as: CN103346873B

Abstract

An embodiment of the invention provides a method and device for time synchronization, and relates to the field of communication. The method and device for time synchronization are adopted to lower realizing cost and complexity of an interaction time signal between a master clock plate and a standby clock plate. The method comprises the steps that a first clock plate obtains a pulse per second PPS signal and a corresponding time information TOD signal, the PPS signal and TOD information in the TOD signal are sent to a second clock plate through a time synchronization signal so that the second clock plate can conduct time synchronization according to the time synchronization signal, wherein the time synchronization signal comprises the PPS signal and the TOD information. The method and device are used for time synchronization.

Description

A kind of method and apparatus of time synchronized

Technical field

The present invention relates to the communications field, relate in particular to a kind of method and apparatus of time synchronized.

Background technology

Need the time synchronized between each network equipment in the Synchronization Network system.A kind of important channel of time synchronized is to realize by network equipment tracking time node, and the network equipment generally has two clock boards of backup mutually: master clock plate and be equipped with clock board, time signal need be input on the active and standby clock board interface simultaneously.

In the prior art, main in order to realize, be equipped with the synchronous of clock board temporal information, time signal need be transferred to the master simultaneously, be equipped with on the clock board, but, the network equipment has only an interface to every road time signal, can not satisfy the requirement that flows to the master clock plate and be equipped with clock board simultaneously, when this interface is connected fully on the clock board, need to realize by two holding wires main, be equipped with the mutual of time signal between the clock board, a kind of time signal form of main flow is: 1PPS (Pulse Per Second, pulse per second (PPS))+TOD (Time Of Date, temporal information) form, be that every road time signal is finished the time signal of 1PPS+TOD form in master clock plate and the transmission between the clock board fully by two holding wires (namely transmitting the holding wire of PPS signal and the holding wire of transmission TOD signal), but, because master clock plate and the interface that is equipped with between the clock board are limited, when the more time signal of transmission, needing increases more interface and connecting line, has increased the cost and the complexity that realize.

Summary of the invention

Embodiments of the invention provide a kind of method and apparatus of time synchronized, to reduce the master clock plate and to be equipped with realization cost and the complexity of mutual time signal between the clock board.

For achieving the above object, embodiments of the invention adopt following technical scheme:

First aspect provides a kind of method of time synchronized, comprising:

First clock board obtains pulse per second (PPS) PPS signal and time information corresponding TOD signal;

TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal, so that described second clock buttress carries out time synchronized according to described time synchronizing signal, wherein, described time synchronizing signal comprises described PPS signal and described TOD information.

In first kind of possible implementation of first aspect, when described first clock board was the master clock plate, described first clock board obtained the PPS signal and the TOD signal comprises:

Described first clock board generates PPS signal and TOD signal;

When described first clock board is that described first clock board obtains the PPS signal and the TOD signal comprises when being equipped with clock board: PPS signal and TOD signal that the described first clock board time of reception node sends.

In conjunction with first kind of possible implementation of first aspect, in second kind of possible implementation, when described first clock board is the master clock plate, described TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal before, described method also comprises:

The rising edge of determining described PPS signal arrive constantly and described PPS signal in the time span of high level, and arrive according to the rising edge of described PPS signal and to determine the initial moment of the described TOD information of transmission constantly;

The rising edge arrival moment, the first Preset Time length and the second Preset Time length according to described PPS signal generate first data select signal;

Wherein, described first data select signal indicates described first clock board to send described TOD information by described time synchronizing signal to described second clock plate at first level, indicates described first clock board to send described PPS signal by described time synchronizing signal to described second clock plate at second level; Described first level comprises high level, and described second level comprises low level; Perhaps, described first level comprises low level, and described second level comprises high level;

The described first Preset Time length arrives constantly in the time span of high level and less than the rising edge of described PPS signal less than described PPS signal and sends time span between initial moment of described TOD information; The described second Preset Time length greater than the initial moment of the transmission of described TOD information to the time span between the moment that is sent completely described TOD information.

In conjunction with first kind of possible implementation of first aspect, in the third possible implementation, when described first clock board when being equipped with clock board, described TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal before, described method also comprises:

The rising edge that obtains described PPS signal according to described PPS signal arrive constantly and described PPS signal in the time span of high level, and arrive according to the rising edge of described PPS signal and to determine the initial moment of the described TOD information of transmission constantly;

Determining that the first Preset Time length arrives constantly in the time span of high level and less than the rising edge of described PPS signal less than described PPS signal and when sending time span between initial moment of described TOD information, according to described rising edge arrive constantly, the described first Preset Time length and the second Preset Time length generates first data select signal;

The described second Preset Time length greater than the initial moment of the transmission of described TOD information to the time span between the moment that is sent completely described TOD information.

In conjunction with second kind of possible implementation or the third possible implementation, in the 4th kind of possible implementation, described TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal, comprising:

When definite described first data select signal is second level, send described PPS signal according to the described first Preset Time length;

When definite described first data select signal is first level, send described TOD information according to the described second Preset Time length.

Second aspect provides a kind of method of time synchronized, it is characterized in that, comprising:

The second clock plate receives the time synchronizing signal that first clock board sends, and wherein, described time synchronizing signal comprises PPS signal and TOD information;

Obtain described PPS signal and described TOD information according to described time synchronizing signal;

Carry out time synchronized according to described PPS signal and described TOD information.

In first kind of possible implementation of second aspect, described obtain described PPS signal and described TOD information according to described time synchronizing signal before, also comprise:

The rising edge of determining described time synchronizing signal arrives constantly;

The rising edge arrival moment, the first Preset Time length and the second Preset Time length according to described time synchronizing signal generate second data select signal;

Wherein, described second data select signal indicates described second clock plate to obtain described TOD information by described time synchronizing signal at first level, indicates described second clock plate to obtain described PPS signal by described time synchronizing signal at second level; Described first level comprises high level, and described second level comprises low level; Perhaps, described first level comprises low level, and described second level comprises high level;

The described first Preset Time length comprises that the rising edge of described time synchronizing signal arrives constantly to the time span between the initial switching instant of level of described second data select signal, and the described second Preset Time length comprises that moment of the initial switching of level of described second data select signal is to the level of described second data select signal time span between the switching instant again.

In conjunction with first kind of possible implementation, in second kind of possible implementation, describedly obtain described PPS signal and described TOD information according to described time synchronizing signal, comprising:

When definite described second data select signal is second level, obtain described PPS signal by described time synchronizing signal;

When definite described second data select signal is first level, obtain described TOD information by described time synchronizing signal.

The third aspect provides a kind of clock board, comprising:

Acquiring unit is used for obtaining PPS signal and corresponding TOD signal;

Transmitting element, be used for the described PPS signal of described acquiring unit acquisition and the TOD information of described TOD signal are sent to the second clock plate by time synchronizing signal, so that described second clock buttress carries out time synchronized according to described time synchronizing signal, wherein, described time synchronizing signal comprises described PPS signal and described TOD information.

In first kind of possible implementation of the third aspect, when described clock board was the master clock plate, described acquiring unit specifically was used for, and generated PPS signal and TOD signal;

When described clock board when being equipped with clock board, described acquiring unit specifically is used for, PPS signal and TOD signal that the time of reception node sends.

In conjunction with first kind of possible implementation, in second kind of possible implementation, when described clock board was the master clock plate, described clock board also comprised:

Processing unit, rising edge that be used for to determine described PPS signal arrive constantly and described PPS signal in the time span of high level, and arrive according to the rising edge of described PPS signal and to determine the initial moment of the described TOD information of transmission constantly;

The first signal generation unit is used for generating first data select signal according to the rising edge arrival moment, the first Preset Time length and the second Preset Time length of the definite described PPS signal of described processing unit;

In conjunction with first kind of possible implementation, in the third possible implementation, when described clock board is that described clock board also comprises when being equipped with clock board:

Detecting unit, be used for according to the rising edge that described PPS signal obtains described PPS signal arrive constantly and described PPS signal in the time span of high level, and arrive according to the rising edge of described PPS signal and to determine to send the initial moment of described TOD information constantly, and determine that the first Preset Time length arrives constantly in the time span of high level and less than the rising edge of described PPS signal less than described PPS signal and sends time span between initial moment of described TOD information;

The secondary signal generation unit, be used for determining that the first Preset Time length arrives constantly in the time span of high level and less than the rising edge of described PPS signal less than described PPS signal and when sending time span between initial moment of described TOD information at described detecting unit, according to described rising edge arrive constantly, the described first Preset Time length and the second Preset Time length generates first data select signal;

In conjunction with second kind of possible implementation or the third possible implementation, in the 4th kind of possible implementation, described transmitting element specifically is used for, and when definite described first data select signal is low level, sends described PPS signal according to the described first Preset Time length;

When definite described first data select signal is high level, send described TOD information according to the described second Preset Time length.

Fourth aspect provides a kind of clock board, comprising:

Acquiring unit is used for receiving the time synchronizing signal that first clock board sends, and wherein, described time synchronizing signal comprises PPS signal and TOD information;

Processing unit, the time synchronizing signal that obtains according to described acquiring unit obtains described PPS signal and described TOD information;

Lock unit is used for carrying out time synchronized according to described PPS signal and described TOD information that described processing unit obtains.

In first kind of possible implementation of fourth aspect, described clock board also comprises:

Detecting unit is used for determining that the rising edge of described time synchronizing signal arrives constantly;

The first signal generation unit is used for generating second data select signal according to the rising edge arrival moment, the first Preset Time length and the second Preset Time length of the definite time synchronizing signal of described detecting unit;

In conjunction with first kind of possible implementation, in second kind of possible time mode, described processing unit specifically is used for, and when definite described second data select signal is second level, obtains described PPS signal by described time synchronizing signal;

The 5th aspect, the embodiment of the invention provide a kind of network equipment, comprise the described clock board of the above-mentioned third aspect and the described clock board of fourth aspect.

By adopting such scheme, first clock board obtains PPS signal and corresponding TOD signal, and the TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal, so that described second clock buttress carries out time synchronized according to described time synchronizing signal, like this, because first clock board is sent to the second clock plate with PPS signal and corresponding TOD signal by a signal (being the time synchronizing signal), thereby reduced the master, the interface and the connecting line that are equipped with mutual time signal between the clock board have reduced the master clock plate and have been equipped with realization cost and the complexity of mutual time signal between the clock board.

Description of drawings

In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.

The schematic diagram of a kind of method for synchronizing time that Fig. 1 provides for the embodiment of the invention;

A kind of data select signal that Fig. 2 provides for the embodiment of the invention and the reference view of time synchronizing signal;

The schematic diagram of the another kind of method for synchronizing time that Fig. 3 provides for the embodiment of the invention;

The schematic flow sheet of a kind of method for synchronizing time that Fig. 4 provides for the embodiment of the invention;

The schematic flow sheet of the another kind of method for synchronizing time that Fig. 5 provides for the embodiment of the invention;

The structural representation of a kind of clock board that Fig. 6 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Fig. 7 a provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Fig. 7 b provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Fig. 8 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Fig. 9 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 10 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 11 a provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 11 b provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 12 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 13 a provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 13 b provides for the embodiment of the invention;

The structural representation of a kind of network equipment that Figure 14 provides for the embodiment of the invention;

The structural representation of the another kind of network equipment that Figure 15 a provides for the embodiment of the invention;

The structural representation of the another kind of network equipment that Figure 15 b provides for the embodiment of the invention;

The structural representation of a kind of clock board that Figure 16 provides for the embodiment of the invention;

The structural representation of the another kind of clock board that Figure 17 provides for the embodiment of the invention.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.

The embodiment of the invention provides a kind of method of time synchronized, and as shown in Figure 1, the embodiment of the invention is applied to a kind of network equipment, and this network sets and comprises first clock board and second clock plate, and the executive agent of this method is first clock board, and this method comprises:

S101, first clock board obtain PPS signal and corresponding TOD signal.

Wherein, this PPS signal is low level at one's leisure, and this TOD signal is high level at one's leisure.

Particularly, network equipment acquisition PPS signal and corresponding TOD signal comprise following dual mode:

Mode one, the network equipment self generate PPS signal and corresponding TOD signal, and this PPS signal and corresponding TOD signal are sent to downstream network device, so that downstream network device and this network equipment are realized time synchronized.

At this moment, first clock board in the network equipment is the master clock plate, above-mentioned PPS signal and corresponding TOD signal are generated by this master clock plate, and then above-mentioned first clock board acquisition PPS signal and corresponding TOD signal are: this first clock board generates PPS signal and TOD signal.

Mode two, the PPS signal that network equipment time of reception node sends and corresponding TOD signal, thereby the time synchronized between realization and the timing node

At this moment, first clock board in the network equipment is for being equipped with clock board, then above-mentioned first clock board acquisition PPS signal and corresponding TOD signal are: PPS signal and TOD signal that this first clock board time of reception node sends, wherein, this timing node can be BITS (Building Integrated Timing System, Building Integrated Timing Supply) or upstream network device.

S102, first clock board are sent to the second clock plate with the TOD information in this PPS signal and this TOD signal by time synchronizing signal, so that this second clock buttress carries out time synchronized according to this time synchronizing signal.

Wherein, this time synchronizing signal comprises this PPS signal and this TOD information.

Need to prove, this time synchronizing signal is carved the maintenance low level at one's leisure, because the PPS signal is low level at one's leisure, therefore, in the rising edge arrival moment that the rising edge of this time synchronizing signal arrives and is this PPS signal constantly, this time synchronizing signal is kept high level always after rising edge arrives, after sending this TOD information, this time synchronizing signal switches back low level.

In addition, in embodiments of the present invention, this TOD information can send by the data segment signal on time synchronizing signal, and this data segment signal is used for transmission TOD information in the TOD signal, and this data segment signal is high level at one's leisure.

Further, first clock board can also comprise following two kinds of implementations before the TOD information in this PPS signal and this TOD signal is sent to the second clock plate by time synchronizing signal:

Mode one: (this first clock board generates PPS signal and TOD information when this first clock board is the master clock plate, corresponding second clock plate is clock board fully), first clock board is determined the rising edge arrival moment and the time span of this PPS signal at high level of this PPS signal, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly, and according to the rising edge of this PPS signal arrive constantly, the first Preset Time length and the second Preset Time length generates first data select signal.

Wherein, this first data select signal indicates this first clock board to send this TOD information by this time synchronizing signal to this second clock plate at first level, indicates this first clock board to send this PPS signal by this time synchronizing signal to this second clock plate at second level.This first level comprises high level, and this second level comprises low level; Perhaps, this first level comprises low level, and this second level comprises high level.

This first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, this second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

Need to prove, rising edge that this first preset length is this PPS signal arrives constantly to the time span between the initial switching instant of the level of this first data select signal, and the initial switching instant of level that this second preset length is this first data select signal is to the level of this first data select signal time span between the switching instant again.

Wherein, to be data select signal switch to the low level moment (namely the trailing edge of this data select signal arrives constantly) by high level to the initial switching instant of level, then Dui Ying level again switching instant be data select signal is switched to high level by low level the moment (namely the rising edge of this data select signal arrives the moment); Perhaps, to be data select signal switch to moment (namely the rising edge of this data select signal arrives constantly) of high level by low level to the initial switching instant of level, then Dui Ying level again switching instant be that data select signal switches to the low level moment (namely the trailing edge of this data select signal arrives the moment) by high level.

Mode two: when this first clock board is (PPS signal and TOD information that this first clock board time of reception node sends when being equipped with clock board, corresponding second clock plate is the master clock plate), first clock board obtains the rising edge arrival moment and the time span of this PPS signal at high level of this PPS signal according to this PPS signal, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly, and determining that the first Preset Time length arrives constantly and during the time span between the initial moment of this TOD information of transmission, first clock board arrives constantly according to this rising edge in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, this first Preset Time length and the second Preset Time length generate first data select signal.

Wherein, this first data select signal indicates this first clock board to send this TOD information by this time synchronizing signal to this second clock plate at first level, indicates this first clock board to send this PPS signal by this time synchronizing signal to this second clock plate at second level; This first level comprises high level, and this second level comprises low level; Perhaps, this first level comprises low level, and this second level comprises high level;

This second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

Need to prove, the above-mentioned first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission is in order to prevent when sending PPS signal (namely first data select signal is second level) in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, in the first Preset Time length, detect the trailing edge of the data segment signal that comprises TOD information, for example, if the first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission greater than the rising edge of this PPS signal, then when the trailing edge (namely sending the initial moment of this TOD information) of the data segment signal that comprises TOD information arrives, this first data select signal does not also switch to first level from second level, that is to say, though the delivery time of this TOD information arrives, but this TOD information does not send, thus the confusion that causes PSS signal and TOD information to send.Therefore, this first Preset Time length should arrive constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal.

The above-mentioned second Preset Time length is also not to be sent completely at the data segment signal that comprises TOD information in order to prevent greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information, and first data select signal just carries out the level switching makes time synchronizing signal begin to send the PPS signal of following one-period.

In addition, in a kind of possible implementation of the present invention, the time span of this time synchronizing signal is no more than 1 second, to prevent this time synchronizing signal and next frame time synchronizing signal stick together (be the rising edge that signal can not be identified the PPS signal of next frame time synchronizing signal, cause the mistake identification of first clock board).

Need to prove, in mode two, because PPS signal and TOD signal that the first clock board time of reception node sends, this PPS signal and TOD signal are in the process of transmission, may be subjected to the interference as disturbing factors such as noise jamming, make the PPS signal change in the time span of high level, therefore, in mode two, first clock board need determine that the first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, when first clock board satisfies above-mentioned condition in definite first Preset Time length, then generate first data select signal; When first clock board does not satisfy above-mentioned condition in definite first Preset Time length, then do not generate first data select signal.

In mode one, because this PPS signal and TOD signal are generated by first clock board self, then this PPS signal can freely be controlled in the time span of high level and the initial moment of this TOD information of transmission, therefore, as long as in the time span of high level and initial moment of sending this TOD information the Preset Time length of winning is arrived constantly and the time span between the initial moment of this TOD information of transmission by adjusting this PPS signal in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal.

Further, when this first clock board is second level at definite this first data select signal, send this PPS signal according to this first Preset Time length; When definite this first data select signal is first level, send this TOD information according to this second Preset Time length.

Particularly, describe in conjunction with Fig. 2, Fig. 2 comprises the waveform of first data select signal and the waveform of time synchronizing signal, wherein, among the figure direction of arrow identify each signal in time by earlier to after, first data select signal among the figure is high level with first level, second level is that low level is that example describes, then a is the rising edge arrival moment of first data select signal constantly among the figure, b is that the trailing edge of first data select signal arrives constantly constantly, and then a moment and b are the time span that this first data select signal synchronizing signal instruction time sends TOD information constantly; C is that the rising edge of time synchronizing signal arrives constantly constantly, d is that the trailing edge of time synchronizing signal arrives constantly constantly, the embodiment of the invention is by this time synchronizing signal PPS signal and the data segment signal that comprises TOD information to be sent to the second clock plate, wherein, m is the trailing edge arrival moment by the data segment signal of time synchronizing signal transmission constantly, n is that the rising edge of this data segment signal arrives constantly constantly, when the rising edge of this data segment signal arrives, represent that namely this TOD information is sent completely; A is the first Preset Time length, and the rising edge that this first preset length is the PPS signal arrives constantly to the time span between the rising edge arrival constantly of first data select signal; B is the second Preset Time length, the rising edge that this second Preset Time length is this first data select signal arrives constantly to the time span (that is this first data select signal is in time span of high level) between the trailing edge arrival constantly of this first data select signal, this first data select signal is low level in the first Preset Time length, is high level in the second Preset Time length.

(rising edge that is the time synchronizing signal arrives constantly first clock board after the rising edge of determining this PPS signal arrives constantly, namely c is constantly among the figure), the first data select signal opening entry, the first Preset Time length, at this moment, this first data select signal is low level, first clock board sends PPS signal by time synchronizing signal to the second clock plate according to this first data select signal, when definite this first data select signal is write the first Preset Time length (being a moment) all over, this first data select signal is converted to high level, and the opening entry second Preset Time length, at this moment, this time synchronizing signal is kept high level, first clock board is determined the trailing edge arrival moment (being the m moment) of this data segment signal in the second Preset Time length after, send TOD information by time synchronizing signal to the second clock plate, after the rising edge arrival moment of determining this data segment signal (being the n moment), determine that this TOD information is sent completely, this first data select signal is converted to low level, in order to proceed follow-up signal transmission.

Need explanation the time, above-mentioned description at Fig. 2 is to be high level with first level, second level is that low level is that example describes, the embodiment of the invention is not limited thereto, also can be that first level is low level, second level is high level, and its concrete implementation is similar to the above, therefore repeats no more.

Like this, because first clock board is sent to the second clock plate with PPS signal and corresponding TOD signal by a signal (being the time synchronizing signal), thereby reduced between the active and standby clock board interface and the connecting line of mutual time signal, reduced the master clock plate and be equipped with realization cost and the complexity of mutual time signal between the clock board.

Need to prove, the second clock plate is after receiving this time synchronizing signal, from this time synchronizing signal, obtain PPS signal and TOD signal, and by outer time interface PPS signal and TOD signal are sent to downstream network device, to realize the time synchronized between the downstream network device network equipment corresponding with above-mentioned first clock board and second clock plate, specifically as shown in Figure 3, the executive agent of this method embodiment is the second clock plate, and this method comprises:

S301, second clock plate receive the time synchronizing signal that first clock board sends.

Wherein, this time synchronizing signal comprises PPS signal and TOD information.

Need to prove that when first clock board was main equipment, this second clock plate was equipment fully, when first clock board is that this second clock plate is main equipment when being equipped with equipment.

S302, second clock buttress obtain this PPS signal and this TOD information according to this time synchronizing signal.

Further, the second clock plate is before obtaining this PPS signal and this TOD information according to this time synchronizing signal, the rising edge of determining this time synchronizing signal arrives constantly, and generates second data select signal according to the rising edge arrival moment, the first Preset Time length and the second Preset Time length of this time synchronizing signal.

Wherein, this second data select signal indicates this second clock plate to obtain this TOD information by this time synchronizing signal at first level, indicates this second clock plate to obtain this PPS signal by this time synchronizing signal at second level; This first level comprises high level, and this second level comprises low level; Perhaps, this first level comprises low level, and this second level comprises high level;

This first Preset Time length comprises that the rising edge of this time synchronizing signal arrives constantly to the time span between the initial switching instant of the level of this second data select signal, and this second Preset Time length comprises that moment of the initial switching of level of this second data select signal is to the level of this second data select signal time span between the switching instant again.

S303, second clock buttress carry out time synchronized according to this PPS signal and this TOD information.

Particularly, when the second clock plate is second level at definite this second data select signal, obtain this PPS signal by this time synchronizing signal, when the second clock plate is first level at definite this second data select signal, obtain this TOD information by this time synchronizing signal, for example, this second clock plate is for being equipped with clock board, this first level is high level, second level is low level, the second clock plate is low level at definite this second data select signal, and the rising edge of definite time synchronizing signal is when arriving, in the first Preset Time length, from this time synchronizing signal, obtain the PPS signal, when the second clock plate is high level at definite this second data select signal, in the second Preset Time length, from this time synchronizing signal, obtain TOD information, and respectively this PPS signal and TOD information are sent to downstream network device by the outer time interface on this second clock plate, in order to carry out time synchronized between the network equipment of this second clock plate correspondence and the downstream network device.

Need to prove, by foregoing description as can be seen, first clock board is with the PPS signal and TOD information is sent to the second clock plate by time synchronizing signal and the second clock buttress obtains the PPS signal according to time synchronizing signal and these two processes of TOD information all realize by data select signal, therefore, these two processes can be regarded two reciprocal processes as, and namely first clock board is sent to the second clock plate with PPS signal and TOD information by time synchronizing signal and can be understood as PPS signal and TOD information " synthesized " and send in time synchronizing signal; The second clock buttress obtains PPS signal and TOD information according to time synchronizing signal and can be understood as that " decomposition " goes out PPS signal and TOD information from time synchronizing signal.

Like this, second clock plate time of reception synchronizing signal, and from this time synchronizing signal, obtain PPS signal and corresponding TOD signal, thereby reduced between the active and standby clock board interface and the connecting line of mutual time signal, reduced the master clock plate and be equipped with realization cost and the complexity of mutual time signal between the clock board.

The embodiment of the invention provides a kind of method of time synchronized, this method be applied to the network equipment downstream the network equipment send the scene of PPS signal and TOD signal, this method is applied to a kind of network equipment, this network equipment comprises the master clock plate and is equipped with clock board, as shown in Figure 4, comprising:

S401, master clock plate generate PPS signal and corresponding TOD signal.

S402, master clock plate determine that the rising edge of this PPS signal arrives constantly and this PPS signal in the time span of high level, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly.

S403, master clock buttress generate first data select signal according to the rising edge arrival moment, the first Preset Time length and the second Preset Time length of this PPS signal.

In the embodiment of the invention, this first data select signal sends this TOD information by this time synchronizing signal to this second clock plate to indicate this first clock board at high level, and indicating this first clock board to send this PPS signal by this time synchronizing signal to this second clock plate in low level is that example describes.

S404, when definite this first data select signal is low level, the master clock plate sends the PPS signal by time synchronizing signal to being equipped with clock board in the first Preset Time length; When definite this first data select signal was high level, the master clock plate sent TOD information in the TOD signal by time synchronizing signal to being equipped with clock board in the second Preset Time length.

Its concrete description repeats no more with reference to above-mentioned description to Fig. 2 herein.

S405, be equipped with clock board and receive this time synchronizing signal.

S406, be equipped with clock board when the rising edge of determining this time synchronizing signal arrives, according to the rising edge of this time synchronizing signal arrive constantly, the first Preset Time length and the second Preset Time length generates second data select signal.

In the present embodiment, indicate this second clock plate to obtain this TOD information by this time synchronizing signal with this second data select signal at high level, indicating this second clock plate to obtain this PPS signal by this time synchronizing signal in low level is that example describes, does not limit.

S407, be equipped with clock board when definite this second data select signal is low level, in the first Preset Time length from time synchronizing signal acquisition PPS signal; When definite this second data select signal is high level, in the second Preset Time length, from time synchronizing signal, obtain TOD information.

S408, be equipped with clock board and respectively this PPS signal and TOD information be sent to downstream network device, so that this downstream network device is carried out time synchronized according to this PPS signal and TOD information and this network equipment.

Example ground, being equipped with clock board is low level at definite this second data select signal, and the rising edge of definite time synchronizing signal is when arriving, in the first Preset Time length, from this time synchronizing signal, obtain the PPS signal, be equipped with clock board when definite this second data select signal is high level, in the second Preset Time length, from this time synchronizing signal, obtain TOD information, and respectively this PPS signal and TOD information are sent to downstream network device by the outer time interface on this second clock plate, carried out time synchronized in order to should be equipped with between the network equipment of clock board correspondence and the downstream network device.

Adopt such scheme, because the master clock plate is sent to clock board fully with PPS signal and corresponding TOD signal by a signal (being the time synchronizing signal), thereby interface and the connecting line of mutual time signal between the active and standby clock board have been reduced, in the time synchronization process of realizing between the network equipment and the downstream network device, reduced the master clock plate and be equipped with realization cost and the complexity of mutual time signal between the clock board.

Need to prove, for above-mentioned method embodiment, for simple description, so it all is expressed as a series of combination of actions, but those skilled in the art should know, the present invention is not subjected to the restriction of described sequence of movement, because according to the present invention, some step can adopt other orders or carry out simultaneously.Secondly, those skilled in the art also should know, the embodiment described in the specification all belongs to preferred embodiment, and related action and module might not be that the present invention is necessary.

The embodiment of the invention provides a kind of method of time synchronized, this method is applied to the network equipment and receives BITS or the PPS signal of upstream network device transmission and the scene of TOD signal, this method is applied to a kind of network equipment, this network equipment comprises the master clock plate and is equipped with clock board, as shown in Figure 5, comprising:

S501, be equipped with clock board and receive PPS signal and the TOD signal that BITS or upstream network device send.

S502, be equipped with that rising edge that clock board obtains this PPS signal according to this PPS signal arrives constantly and this PPS signal in the time span of high level, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly.

S503, be equipped with clock board and determining that the first Preset Time length arrives constantly and during the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, according to this rising edge arrive constantly, this first Preset Time length and the second Preset Time length generates first data select signal.

In the embodiment of the invention, first data select signal sends this TOD information by this time synchronizing signal to this second clock plate to indicate this first clock board at high level, indicating this first clock board to send this PPS signal by this time synchronizing signal to this second clock plate in low level is that example describes, does not limit herein.This second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

S504, when definite this first data select signal is low level, be equipped with clock board and in the first Preset Time length, send the PPS signal by time synchronizing signal to the master clock plate; When definite this first data select signal is high level, is equipped with clock board and in the second Preset Time length, sends TOD information in the TOD signal by time synchronizing signal to the master clock plate.

S505, master clock plate receive this time synchronizing signal.

When S506, master clock plate arrive at the rising edge of determining this time synchronizing signal, according to the rising edge of this time synchronizing signal arrive constantly, the first Preset Time length and the second Preset Time length generates second data select signal.

When S507, master clock plate are low level at definite this second data select signal, in the first Preset Time length, from time synchronizing signal, obtain the PPS signal; When definite this second data select signal is high level, in the second Preset Time length, from time synchronizing signal, obtain TOD information.

S508, master clock plate carry out time synchronized according to this PPS signal and TOD information and BITS or upstream network device respectively.

Adopt such scheme, to be sent to the second clock plate by a signal (being the time synchronizing signal) from PPS signal and the corresponding TOD signal of BITS or upstream network device reception owing to be equipped with clock board, thereby interface and the connecting line of mutual time signal between the active and standby clock board have been reduced, in the time synchronization process of realizing between the network equipment and BITS or the upstream network device, reduced the master clock plate and be equipped with between the clock board realization cost and the complexity of time signal alternately.

The embodiment of the invention provides a kind of clock board 60, and as shown in Figure 6, this clock board 60 comprises:

Acquiring unit 61 is used for obtaining PPS signal and corresponding TOD signal.

Alternatively, when this clock board was the master clock plate, this acquiring unit specifically was used for, and generated PPS signal and TOD signal;

When this clock board when being equipped with clock board, this acquiring unit specifically is used for, PPS signal and TOD signal that the time of reception node sends.

Transmitting element 62 is used for this PPS signal of these acquiring unit 61 acquisitions and the TOD information of this TOD signal are sent to the second clock plate by time synchronizing signal, so that this second clock buttress carries out time synchronized according to this time synchronizing signal.

Alternatively, shown in Fig. 7 a, when this clock board was the master clock plate, this clock board 60 also comprised:

Processing unit 63, rising edge that be used for to determine this PPS signal arrive constantly and this PPS signal in the time span of high level, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly.

The first signal generation unit 64, the rising edge that is used for this PPS signal of determining according to this processing unit 63 arrives constantly, the first Preset Time length and the second Preset Time length generate first data select signal.

Wherein, this first data select signal indicates this first clock board to send this TOD information by this time synchronizing signal to this second clock plate at first level, indicates this first clock board to send this PPS signal by this time synchronizing signal to this second clock plate at second level; This first level comprises high level, and this second level comprises low level; Perhaps, this first level comprises low level, and this second level comprises high level.

This first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal; This second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

Alternatively, shown in Fig. 7 b, when this clock board is that this clock board 60 also comprises when being equipped with clock board:

Detecting unit 65, be used for obtaining according to this PPS signal the rising edge arrival moment and the time span of this PPS signal at high level of this PPS signal, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly, and determine that the first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal;

Secondary signal generation unit 66, be used for determining that at this detecting unit 65 first Preset Time length arrive constantly and during the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, according to this rising edge arrive constantly, this first Preset Time length and the second Preset Time length generates first data select signal;

Further, this transmitting element 62 specifically is used for, and when definite this first data select signal is low level, sends this PPS signal according to this first Preset Time length;

When definite this first data select signal is high level, send this TOD information according to this second Preset Time length.

(rising edge that is the time synchronizing signal arrives constantly this clock board after the rising edge of determining this PPS signal arrives constantly, namely c is constantly among the figure), the first data select signal opening entry, the first Preset Time length, at this moment, this first data select signal is low level, this clock board sends PPS signal by time synchronizing signal to the second clock plate according to this first data select signal, when definite this first data select signal is write the first Preset Time length (being a moment) all over, this first data select signal is converted to high level, and the opening entry second Preset Time length, at this moment, this time synchronizing signal is kept high level, this clock plate is determined the trailing edge arrival moment (being the m moment) of this data segment signal in the second Preset Time length after, send TOD information by time synchronizing signal to the second clock plate, after the rising edge arrival moment of determining this data segment signal (being the n moment), determine that this TOD information is sent completely, this first data select signal is converted to low level, in order to proceed follow-up signal transmission.

Adopt above-mentioned clock board, because clock board is sent to the second clock plate with PPS signal and corresponding TOD signal by a signal (being the time synchronizing signal), thereby reduced between the active and standby clock board interface and the connecting line of mutual time signal, reduced the master clock plate and be equipped with realization cost and the complexity of mutual time signal between the clock board.

The embodiment of the invention provides a kind of clock board 80, as shown in Figure 8, comprising:

Acquiring unit 81 is used for receiving the time synchronizing signal that first clock board sends.

Processing unit 82, the time synchronizing signal that obtains according to this acquiring unit 81 obtains this PPS signal and this TOD information;

Lock unit 83, this PPS signal and this TOD information of being used for obtaining according to this processing unit 82 are carried out time synchronized.

Optionally, as shown in Figure 9, this clock board 80 also comprises: detecting unit 84 is used for determining that the rising edge of this time synchronizing signal arrives constantly;

The first signal generation unit 85, the rising edge that is used for the time synchronizing signal determined according to this detecting unit 84 arrives constantly, the first Preset Time length and the second Preset Time length generate second data select signal;

Further, this processing unit 82 specifically is used for, and when definite this second data select signal is second level, obtains this PPS signal by this time synchronizing signal.

When definite this second data select signal is first level, obtain this TOD information by this time synchronizing signal.

Example ground, this clock board is for being equipped with clock board, this first level is high level, second level is low level, this clock board is low level at definite this second data select signal, and the rising edge of definite time synchronizing signal is when arriving, in the first Preset Time length, from this time synchronizing signal, obtain the PPS signal, when this clock board is high level at definite this second data select signal, in the second Preset Time length, from this time synchronizing signal, obtain TOD information, and respectively this PPS signal and TOD information are sent to downstream network device by the outer time interface on this second clock plate, in order to carry out time synchronized between the network equipment of this second clock plate correspondence and the downstream network device.

Adopt above-mentioned clock board, clock board time of reception synchronizing signal, and from this time synchronizing signal, obtain PPS signal and corresponding TOD signal, thereby reduced between the active and standby clock board interface and the connecting line of mutual time signal, reduced the master clock plate and be equipped with realization cost and the complexity of mutual time signal between the clock board.

The embodiment of the invention provides a kind of clock board 100, as shown in figure 10, comprising:

Controlled counter 101, the rising edge that is used for reception PPS signal arrives constantly, and the first Preset Time section and the second Preset Time section that arrive constantly, store according to the rising edge of this PPS signal generate first data select signal.

Wherein, this first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, this second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

Particularly, controlled counter is after the rising edge that receives the PPS signal arrives constantly, the opening entry first Preset Time length, after writing this first Preset Time length all over, carry out level and switch (switch to high level or switch to low level by high level by low level), after switch level, the opening entry second Preset Time length, after writing this first Preset Time length all over, carry out level again and switch.

Active and standby mutual sending end mouth 102, be used for receiving first data select signal that this controlled counter 101 sends, and according to this data select signal the PPS signal that receives and the TOD information in the TOD signal are sent to the second clock plate by time synchronizing signal, so that the second clock buttress carries out time synchronized according to this PPS signal and TOD information.

Particularly, when definite this data select signal is second level, this clock board is sent to the second clock plate with the PPS signal by time synchronizing signal, when definite this data select signal is first level, this clock board is sent to the second clock plate with TOD information by time synchronizing signal, wherein, this first level can be low level, and second level can be high level; Perhaps, this first level can be high level, and second level can be low level.

Alternatively, shown in Figure 11 a, this clock board 100 also comprises:

PPS signal sending end 103 be used for to generate the PPS signal, and the rising edge of the PPS signal that generates arrived is sent to controlled counter constantly.

TOD signal sending end 104 is used for generating the TOD signal, and the TOD signal that generates is sent to active and standby mutual sending end mouth.

Need to prove that this clock board can be the master clock plate.

Alternatively, shown in Figure 11 b, this clock board 100 also comprises:

Outer time interface 105 is used for PPS signal and TOD signal that the time of reception node sends, and this PPS signal and TOD signal are sent to active and standby mutual sending end mouth.

Wherein, this timing node can be BITS or upstream network device.

PPS signal detection module 106, the PPS signal that is somebody's turn to do outer time interface reception for basis determines that the rising edge of PPS signal arrives the moment, and the rising edge arrival moment of this PPS signal is sent to controlled counter.

Need to prove that this clock board can be to be equipped with clock board.

The embodiment of the invention provides a kind of clock board 120, as shown in figure 12, comprising:

Active and standby mutual sending end mouth 121 is used for receiving the time synchronizing signal that first clock board sends.

PPS signal detection module 122, the rising edge of the time synchronizing signal that receives for detection of this active and standby mutual sending end mouth 121 arrives constantly.

Controlled counter 123, the first Preset Time length and the second Preset Time length that arrive constantly, store for the rising edge according to this time synchronizing signal generate second data select signal.

Wherein, this first Preset Time length arrives constantly and the time span between the initial moment of this TOD information of transmission in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal; This second Preset Time length greater than the initial moment of the transmission of this TOD information to the time span between the moment that is sent completely this TOD information.

Alternatively, shown in Figure 13 a, this clock board 120 also comprises:

PPS signal receiving end 124, second data select signal that is used for generating according to controlled counter obtains the PPS signal from time synchronizing signal.

TOD signal receiving end 125 is used for the TOD information of second data select signal from time synchronizing signal acquisition TOD signal that generates according to controlled counter 123.

Particularly, when definite this second data select signal is first level, from time synchronizing signal, obtain the TOD information in the TOD signal, when definite this second data select signal is second level, from time synchronizing signal, obtain the PPS signal, wherein, this first level is high level, and second level is low level; Perhaps, this first level is low level, and second level is high level.

Need to prove that this clock board can be the master clock plate.

Alternatively, shown in Figure 13 b, this clock board 120 also comprises:

Outer time interface 126 is used for second data select signal that generates according to controlled counter 123 and obtains TOD information PPS signal and the TOD signal respectively from time synchronizing signal, and respectively PPS signal and TOD signal is sent to downstream network device.

Need to prove that this clock board can be for being equipped with clock board.

The embodiment of the invention provides a kind of network equipment 140, as shown in figure 14, comprising:

The clock board 80 that the clock board 60 that above-mentioned Fig. 6 or Fig. 7 (Fig. 7 a and Fig. 7 b) describe and above-mentioned Fig. 8 or Fig. 9 describe.

The embodiment of the invention provides a kind of network equipment 150, shown in Figure 15 a, comprising: the clock board 120 that the clock board 100 that above-mentioned Figure 10 or Figure 11 a describe and above-mentioned Figure 12 or Figure 13 b describe; Perhaps, shown in Figure 15 b, comprising:

The clock board 120 that the clock board 100 that above-mentioned Figure 10 or Figure 11 b describe and above-mentioned Figure 12 or Figure 13 a describe.

The embodiment of the invention provides a kind of clock board 160, and as shown in figure 16, this clock board 160 comprises:

Processor (processor) 161, communication interface (Communications Interface) 162, memory (memory) 163 and communication bus 164; Wherein, described processor 161, described communication interface 162 and described memory 163 are finished mutual communicating by letter by described communication bus 164.

Processor 161 may be a central processor CPU, or specific integrated circuit ASIC (Application Specific Integrated Circuit), or is configured to implement one or more integrated circuits of the embodiment of the invention.

Memory 163 is used for depositing program code, and described program code comprises computer-managed instruction.Memory 163 may comprise the high-speed RAM memory, also may also comprise nonvolatile memory (non-volatile memory), for example at least one magnetic disc store.

Described communication interface 162 is used for the connection communication between these devices of realization.

Described processor 161 executive program codes are used for obtaining pulse per second (PPS) PPS signal and time information corresponding TOD signal; And the TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal, so that described second clock buttress carries out time synchronized according to described time synchronizing signal, wherein, described time synchronizing signal comprises described PPS signal and described TOD information.

Alternatively, this processor 161 specifically is used for, and when this first clock board is the master clock plate, generates PPS signal and TOD signal; When this first clock board when being equipped with clock board, PPS signal and TOD signal that the time of reception node sends.

Alternatively, this processor 161 also is used for, when this first clock board is the master clock plate, before this is sent to the second clock plate with the TOD information in this PPS signal and this TOD signal by time synchronizing signal, determine the rising edge arrival moment and the time span of this PPS signal at high level of this PPS signal, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly, and according to the rising edge of this PPS signal arrive constantly, the first Preset Time length and the second Preset Time length generates first data select signal;

Alternatively, this processor 161 also is used for, when this first clock board is when being equipped with clock board, before this is sent to the second clock plate with the TOD information in this PPS signal and this TOD signal by time synchronizing signal, obtain the rising edge arrival moment and the time span of this PPS signal at high level of this PPS signal according to this PPS signal, and arrive according to the rising edge of this PPS signal and to determine to send the initial moment of this TOD information constantly, determining that the first Preset Time length arrives constantly and during the time span between the initial moment of this TOD information of transmission, arrives constantly according to this rising edge in the time span of high level and less than the rising edge of this PPS signal less than this PPS signal, this first Preset Time length and the second Preset Time length generate first data select signal;

Alternatively, this processor 161 specifically is used for, and when definite this first data select signal is second level, sends this PPS signal according to this first Preset Time length; When definite this first data select signal is first level, send this TOD information according to this second Preset Time length.

The embodiment of the invention provides a kind of clock board 170, and as shown in figure 17, this clock board 170 comprises:

Processor (processor) 171, communication interface (Communications Interface) 172, memory (memory) 173 and communication bus 174; Wherein, described processor 171, described communication interface 172 and described memory 173 are finished mutual communicating by letter by described communication bus 174.

Processor 171 may be a central processor CPU, or specific integrated circuit ASIC (Application Specific Integrated Circuit), or is configured to implement one or more integrated circuits of the embodiment of the invention.

Memory 173 is used for depositing program code, and described program code comprises computer-managed instruction.Memory 173 may comprise the high-speed RAM memory, also may also comprise nonvolatile memory (non-volatile memory), for example at least one magnetic disc store.

Described communication interface 172 is used for the connection communication between these devices of realization.

Described processor 171 executive program codes, be used for receiving the time synchronizing signal that first clock board sends, wherein, described time synchronizing signal comprises PPS signal and TOD information, obtain described PPS signal and described TOD information according to described time synchronizing signal, and carry out time synchronized according to described PPS signal and described TOD information.

Alternatively, this processor 171 also is used for, obtain this PPS signal and this TOD information according to this time synchronizing signal before, the rising edge of determining this time synchronizing signal arrives constantly, and generates second data select signal according to the rising edge arrival moment, the first Preset Time length and the second Preset Time length of this time synchronizing signal;

Alternatively, this processor 171 specifically is used for, and when definite this second data select signal is second level, obtains this PPS signal by this time synchronizing signal; When definite this second data select signal is first level, obtain this TOD information by this time synchronizing signal.

The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection range with claim.

Claims

1. the method for a time synchronized is characterized in that, comprising:

2. method according to claim 1 is characterized in that, when described first clock board was the master clock plate, described first clock board obtained the PPS signal and the TOD signal comprises:

Described first clock board generates PPS signal and TOD signal;

3. method according to claim 2 is characterized in that, when described first clock board is the master clock plate, described TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal before, described method also comprises:

4. method according to claim 2 is characterized in that, when described first clock board when being equipped with clock board, described TOD information in described PPS signal and the described TOD signal is sent to the second clock plate by time synchronizing signal before, described method also comprises:

5. according to claim 3 or 4 described methods, it is characterized in that, described TOD information in described PPS signal and the described TOD signal be sent to the second clock plate by time synchronizing signal, comprising:

6. the method for a time synchronized is characterized in that, comprising:

7. method according to claim 6 is characterized in that, described obtain described PPS signal and described TOD information according to described time synchronizing signal before, also comprise:

8. method according to claim 7 is characterized in that, describedly obtains described PPS signal and described TOD information according to described time synchronizing signal, comprising:

9. a clock board is characterized in that, comprising:

Acquiring unit is used for obtaining PPS signal and corresponding TOD signal;

10. clock board according to claim 9 is characterized in that, when described clock board was the master clock plate, described acquiring unit specifically was used for, and generates PPS signal and TOD signal;

11. clock board according to claim 10 is characterized in that, when described clock board was the master clock plate, described clock board also comprised:

12. clock board according to claim 10 is characterized in that, when described clock board is that described clock board also comprises when being equipped with clock board:

13. according to claim 11 or 12 described clock boards, it is characterized in that described transmitting element specifically is used for, when definite described first data select signal is low level, send described PPS signal according to the described first Preset Time length;

14. a clock board is characterized in that, comprising:

15. clock board according to claim 14 is characterized in that, described clock board also comprises:

16. clock board according to claim 15 is characterized in that, described processing unit specifically is used for, and when definite described second data select signal is second level, obtains described PPS signal by described time synchronizing signal;

17. a network equipment is characterized in that, comprises each described clock board and aforesaid right requirement 14 to 16 each described clock boards in the aforesaid right requirement 9 to 13.