CN103346122A

CN103346122A - High depth-to-width ratio TSV seed layer manufacturing method

Info

Publication number: CN103346122A
Application number: CN2013103058669A
Authority: CN
Inventors: 薛恺; 于大全
Original assignee: National Center for Advanced Packaging Co Ltd
Current assignee: National Center for Advanced Packaging Co Ltd
Priority date: 2013-07-22
Filing date: 2013-07-22
Publication date: 2013-10-09

Abstract

The invention relates to a high depth-to-width ratio TSV seed later manufacturing method in a microelectronic processing technology. The high depth-to-width ratio TSV seed later manufacturing method aims to solve the problems that a seed layer is discontinuous and even prone to breakage, and the effect of a following-up electroplating technology is affected due to the fact that the metal seed layer generated through a common PVD method is low in step coverage rate in a silicon through hole. According to the high depth-to-width ratio TSV seed layer manufacturing method, after seed layer sedimentation is completed through PVD, heating is conducted under vacuum or ultra-low pressure environment so as to increase the liquidity of a copper seed layer, and meanwhile, plasma bombardment is conducted in an auxiliary mode to promote the copper seed layer to flow towards the lower middle portion of a TSV. Due to the bombardment effect of plasmas, copper at the bottom of the TSV can splash backward to the weakest lateral wall on the middle lower portion of the TSV after being bombarded, and therefore the continuity, inside a TSV hole, of the copper seed layer is guaranteed. The continuity, inside the TSV, of the copper seed layer which undergoes backflow and plasma processing is improved, and therefore the operation of the following-up electroplating technology is facilitated, and the filling effect of the TSV is guaranteed.

Description

A kind of high-aspect-ratio TSV seed layer manufacturing method thereof

Technical field

The present invention relates to a kind of method of making or handling semiconductor or solid state device of microelectronics technology, be specifically related to the manufacture method of a kind of high-aspect-ratio TSV Seed Layer in the microelectronic processing technology.

Background technology

Along with the semiconductor chip characteristic size is followed Moore's Law and is constantly dwindled, the performance of semiconductor device improves constantly, but meanwhile, the interconnection performance is but on the contrary because dwindling of live width and continuous variation makes interconnection line become the bottleneck that restriction semiconductor core piece performance improves gradually.(Through Silicon Via TSV) effectively uses the third dimension of semiconductor chip, can remedy the only limitation of two dimension wiring of conventional semiconductors chip, is the important way that solves the semiconductor chip interconnect bottleneck for silicon perforation or silicon through hole.Its manufacturing process is by forming metal upright post in wafer, and is equipped with metal salient point, can realize between the wafer (chip) or direct three-dimensional interconnection between chip and substrate, can remedy the limitation of conventional semiconductors chip two dimension wiring like this.This interconnection mode is compared with the traditional technology of piling up such as routing interconnected (Wire bonding) technology to have three-dimensional and piles up advantages such as density is big, encapsulation back overall dimension is little, thereby improves the speed of chip greatly and reduce power consumption.Therefore, the TSV technology be widely regarded as after the weldering of bonding, carrier band and flip-chip the 4th generation encapsulation technology, undoubtedly will become the mainstream technology in high-density packages field gradually.

The TSV development technology is included on the wafer makes the vertical conducting hole by modes such as etching, laser drill, makes insulating barrier, barrier layer and seed layer deposition, filling metal, chemico-mechanical polishing, attenuate and wafer bonding step subsequently then in via.When filling metal by electroplating technology in TSV, generation technology that usually must advanced row metal Seed Layer is to prevent non-continuous event such as hole.What the use of the generation technology of this Seed Layer was more in the practice is to utilize physical vapor deposition (PVD) technology.But along with the depth-to-width ratio (Aspect Ratio) of silicon through hole is increasing, utilize the difficulty of physical vapor deposition (PVD) technology making Seed Layer increasing.Such as, when depth-to-width ratio〉during 5:1, continuity will variation in the silicon through hole for the Seed Layer that the PVD mode generates, even interrupting near the side-walls of TSV bottom, influences the electroplating technology effect.

At the problems referred to above, known technology has ionization PVD or ALD at present, and they have adopted the mode of nano-spray, therefore has the high shortcoming of cost.Similar techniques also has electric crosslinking technology, also be to adopt nanometer technology to form the surface activity conformal film at the inwall of TSV, but this technology also is not very ripe at present.It is a kind of under dielectric layer fluted (recessed region) situation that publication number is that the United States Patent (USP) of US20030139033A1 has disclosed, the technology that how utilizing during deposited copper on dielectric layer refluxes fills avoids occurring in the above-mentioned grooved area technology of hole, to improve the reliability of electrical interconnection.But the result of reflux technique is that copper is filled and led up whole grooved area in this technology, can not satisfy the needs of deposition Seed Layer.

Summary of the invention

At above-mentioned Seed Layer discontinuous problem in the silicon through hole, the invention provides a kind of manufacture method that adopts the Seed Layer that copper refluxes, plasma enhancing technology combines with PVD technology.

A kind of high-aspect-ratio TSV seed layer manufacturing method thereof particularly may further comprise the steps:

(1) carrying out TSV in wafer substrate makes and the insulating barrier deposit;

(2) utilize PVD technology cement copper Seed Layer in substrate surface and TSV hole;

(3) reflux course, namely under vacuum or hypobaric, be heated to 200-800 ℃ and make the mobile increase of copper seed layer, wafer frontside is placed up, copper seed layer is flowed downward by the TSV oral area, the copper seed layer of eliminating the side-walls of TSV bottom interrupts, and makes copper seed layer evenly distribute along TSV sidewall and bottom.

As the further improvement to said method, in above-mentioned reflux course, be aided with from top to bottom direction bombardment TSV hole of plasma.Plasma bombardment will help the copper backwash of substrate surface and TSV oral area and bottom, make Seed Layer more continuous at TSV sidewall and bottom.

As the preferred version of such scheme, the aperture of above-mentioned TSV is more than 5 microns, and depth-to-width ratio is not less than 6 scopes.

The atmospheric pressure value of above-mentioned hypobaric is 10 ²Pa, reflux temperature is in the 200-800 scope.

Above-mentioned Seed Layer can also be selected the metal outside the copper under the hypobaric of certain limit, as tungsten, aluminium etc.

Utilizing PVD technology first deposit one deck barrier layer before the cement copper Seed Layer in substrate surface and TSV hole.

Compare with prior aries such as ionization PVD or ALD, the technical advantage that the technical program has is, owing to being refluxed, metal seed layer all belongs to ripe technology with plasma treatment under hypobaric, and the backflow of Seed Layer can also reduce on the TSV inwall because the influence that the scalloped surface (scallop) that etching forms distributes to Seed Layer under the conventional PVD technology, and technical scheme has easy realization, clear superiority that cost is low.

Description of drawings

The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:

Fig. 1 is for finishing the wafer substrate of TSV etching and insulating barrier deposit.

Fig. 2 is for carrying out the schematic diagram after the plated metal Seed Layer to wafer shown in Figure 1.

Fig. 3 is for refluxing and the schematic diagram of plasma treatment to institute's plated metal Seed Layer.

Fig. 4 is the schematic diagram of the copper seed layer of process backflow and plasma treatment.

Embodiment

Figure 1 shows that the wafer substrate of finishing TSV etching and insulating barrier depositing technics, wherein 1 is substrate, and 2 is the barrier layer, and this rete can be materials such as silicon dioxide, silicon nitride, silicon oxynitride, organic polymer.3 is the TSV hole.Can there be zero layer or multilayer to cover deep hole sidewall film layer structure 2 as required in the deep hole.

Utilize PVD technology deposited metal 4 in substrate 1 surface and TSV hole 3, as shown in Figure 2.The PVD metal level comprises barrier layer adhesion layer metal and Seed Layer, and the material of barrier layer adhesion layer can be titanium, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten nitride, vanadium, vanadium nitride, niobium, niobium nitride etc., and seed layer materials is copper.

After utilizing PVD to finish cement copper, wafer placed under vacuum or the hypobaric add hot reflux, make under 200-800 ℃ of condition that copper seed layer is mobile to be increased, be aided with plasma bombardment 5 simultaneously, promote copper seed layer 4 to flow to the TSV middle and lower part, as shown in Figure 3.Owing to the bombardment effect of plasma, the copper of TSV bottom can be arrived the weakest TSV middle and lower part sidewall of Seed Layer by backwash after bombarding, thereby guarantees the continuity of copper seed layer 4 in the TSV hole simultaneously.

The continuity of copper seed layer 4 in TSV inside through backflow and plasma treatment improves, and as shown in Figure 4, therefore is conducive to the carrying out of follow-up electroplating technology, guarantees the filling effect of TSV.

Undoubtedly, seed layer manufacturing method thereof of the present invention is not limited to above-mentioned listed embodiment, and the Seed Layer metal can also be the metal beyond the copper as described, and backing material can be not limited to silicon, can also be materials such as silicon dioxide.The those of ordinary skill of this area all drops among protection scope of the present invention in the be evenly distributed method of purpose of the bottom of TSV and sidewall with the realization Seed Layer as long as the method be combined with plasma by refluxing in the TSV related process is handled Seed Layer.

Claims

1. high-aspect-ratio TSV seed layer manufacturing method thereof is characterized in that may further comprise the steps:

Carrying out TSV in wafer substrate makes and the insulating barrier deposit;

Utilize PVD technology cement copper Seed Layer in substrate surface and TSV hole;

2. TSV seed layer manufacturing method thereof according to claim 1 is characterized in that being aided with in the described reflux course from top to bottom direction bombardment TSV hole of plasma.

3. TSV seed layer manufacturing method thereof according to claim 1, the material that it is characterized in that described Seed Layer can also be tungsten, aluminium etc.

4. TSV seed layer manufacturing method thereof according to claim 1 and 2 is characterized in that the aperture of described TSV more than 5 microns, and depth-to-width ratio is not less than 6 scope.

5. TSV seed layer manufacturing method thereof according to claim 1 and 2 is characterized in that the atmospheric pressure value of described hypobaric is less than 10 ²Pa, reflux temperature is 200-800 ℃ of scope.

6. TSV seed layer manufacturing method thereof according to claim 1 and 2 is characterized in that utilizing PVD technology first deposit one deck barrier layer before the cement copper Seed Layer in substrate surface and TSV hole.