CN103326969A - Method for equalizing wireless local area network receiver - Google Patents
Method for equalizing wireless local area network receiver Download PDFInfo
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Abstract
The invention relates to a method for equalizing a wireless local area network receiver. The method for equalizing the wireless local area network receiver is characterized in that the equilibrium is finished through coarsness frequency deviation rectification in a forward feedback mode and frequency deviation rectification based on the NCO fine grit of an ROM. The method has good reliability and conforms to the wireless local area network receiving end equalizer architecture of the 802.11b standard. Under the conditions of 100ns root-mean-square multipath delay, 80ppm frequency deviation and 20Db signal to noise ratio, the equalizer can reach approximately 10% of packet error rate. The equalizer adopts a two-stage frequency offset compensation mechanism with a decision feedback equalizer, and a logic gate which is less than 50K is arranged in terms of chip design.
Description
Technical field
The present invention relates to a kind of equalization methods, relate in particular to a kind of equalization methods of WLAN receiver.
Background technology
Along with formulation and the standardization of IEEE802.11 protocol suite, it is more and more universal that wireless lan (wlan) becomes.Although the speed of 802.11g/n is higher than 802.11b far away at present, the label (WiFi Tag) that is based on WLAN (wireless local area network) is used also more and more universal.WiFi Tag uses battery, so will consider the life-span of battery.Because 802.11b provides the message transmission rate of minimum 1 Mbps, so select 802.11b can reach power saving and least cost as the agreement of WiFi Tag.And at present basically all WAP (wireless access point) (AP) support 802.11b.Because hundreds of WiFi Tag under an AP, is urgent problem so reduce channel impairment.
About channel impairment:
If there is not suitable channel compensation, the channel impairment of wireless channel will produce considerable influence to the performance of whole communication system.According to the seriousness to channel impairment, the wireless channel infringement principal element that affects 802.11b WLAN (wireless local area network) receptivity has:
1, multipath attenuation
Wireless signal can arrive receiving terminal by a plurality of different paths (owing to reasons such as reflection, refractions) by in the air borne process, so receiving end signal
Can regard transmitting by different delay as
Form, and these transmit and arrive receiving terminal after through transmission different amplitudes and phase place are being arranged, can be with following Formula receiving end signal model:
In the IEEE802.11 WLAN standard, used the index channel model,
Root mean square (RMS) postpones the standard deviation that expansion is defined as average retardation.The selection of index is that the 5-6 that root mean square postpones to expand doubly is as the criterion with the scope of channel, and this is decided by the discernmible minimum radius of receiving terminal certainly, and root mean square delay expanding value is 65-75ns in the environment of medium appropriateness.
2, interchannel noise
Thermal noise is the basic lesions in all communication systems.Mostly count noise source and can regard additive white Gaussian noise (AWGN) as, other noise sources, comprise receiving terminal because the quantizing noise that the A/D converter of limited precision causes, white, but Gaussian noise not necessarily, all these bit error rate to receiving terminal (BER) performance is influential.
3, frequency shift (FS)
Local crystal oscillator is when being modulated to the 2.4GHz frequency to the 802.11b signal, because the frequency that affects of power supply supply, temperature and other factors has deviation.802.11 the criteria limit frequency deviation is at 25ppm(60KHz) in, therefore in the worst case, have the frequency deviation of 50ppm from the transmitting terminal to the receiving terminal, standard makes system in the situation that frequency deviation has stronger reliability with the differential phase keying (DPSK) modulation system, and does not need relevant the detection.If yet use relevant the detection, the multipath performance will improve greatly.
4, lose in the path
Because microwave is at idle Propagation, square be directly proportional (20dB/decade) of its power attenuation and propagation distance.This mode is in the ideal case, can only be applicable to transmit and receive the very near situation (being no more than 6 meters) of distance.Increase along with distance, different barriers causes that signal decays at multipath, under the current transmit power restriction, when the distance of transmitting terminal and receiving terminal increases, its active data transmission rate is fast-descending, and common 802.11 wireless networks can obtain to be below about 100 meters transmission range.This distance is the coefficient result of transmitting power, propagation loss and receiving sensitivity.
Summary of the invention
Purpose of the present invention is exactly in order to solve the above-mentioned problems in the prior art, and a kind of equalization methods of WLAN receiver is provided.
Purpose of the present invention is achieved through the following technical solutions: the equalization methods of WLAN receiver, and it may further comprise the steps:
Use the coarseness frequency offset correction of feed-forward pattern, step 1., use the coarseness frequency offset correction of feed-forward pattern, by the I/Q mixed signal sequence input estimating module of 11M/s, utilize Barker to separate frequency multiplier I and Q signal are joined with the Barker Serial relation respectively; 2. step is separated spread spectrum I/Q position by code element collector (symbol picker) at per the 11st and is sampled, and these corresponding preambles are sent in difference two-phase PSK (D-BPSK) decoder; 3. step obtains the solution spread spectrum I/Q chip of two-phase PSK (BPSK) constellation by parametric receiver.If there is frequency deviation to occur, phase deviation will occur in the constellation point that receives signal, finish the coarseness frequency offset correction that uses the feed-forward pattern, enter the fine-grained frequency offset correction based on the NCO of ROM; Based on the fine-grained frequency offset correction of the NCO of ROM, step 4., chip after 3. step processed is used for doing the valuation of multi-path channel impulse response (CIR), carries out the CIR valuation by using corresponding to the known training sequence of the starting-frame delimiter (SFD) that follows Physical layer convergence protocol (PLCP) preamble closely; 5. step does the feedback of DFF by the adjusted CIR impulse response coefficient of pointer h1 to h7, in advance along moving 2 chips, guarantee the prior pointer search based on the CIR intensity of estimation at the receiving terminal training sequence; (the pointer search has been avoided coming non-minimum-phase system in the zero forcing equalization channel with feedforward filtering pulse.); Step 6., before DFE began, 7 initial judgements are loaded into feedback limit for length's unit impulse response filter (FIR), and was kept among the ROM as DFE part training sequence, last 7 chips of the last position of SFD are used to initialization and load; Step 7., fine-grained frequency offset estimation is inquired about with arc-tangent value, the phase deviation that calculates is done on average with the moving average filter of 4 pulses; Step
Carry out calculating based on the NCO particulate frequency departure compensation of ROM.
The equalization methods of above-mentioned WLAN receiver, wherein: step 3. described phase deviation is the mean value of the phase difference of fixed qty code element, the quantity of code element depends on the distribution of preamble sequential budget alloments, and the sequential budget alloments are to obtain function, regularly carry out between restore funcitons and other synchronizing functions that need to finish during at a bag of antenna reception in automatic gain control.
Further, the equalization methods of above-mentioned WLAN receiver, wherein: step 3. described phase deviation is the frequency compensation of making each chip for driving digital controlled oscillator (NCO), calculates the NCO step sizes of normalizing.
The advantage of technical solution of the present invention is mainly reflected in: have good reliability, meet the wireless lan (wlan) receiving terminal equalizer architecture of 802.11b standard.Delaying time up to 100 ns root mean square multipaths, in the signal to noise ratio (snr) situation of the frequency deviation of 80 ppm and 20Db, this equalizer can reach the Packet Error Ratio (11Mbps) near 10%.This equalizer adopts the compensate of frequency deviation mechanism with DFF in two stages, and is less than the gate of 50K in chip design.
Description of drawings
Purpose of the present invention, advantage and disadvantage will be for illustration and explanation by the non-limitative illustration of following preferred embodiment.These embodiment only are the prominent examples of using technical solution of the present invention, and all technical schemes of taking to be equal to replacement or equivalent transformation and forming all drop within the scope of protection of present invention.In the middle of these accompanying drawings,
Fig. 1, Fig. 2 are that the skew schematic diagram will occur the constellation point that receives signal;
Fig. 3 is NCO circuit structure schematic diagram;
Fig. 4 is the chip organigram;
Fig. 5, Fig. 6 are that CIR calculates schematic diagram with serial mode in remaining SFD;
Fig. 7 is DFE feedback schematic diagram;
Fig. 8 is that fine-grained frequency offset estimation is inquired about schematic diagram with arc-tangent value;
Fig. 9, Figure 10 are based on the NCO schematic diagram of ROM;
Figure 11, Figure 12 are equalizer Packet Error Ratio schematic diagrames.
Embodiment
The equalization methods of the WLAN receiver shown in Fig. 1～12 is characterized in that may further comprise the steps: at first, be the coarseness frequency offset correction that uses the feed-forward pattern.Specifically, the input of estimating module is the I/Q mixed signal sequence of 11M/s.Barker separates frequency multiplier and carries out I related with the Barker sequence respectively with Q signal.
Then, separate spread spectrum I/Q position by code element collector (symbol picker) at per the 11st and sample, these corresponding preambles are sent in difference two-phase PSK (D-BPSK) decoder.
Then, obtain the solution spread spectrum i/q signal of two-phase PSK (BPSK) constellation by parametric receiver, if there is frequency deviation to occur, phase deviation will occur in the constellation point that receives signal, finish the coarseness frequency offset correction that uses the feed-forward pattern, enter the fine-grained frequency offset correction based on the NCO of ROM.
Subsequently, enter the fine-grained frequency offset correction process based on the NCO of ROM.Specifically, chip after 3. step processed is used for doing the valuation of multi-path channel impulse response (CIR), carries out the CIR valuation by using corresponding to the known training sequence of the starting-frame delimiter (SFD) that follows Physical layer convergence protocol (PLCP) preamble closely.
And then, at receiving terminal, training sequence can be guaranteed the prior pointer search based on the CIR intensity of estimation so in advance along moving 2 chips.Do the feedback of DFF (DFE) by the adjusted CIR impulse response coefficient of pointer h1 to h7.And before DFE began, 7 initial judgements are loaded into feedback limit for length's unit impulse response filter (FIR), and is kept among the ROM as DFE part training sequence, and last 7 chips of the last position of SFD are used to initialization and load.
Afterwards, fine-grained frequency offset estimation is inquired about with arc-tangent value, the phase deviation that calculates is done on average with the moving average filter of 4 pulses.After finishing, carry out calculating based on the NCO particulate frequency departure compensation of ROM.
With regard to the better execution mode of the present invention one, for the ease of improving equalization performance, described phase deviation is the mean value of the phase difference of fixed qty code element, the quantity of code element depends on the distribution of preamble sequential budget alloments, and the sequential budget alloments are to obtain function, regularly carry out between restore funcitons and other synchronizing functions that need to finish during at a bag of antenna reception in automatic gain control (AGC).。And phase deviation is the frequency compensation of making each chip for driving digital controlled oscillator (NCO), calculates the NCO step sizes of normalizing.
In conjunction with actual operating position of the present invention: frequency offset correction divides 2 stages to carry out, and first stage uses the coarseness frequency offset correction of feed-forward pattern.Side-play amount estimates when bag forms preamble.The preamble of a 802.11b comprises 144 processes around frequently 1 (long preamble) or 56 processes short preamble of 0(around frequency) (seeing also IEEE Std 802.11b-1999 18.2.2).In above-mentioned 2 kinds of situations, precedence bits is used the D-BPSK modulation and through the Barker sequence spread spectrum of 11 chips (chip).Frequency deviation estimation process is that Barker separates spread spectrum, the code element collector, and the auto zoom ratio is got phase difference, gets the mean value of N code element, obtains the NCO step sizes.
The input of estimating module is the I/Q mixed signal sequence of 11M/s.Barker separate frequency multiplier I and Q signal respectively with the Barker sequence carry out related (for and filter match, done the time domain upset).We had done the border of regularly recovering and knowing spread symbols to i/q signal at supposition before this.Sample in per the 11st the solution spread spectrum I/Q position of code element collector (symbol picker), these corresponding preamble symbols will be sent to the D-BPSK decoder.In ideal conditions, parametric receiver will obtain the solution spread spectrum i/q signal of BPSK constellation, and constellation point is spaced apart 180 degree, owing to do not need relevant the detection, so these constellation point do not need the axial alignment with I/Q.
For the bit stream of D-BPSK modulation, if the code element in front is
S N-1 , so next code element
S n Be
S N-1 , or be
-S N-1 If there is frequency deviation to occur, the constellation point that receives signal will be offset, as shown in Figure 1 and Figure 2.This phase place drift and frequency deviation are proportional, and the arc-tangent value that is kept among the ROM is used for calculating the phase value of separating the spread spectrum code element.Detailed arctan function will be discussed in next section.Phase difference is by code element pair
Delivery obtains, and as previously described, this method only is adapted to the DBPSK modulation.Phase deviation is the mean value of the phase difference of fixed qty code element (for example 16 code elements).The quantity of code element depends on the distribution of preamble sequential budget alloments, and the sequential budget alloments are to obtain function, regularly carry out between restore funcitons and other synchronizing functions that need to finish during at a bag of antenna reception in automatic gain control (AGC).Number of symbols is more, and it is better that frequency deviation is estimated.Arc tangent can be differentiated in the window size situation of 256 points (be 1.41 corresponding to differentiating angle) and average 16 code elements in single circle, can valuation arrive probably in hundreds of Hz when 20 dB and frequency deviation 200KHz.
The maximum frequency deviation that can reliably be estimated to this method depends on the maximum drift that allows between the code element continuously
In the situation that code element continues 1 μ s, the frequency deviation that maximum can be measured is 250KHz.This is enough good, because the transmission center frequency values excursion of 802.11b standard mandatory provision is being 25ppm, i.e. and 60kHz.In the situation that 2.4GHz is the worst, transmitting and receiving maximum frequency deviation is 50ppm, i.e. 120kHz.By carrying out estimation process rather than the code element solution spread spectrum of chip, maximum frequency deviation valuation scope can improve 11 times.But because noise and multipath be serious reduction phase place drift estimation precision, this method is not recommended.Because Barker code can provide the processing gain of 10.4dB, the estimation that can improve SNR with chip solution frequency expansion sequence.
Frequency deviation is estimated by the phase deviation mean value of interval 1 μ s code element.The phase deviation note is Δ θ, between 0 and 1, and the sub-fraction of 2 π angles.Angle is less, and the efficient of arc tangent ROM is higher.This phase place drift is for the compensate of frequency deviation that drives digital controlled oscillator (NCO) and do each chip.The NCO step sizes of normalizing is:
, wherein coefficient 11 forms 1 code element (Symbol) from 11 chips, NCO circuit such as Fig. 3, and it is based on following being similar to:
, wherein j is
, this being similar to
Set up in the time of less, in situation described herein, usually set up.This approximate can be for generation of continuous Sin and Cos value:
The opposite direction counter-rotating code element of frequency deviation is pressed in the output of NCO:
Afterwards, use is with the DFF of fine granularity frequency offset correction.Specifically, according to lowest mean square root error criterion, chip behind the frequency offset correction of coarseness is used for doing the valuation of multi-path channel impulse response (CIR), carries out the CIR valuation by using corresponding to the known training sequence of the starting-frame delimiter that follows the PLCP preamble closely (SFD).The SFD of length/short preamble back is 16, and launches under 1Mbps speed.The SFD sequence of short preamble and long preamble on the contrary.Training sequence comprises 55 chips (5/code element), begins in the 5th position of SFD, as shown in Figure 4.SFD begins 3 chips and is used for triggering CIR estimation process.Search for SFD at 16 bit sequences, when search window obtains [1111111111111000] (long preamble) or [0000000000000111] (for short preamble) pattern (rightmost position receives at last), will trigger CIR estimation process.
The training sequence of supposing known SFD represents with the matrix X of 55x8, wherein
Expression training sequence chip
, the channel linearity distortion represents with the CIR matrix H of 8x1, receiving sequence is expressed as:
The least mean-square error of channel is estimated to calculate with following formula:
Based on known training sequence
,To dissimilar preamble, the matrix P of 8x55 can precompute and be kept among the receiving terminal ROM, the alignment of BPSK position and real axis is set, and can to make matrix P be real matrix, reduced like this CIR estimation of receiving terminal and calculated, and whole CIR calculates and comprises the 8x55x2 MAC cycle.CIR calculates with serial mode in remaining SFD, and such as Fig. 5, shown in Figure 6, actual multiplication number of times depends on system-clock rate, and in the 88MHz situation, CIR calculates and can finish in 2 MAC unit.After passing through awgn channel, the chances are in this algorithm of receiving terminal CIR estimation precision
At receiving terminal, training sequence can be guaranteed the prior pointer search based on the CIR intensity (shown in Fig. 5,6) of estimation so in advance along moving 2 chips.If use the Barker correlation peak of timing algorithm, in the situation that there is not prior pointer, the CIR valuation amplitude of 2 impulse responses of beginning is very little, and this is 2 positions because training sequence has moved to left.In this case, 2 impulse responses of beginning can be ignored, and add at last that at CIR 20 is filled.If but this channel non-minimum phase, the valuation amplitude of 2 impulse responses of beginning will be very considerable.If begin 2 pulses in the 6dB scope of owner pointer pulse c2, they should be comprised in the final CIR valuation.Based on the threshold value of 6 dB, c0, c1 and c2 might become first pulse of CIR valuation.If c2 is first pulse, adjust between so when not required.If c1 is first pulse, chip and the code element chip that needs in time to move to left, same, if c0 is first pulse, chip and code element 2 chips that need in time to move to left.Following approximate formula is used in the amplitude valuation
, do not need real range value.
The pointer search has been avoided coming non-minimum-phase system in the zero forcing equalization channel with feedforward filtering pulse.The adjusted CIR coefficient h of pointer [1] is to h[7] be used for doing the feedback of DFE.Conjugate factor h[0] be used on the forward path (according to the constellation of QPSK, the input of cutting chip device (Slicer) is irrelevant with gain, so 1/h[0] with h[0] effect is the same).
Before DFE began, 7 initial judgements were loaded into feedback FIR, and were kept among the ROM as DFE part training sequence, and last 7 chips of the last position of SFD are used to initialization and load.Before DFE began, the initial phase of D-QPSK decoder depended on the phase place of the last position of SFD.DFE output conversion first chip behind SFD begins.
DFE has 2 road feedback loops to move simultaneously, such as Fig. 7.The balanced multipath distortion of home loop.Because the inherent spurious frequency deviation frequency deviation can be larger to DFE multipath performance impact, external feedback compensate for residual frequency deviation.Inherent spurious frequency deviation can cause the constellation point of the input skew QPSK slowly that cuts the chip device.Even therefore skew very little (hundreds of Hz), the phase deviation of accumulating in sufficiently long bag will cause that cutting the input of chip device surpasses decision boundaries and cause mistake.Fine-grained frequency compensation slowly the skew.When the demodulating data bag, also can do compensation (for example comprising the frequency deviation that the supply frequency fluctuation causes) to the skew of low frequency.The compensate of frequency deviation structure of basic structure and coarseness is similar.The main distinction is the continuous feedback character in loop and has used high-precision NCO and arctan function.
Fine-grained frequency offset estimation with the arc-tangent value inquiry as shown in Figure 8.The constellation point of QPSK makes phase place drift valuation very simple.If cut being input as of chip device
(X+jY), so output
, phase deviation is phase vectors
(X+jY) S, just allow X, the positive and negative and reality-imaginary part counter-rotating of the code element of Y.Question blank is with the X of 6 bit wides, and Y address is made the input index, is used for calculating arc-tangent value.Owing to can guarantee that angle exists
In, the list item number among the ROM can be optimized.Calculated value among the ROM will be done proportional zoom, makes
Corresponding to 1.The phase deviation that calculates is done on average with the moving average filter of 4 pulses.The quantity of pulse had been done optimization.Too much pulse makes the compensation response slow; Very few pulse will cause the valuation noise.Per the 4th sampling, 4 times of average phase drift convergent-divergents and accumulation.Accumulation is to 2 π deliverys.Angle after the normalization (1 corresponding to
) be used for overcoming the efficient of proportional zoom problem and maximization ROM.Accumulated phase
Be used for driving based on ROM rather than based on the NCO(of multiplication as shown in Figure 2).Scheme based on ROM provides higher precision, is not subjected to the impact of accumulated phase error and allows the constant angle to upgrade.Based on the NCO of ROM as shown in Figure 9.Arc tangent ROM output corresponding to
8 interior angle value.In order to keep precision,
Use 10 positions.Begin two MSB positions and determined 1/4 quadrant of a circle, the 3rd position determines which 1/8 justifies octant with.Among the ROM be an octant [0,
] in preserved 10 sin/cosine values.The octant position be used for the counter-rotating [
,
] the interior address value of angle.Then decide sin/cosine value in the whole circle (comprise and use sign reversing and ROM output to exchange) according to this quadrant information with triangle relation, as shown in figure 10.The output of NCO is used for and DFE input chip multiplies each other.This operation is offset the inverted phase value by opposite direction.
Equalizer performance behind employing the present invention is as follows, the Packet Error Ratio of whole equalizer such as Figure 11 and shown in Figure 12, wrap big or small PSDU and be respectively 256 bytes (Figure 11) and 1000 bytes (Figure 12), the CCK modulating mode of 11Mbps is used in transmission, and uses short preamble.The AWGN SNR of receiving terminal is from 12 to 24dB variations, and transmitting terminal is 120kHz(50ppm to the whole frequency deviation of receiving terminal).The IEEE index multi-path channel pattern of Application standard, except NCO and the low precision ROMs of arc tangent stage use, other calculate and all use 12 precision.Can find out from the Packet Error Ratio curve, under rational signal to noise ratio and larger frequency deviation, the architecture that this paper carries can postpone expansion by balanced root mean square multipath up to 100ns.
Can find out behind employing the present invention, to have good reliability by above-mentioned character express, meet the wireless lan (wlan) receiving terminal equalizer architecture of 802.11b standard.Delaying time up to 100 ns root mean square multipaths, in the signal to noise ratio (snr) situation of the frequency deviation of 80 ppm and 20Db, this equalizer can reach the Packet Error Ratio (11Mbps) near 10%.This equalizer adopts the compensate of frequency deviation mechanism of the band DFF (Decision Feedback Equalize, DFE) in two stages, and is less than the gate of 50K in chip design.
Claims (7)
1. the equalization methods of WLAN receiver is characterized in that may further comprise the steps:
1. step uses the coarseness frequency offset correction of feed-forward pattern, by the I/Q mixed signal sequence input estimating module of 11M/s, utilizes Barker to separate frequency multiplier I and Q signal are joined with the Barker Serial relation respectively;
2. step is separated spread spectrum I/Q position by the code element collector at per the 11st and is sampled, and these corresponding preamble symbols are sent in the difference two-phase PSK decoder;
Step 3., obtain the solution spread spectrum I/Q chip of two-phase PSK constellation by parametric receiver, if there is frequency deviation to occur, phase deviation will occur in the constellation point that receives signal, finish the coarseness frequency offset correction that uses the feed-forward pattern, enter the fine-grained frequency offset correction based on the NCO of ROM;
Step 4., the chip after 3. step processed is used for doing the valuation of multipath CIR, carries out the CIR valuation by using corresponding to the known training sequence of the starting-frame delimiter that follows the Physical layer convergence protocol preamble closely;
5. step does the feedback of DFF by the adjusted CIR impulse response coefficient of pointer h1 to h7, in advance along moving 2 chips, guarantee the prior pointer search based on the CIR intensity of estimation at the receiving terminal training sequence;
Step 6., before DFE began, 7 initial judgements are loaded into feedback limit for length's unit impulse response filter, and was kept among the ROM as DFE part training sequence, last 7 chips of the last position of SFD are used to initialization and load;
Step 7., DFE has 2 road feedback loops to move simultaneously.
2. the balanced multipath distortion of home loop.
3. can be larger to DFE multipath performance impact owing to inherent spurious frequency deviation, external feedback compensate for residual frequency deviation.
4. fine-grained frequency offset estimation is inquired about with arc-tangent value, and the phase deviation that calculates is done on average with the moving average filter of 4 pulses;
Step
Carry out calculating based on the NCO particulate frequency departure compensation of ROM.
5. the scheme based on ROM provides higher precision, is not subjected to the impact of accumulated phase error and allows the constant angle to upgrade.
6. the equalization methods of WLAN receiver according to claim 1, it is characterized in that: step 3. described phase deviation is the mean value of the phase difference of fixed qty code element, the quantity of code element depends on the distribution of preamble sequential budget alloments, and the sequential budget alloments are to obtain function, regularly carry out between restore funcitons and other synchronizing functions that need to finish during at a bag of antenna reception in automatic gain control.
7. the equalization methods of WLAN receiver according to claim 1 is characterized in that: step 3. described phase deviation is for the frequency compensation that drives digital controlled oscillator and do each chip, calculates the NCO step sizes of normalizing.
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| WO2003017558A2 (en) * | 2001-08-21 | 2003-02-27 | Morphics Technology, Inc. | Method and apparatus for enhancing data rates in spread spectrum communication systems |
| CN1949682A (en) * | 2006-11-03 | 2007-04-18 | 凯明信息科技股份有限公司 | Method and apparatus for cancellation eliminating common-frequency cell signal interference based on serial interference |
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