CN103324580B

CN103324580B - Method for writing data, Memory Controller and memorizer memory devices

Info

Publication number: CN103324580B
Application number: CN201210079296.1A
Authority: CN
Inventors: 詹清文
Original assignee: Phison Electronics Corp
Current assignee: Phison Electronics Corp
Priority date: 2012-03-23
Filing date: 2012-03-23
Publication date: 2016-03-16
Anticipated expiration: 2032-03-23
Also published as: CN103324580A

Abstract

A kind of method for writing data, Memory Controller and memorizer memory devices.This method for writing data, for writing to the physical blocks of rewritable nonvolatile memory module by data.The method comprises the risk distance of each physical page of setting this physical blocks corresponding; And safety is write mark and is set as starting state, write instruction to respond safety.The method also comprises, when receive write instruction and more new data time, judge safety write mark whether be set to starting state; If not, then more new data is write in the predetermined physical page of this physical blocks; And if, then more new data is write in the secured physical page of this physical blocks, and safety is write mark and is reset to illegal state, the distance wherein between the secured physical page with the predetermined physical page equals the risk distance of this predetermined physical page corresponding.

Description

Method for writing data, Memory Controller and memorizer memory devices

Technical field

The present invention relates to a kind of method for writing data, particularly relate to for rewritable nonvolatile memory module method for writing data and use the Memory Controller of the method and memorizer memory devices.

Background technology

Digital camera, mobile phone and MP3 are very rapid in growth over the years, and the demand of consumer to Storage Media is also increased rapidly.Due to rewritable nonvolatile memory (rewritablenon-volatilememory) there is data non-volatile, power saving, the characteristic such as volume is little, mechanical structure, read or write speed are fast, be most suitable for portable type electronic product, such as mobile computer.Solid state hard disc is exactly a kind of storage device using flash memory as Storage Media.Therefore, flash memory industry becomes a ring quite popular in electronic industry in recent years.

Along with the development of semiconductor process techniques, multi-level cell memory (MultiLevelCell, MLC) and non-(NAND) flash memory module are used widely.Due to MLCNAND flash memory physical characteristics, the physical page that electric charge can be more unstable and contiguous when programming physical page (physicalpage) of part may be affected.Such as, for 4 rank NAND quick-flash memory modules, each physical blocks has multiple physical page and these physical pages can be divided into the multiple upper physical page of multiple lower physical page and these lower physical pages corresponding respectively, and one of them on, physical page can a correspondence lower physical page.That is, the storage unit be positioned in identical wordline can form a physical page group, and this physical page group comprises a lower physical page and a upper physical page.The speed that data write to lower physical page is greater than the speed that data write to physical page, and therefore, lower physical page is also called the rapid physical page and upper physical page is also called physical page at a slow speed.Particularly, when there is misprogrammed during physical page on programming, the data be stored in the lower physical page of corresponding physical page on this also may be lost.Therefore, relative to single-order storage unit (SingleLevelCell, SLC) NAND quick-flash memory module, though MLCNAND flash memory module capacity is comparatively large, store fiduciary level poor.

Particularly, in some applications, the fiduciary level of data must be guaranteed.Such as, by smart card and MLCNAND flash memory module with in the application of the storage volume of the smart card that increases, if when smart card carries out upgrading unsuccessfully to a document and causes the document being stored in other addresses also to lose, to the reliability of smart card be caused to be under suspicion, and cannot be trusted by user.

Therefore, the method for writing data needing development can increase the fiduciary level of MLCNAND flash memory module is had.

Summary of the invention

The invention provides a kind of method for writing data and Memory Controller, it can promote the fiduciary level of write data to rewritable nonvolatile memory module effectively.

The invention provides a kind of memorizer memory devices, it can reliably storage data.

Base this, the present invention one exemplary embodiment proposes a kind of method for writing data, for data being write to the physical blocks of rewritable nonvolatile memory module, this physical blocks has multiple physical page group, each physical page group has multiple physical page, the physical page of each physical page group comprises a lower physical page and a upper physical page, writes the speed of data to lower physical page faster than the speed writing the supreme physical page of data.Notebook data wiring method comprises the risk distance of each physical page of setting each physical page group corresponding.In addition, notebook data wiring method also comprises and receives safety write instruction and safety is write mark be set as starting state, writes instruction safely to respond this.Notebook data wiring method also comprises and receives write instruction and write the more new data of instruction with corresponding this; The predetermined physical page among the physical page identifying these physical page groups; And judge whether above-mentioned safety write mark is set to starting state.Notebook data wiring method also comprises, if when above-mentioned safety write mark is set to starting state, in the secured physical page among the physical page more new data being write to this physical blocks, to respond this write instruction, and above-mentioned safety write mark is reset to illegal state, and wherein in this physical blocks, the above-mentioned secured physical page and the distance between the predetermined physical page equal the risk distance of this predetermined physical page corresponding.Notebook data wiring method also comprises, if to write safely mark non-when being set to starting state for this, will more write in this predetermined physical page by new data, to respond this write instruction.

In one embodiment of this invention, above-mentioned physical page group comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group, in addition, the step of the risk distance of each physical page of above-mentioned setting each physical page group corresponding comprises: the risk distance of the lower physical page of the first physical page group is set as the distance between the lower physical page of the first physical page group and the lower physical page of the first physical page group; The risk distance of the upper physical page of the first physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the second physical page group and the lower physical page of the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group.

In one embodiment of this invention, above-mentioned physical page group comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.Further, the step of the risk distance of each physical page of above-mentioned setting each physical page group corresponding comprises: the risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group.

In one embodiment of this invention, above-mentioned physical page group comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And the step of the risk distance of each physical page of above-mentioned setting each physical page group corresponding comprises: the risk distance of the lower physical page of the first physical page group is set as 0; The risk distance of the upper physical page of the first physical page group is set as 2; The risk distance of the lower physical page of the second physical page group is set as 0; The risk distance of the upper physical page of the second physical page group is set as 1; The risk distance of the lower physical page of the 3rd physical page group is set as 0; The risk distance of the upper physical page of the 3rd physical page group is set as 2; The risk distance of the lower physical page of the 4th physical page group is set as 0; And the risk distance of the upper physical page of the 4th physical page group is set as 1.

In one embodiment of this invention, above-mentioned physical page group also comprises the 5th physical page group and the 6th physical page group.Further, the step of the risk distance of each physical page of above-mentioned setting each physical page group corresponding comprises: the risk distance of the lower physical page of the 5th physical page group is set as 0; The risk distance of the upper physical page of the 5th physical page group is set as 2; The risk distance of the lower physical page of the 6th physical page group is set as 3; And the risk distance of the upper physical page of the 6th physical page group is set as 1.

In one embodiment of this invention, above-mentioned method for writing data also comprises: set up risk distance table, and in risk distance table, record the risk distance of each physical page of each physical page group corresponding.

In addition, another exemplary embodiment of the present invention proposes a kind of Memory Controller, for controlling rewritable nonvolatile memory module, wherein this rewritable nonvolatile memory module has multiple physical blocks, each physical blocks has multiple physical page group, each physical page group has multiple physical page, the physical page of each physical page group comprises a lower physical page and a upper physical page, writes the speed of data to lower physical page faster than the speed writing the supreme physical page of data.This Memory Controller comprises host interface, memory interface and memory management circuitry.Host interface is in order to be electrically connected to host computer system.Memory interface is in order to be electrically connected to rewritable nonvolatile memory module.Memory management circuitry is electrically connected to host interface and memory interface, and the risk distance of each physical page in order to the physical page group that sets these physical blocks corresponding.In addition, memory management circuitry receives safety write instruction and safety is write mark and is set as starting state, writes instruction safely to respond this.In addition, memory management circuitry receives write instruction and writes the more new data of instruction with corresponding this, and a predetermined physical page among the physical page identifying the physical page group of a target physical block among these physical blocks.Moreover memory management circuitry judges whether safety write mark is set to starting state.If when safety write mark is set to starting state, in a secured physical page among the physical page that more new data is write to the physical page group of this target physical block by memory management circuitry, to respond this write instruction, and safety is write mark and is reset to illegal state, wherein in this target physical block, the above-mentioned secured physical page and the distance between the predetermined physical page equal the risk distance of the corresponding predetermined physical page.If safety write mark is non-when being set to starting state, memory management circuitry by this more new data write in the predetermined physical page, to respond this write instruction.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group.And the risk distance of the lower physical page of the first physical page group is set as the distance between the lower physical page of the first physical page group and the lower physical page of the first physical page group by above-mentioned memory management circuitry; The risk distance of the upper physical page of the first physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the second physical page group and the lower physical page of the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.And the risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group by above-mentioned memory management circuitry; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And, the risk distance of the lower physical page of the first physical page group is set as 0 by above-mentioned memory management circuitry, the risk distance of the upper physical page of the first physical page group is set as 2, the risk distance of the lower physical page of the second physical page group is set as 0, the risk distance of the upper physical page of the second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.

In one embodiment of this invention, the physical page group of above-mentioned target physical block also comprises the 5th physical page group and the 6th physical page group.And, the risk distance of the lower physical page of the 5th physical page group is set as 0 by above-mentioned memory management circuitry, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.

In one embodiment of this invention, above-mentioned memory management circuitry also in order to set up risk distance table, and records the risk distance of each physical page of the physical page group of these physical blocks corresponding in risk distance table.

Moreover another exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises rewritable nonvolatile memory module, in order to be electrically connected to connector and the Memory Controller of host computer system.Rewritable nonvolatile memory module has multiple physical blocks, wherein each physical blocks has multiple physical page group, each physical page group has multiple physical page, the physical page of each physical page group comprises a lower physical page and a upper physical page, and writes the speed of data to lower physical page faster than the speed writing the supreme physical page of data.Memory Controller is electrically connected to rewritable nonvolatile memory module and connector, in order to set the risk distance of each physical page of the physical page group of these physical blocks corresponding.In addition, Memory Controller receives safety write instruction and safety is write mark and is set as starting state, writes instruction safely to respond this.In addition, Memory Controller receives write instruction and writes the more new data of instruction with corresponding this, and a predetermined physical page among the physical page identifying the physical page group of a target physical block among these physical blocks.Moreover Memory Controller judges whether safety write mark is set to starting state.If when safety write mark is set to starting state, in a secured physical page among the physical page that more new data is write to the physical page group of this target physical block by Memory Controller, to respond this write instruction, and safety is write mark and is reset to illegal state, wherein in this target physical block, the above-mentioned secured physical page and the distance between the predetermined physical page equal the risk distance of the corresponding predetermined physical page.If safety write mark is non-when being set to starting state, Memory Controller by this more new data write in the predetermined physical page, to respond this write instruction.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group, the 4th physical page group, the 5th physical page group, the 6th physical page group and the 7th physical page group.And the risk distance of the lower physical page of the first physical page group is set as the distance between the lower physical page of the first physical page group and the lower physical page of the first physical page group by above-mentioned Memory Controller; The risk distance of the upper physical page of the first physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the second physical page group and the lower physical page of the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group; And the risk distance of the upper physical page of the 4th physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the 5th physical page group, the 6th physical page group, the 7th physical page group, the 8th physical page group and the 9th physical page group.And the risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group by above-mentioned Memory Controller; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group; And the risk distance of the upper physical page of the 6th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group.

In one embodiment of this invention, the physical page group of above-mentioned target physical block comprises the first physical page group, the second physical page group, the 3rd physical page group and the 4th physical page group.And, the risk distance of the lower physical page of the first physical page group is set as 0 by above-mentioned Memory Controller, the risk distance of the upper physical page of the first physical page group is set as 2, the risk distance of the lower physical page of the second physical page group is set as 0, the risk distance of the upper physical page of the second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.

In one embodiment of this invention, the physical page group of above-mentioned target physical block also comprises the 5th physical page group and the 6th physical page group.And, the risk distance of the lower physical page of the 5th physical page group is set as 0 by above-mentioned Memory Controller, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.

In one embodiment of this invention, above-mentioned Memory Controller also in order to set up risk distance table, and records the risk distance of each physical page of the physical page group of these physical blocks corresponding in risk distance table.

Based on above-mentioned, the method for writing data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices reliably can perform the write of data, avoid because of misprogrammed lost data thus.

For making above-mentioned feature and advantage of the present invention become apparent, special embodiment below, and be described with reference to the accompanying drawings as follows.

Accompanying drawing explanation

Figure 1A illustrates according to exemplary embodiment of the present invention the host computer system using storage device.

Figure 1B is the schematic diagram of computing machine, input/output device and the memorizer memory devices illustrated according to the present invention first exemplary embodiment.

Fig. 1 C is the schematic diagram of host computer system and the memorizer memory devices illustrated according to another exemplary embodiment of the present invention.

Fig. 2 is the schematic block diagram illustrating the memorizer memory devices shown in Figure 1A.

Fig. 3 is the schematic block diagram of the Memory Controller illustrated according to an exemplary embodiment.

Fig. 4 A and Fig. 4 B be according to an exemplary embodiment illustrate the schematic diagram of the physical blocks managing rewritable nonvolatile memory module.

Fig. 5 ~ Fig. 7 is the example that the use muon physics block illustrated according to an exemplary embodiment writes more new data.

Fig. 8 is the example schematic that the chaotic physical blocks of use illustrated according to the first exemplary embodiment writes data.

Fig. 9 A is the schematic diagram of the two-stage process illustrating MLCNAND type flash memory module according to the embodiment of the present invention.

Fig. 9 B is the example schematic of the physical page of the physical blocks illustrated according to an exemplary embodiment.

Figure 10 is the example schematic of the risk distance table of the physical page of the correspondence physical blocks illustrated according to this exemplary embodiment.

Figure 11 is the process flow diagram of the setting risk distance illustrated according to the method for writing data of this exemplary embodiment.

Figure 12 is the process flow diagram that the execution illustrated according to the method for writing data of this exemplary embodiment writes instruction.

Accompanying drawing explanation

1000: host computer system

1100: computing machine

1102: microprocessor

1104: random access memory

1106: input/output device

1108: system bus

1110: data transmission interface

1112: in-building type storage device

1112a: application program

1202: mouse

1204: keyboard

1206: display

1208: printer

1212: portable disk

1214: storage card

1216: solid state hard disc

1310: digital camera

1312:SD card

1314:MMC card

1316: memory stick

1318:CF card

1320: embedded storage device

100: memorizer memory devices

102: connector

104: Memory Controller

106: rewritable nonvolatile memory module

302: memory management circuitry

304: host interface

306: memory interface

308: memory buffer

310: electric power management circuit

312: bug check and correcting circuit

502: data field

504: idle district

506: system region

508: replace district

410 (0) ~ 410 (N): physical blocks

610 (0) ~ 610 (H): logical blocks

710 (0) ~ 710 (K): logic access address

900 (0) ~ 900 (63): physical page group

2000: risk distance table

S1101, S1102: the step of the risk distance of setting physical page

S1201, S1203, S1205, S1207, S1209, S1211, S1213, S1215: the step performing write instruction

Embodiment

Generally speaking, memorizer memory devices (also known as, memory storage system) comprises rewritable nonvolatile memory module and controller (also known as, control circuit).Usual memorizer memory devices uses together with host computer system, data can be write to memorizer memory devices or read data from memorizer memory devices to make host computer system.

Figure 1A illustrates according to exemplary embodiment of the present invention the host computer system using memorizer memory devices.

Please refer to Figure 1A, host computer system 1000 generally comprises computing machine 1100 and I/O (input/output, I/O) device 1106.Computing machine 1100 comprises microprocessor 1102, random access memory (randomaccessmemory, RAM) 1104, system bus 1108, data transmission interface 1110 and in-building type storage device 1112.Input/output device 1106 comprises as the mouse 1202 of Figure 1B, keyboard 1204, display 1206 and printer 1208.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.

In embodiments of the present invention, memorizer memory devices 100 is electrically connected by data transmission interface 1110 other elements with host computer system 1000.Data can be write to memorizer memory devices 100 by microprocessor 1102, random access memory 1104, input/output device 1106 with the running being installed on the application program 1112a in in-building type storage device 1112 or read data from memorizer memory devices 100.Such as, memorizer memory devices 100 can be the rewritable non-volatile memory storage device of portable disk 1212, storage card 1214 or solid state hard disc (SolidStateDrive, SSD) 1216 etc. as shown in Figure 1B.

Generally speaking, host computer system 1000 can substantially for coordinating any system with storage data with memorizer memory devices 100.Although in this exemplary embodiment, host computer system 1000 explains with computer system, but host computer system 1000 can be the systems such as digital camera, video camera, communicator, reproducing apparatus for phonotape or video signal player in another exemplary embodiment of the present invention.Such as, when host computer system is digital camera (video camera) 1310, rewritable non-volatile memory storage device is then its SD card 1312 used, mmc card 1314, memory stick (memorystick) 1316, CF card 1318 or embedded storage device 1320 (as shown in Figure 1 C).Embedded storage device 1320 comprises embedded multi-media card (EmbeddedMMC, eMMC).It is worth mentioning that, embedded multi-media card is directly electrically connected on the substrate of host computer system.

Please refer to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and rewritable nonvolatile memory module 106.

In this exemplary embodiment, connector 102 is compatible to secure digital (SecureDigital, SD) interface standard.But, it must be appreciated, the present invention is not limited thereto, connector 102 can also be meet Institute of Electrical and Electric Engineers (InstituteofElectricalandElectronicEngineers, IEEE) 1394 standards, parallel advanced annex (ParallelAdvancedTechnologyAttachment, PATA) standard, high-speed peripheral component connecting interface (PeripheralComponentInterconnectExpress, PCIExpress) standard, universal serial bus (UniversalSerialBus, USB) standard, advanced annex (the SerialAdvancedTechnologyAttachment of sequence, SATA) standard, memory stick (MemoryStick, MS) interface standard, Multi Media Card (MultiMediaCard, MMC) interface standard, compact flash (CompactFlash, CF) interface standard, integrated driving electrical interface (IntegratedDeviceElectronics, IDE) standard or other standards be applicable to.

Memory Controller 104 in order to perform with multiple logic gate of hardware pattern or firmware pattern implementation or steering order, and carries out the runnings such as the write of data, reading, erasing and merging according to the instruction of host computer system 1000 in rewritable nonvolatile memory module 106.

Rewritable nonvolatile memory module 106 is electrically connected to Memory Controller 104, and have the data that multiple physical blocks writes to store host computer system 1000.In this exemplary embodiment, each physical blocks has multiple physical page respectively, and the physical page wherein belonging to same physical blocks can be written independently and side by side be wiped.

In more detail, physical blocks is the least unit of erasing.That is each physical blocks contains the storage unit be wiped free of in the lump of minimal amount.Physical page is the minimum unit of programming.That is, physical page is the minimum unit of more new data.But it must be appreciated, in another exemplary embodiment of the present invention, more the least unit of new data can also be physical sector or other sizes.Each physical page generally includes data bit district and redundant digit district.Data bit district is in order to store the data of user, and redundant digit district is in order to the data (such as, bug check and correcting code) of stocking system.

In this exemplary embodiment, rewritable nonvolatile memory module 106 is multi-level cell memory (MultiLevelCell, MLC) NAND quick-flash memory module.But, the present invention is not limited thereto, rewritable nonvolatile memory module 106 also Complex Order storage unit (TrinaryLevelCell, TLC) NAND type flash memory module or other there is the memory module of identical characteristics.

Fig. 3 is the schematic block diagram of the Memory Controller illustrated according to an exemplary embodiment.It must be appreciated, the Memory Controller that Fig. 3 illustrates is only an example, the present invention is not limited thereto.

Please refer to Fig. 3, Memory Controller 104 comprises memory management circuitry 302, host interface 304, memory interface 306, memory buffer 308, electric power management circuit 310, bug check and correcting circuit 312.

Memory management circuitry 302 is in order to the overall operation of control store controller 104.Specifically, memory management circuitry 302 has multiple steering order, and when memorizer memory devices 100 operates, these steering orders can be performed to carry out data write, read and the running such as erasing.

In this exemplary embodiment, the steering order of memory management circuitry 302 carrys out implementation with firmware pattern.Such as, memory management circuitry 302 has microprocessor unit (not illustrating) and ROM (read-only memory) (not illustrating), and these steering orders are burned onto in this ROM (read-only memory).When memorizer memory devices 100 operates, these steering orders can by microprocessor unit perform to carry out data write, read and the running such as erasing.

In another exemplary embodiment of the present invention, the steering order of memory management circuitry 302 can also procedure code pattern be stored in the specific region (such as, being exclusively used in the system region of storage system data in memory module) of rewritable nonvolatile memory module 106.In addition, memory management circuitry 302 has microprocessor unit (not illustrating), ROM (read-only memory) (not illustrating) and random access memory (not illustrating).Particularly, this ROM (read-only memory) has driving code, and when Memory Controller 104 is enabled, microprocessor unit first can perform this and drive code section the steering order be stored in rewritable nonvolatile memory module 106 to be loaded in the random access memory of memory management circuitry 302.Afterwards, microprocessor unit can operate these steering orders with carry out data write, read and the running such as erasing.

In addition, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 302 a hardware pattern can also carry out implementation.Such as, memory management circuitry 302 comprises microcontroller, Memory Management Unit, storer writing unit, storer reading unit, memory erase unit and data processing unit.Memory Management Unit, storer writing unit, storer reading unit, memory erase unit and data processing unit are electrically connected to microcontroller.Wherein, Memory Management Unit is in order to manage the physical blocks of rewritable nonvolatile memory module 106; Storer writing unit is in order to assign write instruction data to be write in rewritable nonvolatile memory module 106 to rewritable nonvolatile memory module 106; Storer reading unit is in order to assign reading command to read data from rewritable nonvolatile memory module 106 to rewritable nonvolatile memory module 106; Memory erase unit is in order to assign erasing instruction data to be wiped from rewritable nonvolatile memory module 106 to rewritable nonvolatile memory module 106; And data processing unit is in order to the data processed for writing to rewritable nonvolatile memory module 106 and the data read from rewritable nonvolatile memory module 106.

Host interface 304 is electrically connected to memory management circuitry 302 and in order to receive and to identify the instruction that transmits of host computer system 1000 and data.In this exemplary embodiment, host interface 304 is compatible to SD standard.But, it must be appreciated and the present invention is not limited thereto, host interface 304 can also be compatible to PATA standard, IEEE1394 standard, PCIExpress standard, USB standard, SATA standard, MS standard, MMC standard, CF standard, IDE standard or other data transmission standards be applicable to.

Memory interface 306 is electrically connected to memory management circuitry 302 and in order to access rewritable nonvolatile memory module 106.That is, the data for writing to rewritable nonvolatile memory module 106 can be converted to the receptible form of rewritable nonvolatile memory module 106 via memory interface 306.

Memory buffer 308 is electrically connected to memory management circuitry 302 and in order to deposit the data and instruction coming from host computer system 1000 or the data coming from rewritable nonvolatile memory module 106.Such as, memory buffer 302 can be static RAM, dynamic RAM etc.

Electric power management circuit 310 is electrically connected to memory management circuitry 302 and in order to the power supply of control store storage device 100.

Bug check and correcting circuit 312 are electrically connected to memory management circuitry 302 and in order to perform an error-correcting routine to guarantee the correctness of data.Specifically, when host interface 304 receives main frame write instruction from host computer system 1000, the write data (be also called and upgrade data) that bug check and correcting circuit can write instruction for this main frame corresponding produce corresponding bug check and correcting code (ErrorCheckingandCorrectingCode, ECCCode), and memory management circuitry 302 can by this more new data write in rewritable nonvolatile memory module 106 with corresponding error-correcting code.Afterwards, can read error-correcting code corresponding to these data when memory management circuitry 302 reads data from rewritable nonvolatile memory module 106, and bug check and correcting circuit 312 can according to this error-correcting code to read data execution error correction programs simultaneously.

Please refer to Fig. 4 A, rewritable nonvolatile memory module 106 has physical blocks 410 (0) ~ 410 (N), and physical blocks 410 (0) ~ 410 (N) logically can be grouped into (or being assigned to) data field (dataarea) 502, idle district (sparearea) 504, system region (systemarea) 506 and replace district (replacementarea) 508 by the memory management circuitry 302 of Memory Controller 104.

Belonging to data field 502 in logic with the physical blocks in idle district 504 is in order to store the data coming from host computer system 1000.Specifically, the physical blocks (being also called Data Physical block) of data field 502 is the physical blocks being regarded as storage data, and the physical blocks in idle district 504 (being also called unused material reason block) is the physical blocks writing new data.Such as, when receiving the data that write instruction writes with wish from host computer system 1000, memory management circuitry 302 meeting extracts physical block from idle district 504, arranges the data for write and data is write in extracted physical blocks.Again such as, when performing data consolidation procedure to a certain logical blocks, memory management circuitry 302 can from idle district 504 extracts physical block as the new data physical blocks of this logical blocks corresponding, the valid data belonging to this logical blocks are read from rewritable nonvolatile memory module 106, arrange these valid data, valid data after arranging are write in new data physical blocks, and this logical blocks is remapped to new data physical blocks.Particularly, after completing data consolidation procedure, the Data Physical block storing invalid data can be associated (or recovery) to idle district 504 by memory management circuitry 302 again, to write the use of new data as next time.Such as, memory management circuitry 302 can perform erasing running when physical blocks is associated to idle district 504 to this physical blocks or perform erasing running when physical blocks is extracted from idle district 504 to this physical blocks, is the empty physical blocks that can be used for writing data to make the physical blocks extracted from idle district 504.

The physical blocks belonging to system region 506 is in logic in order to register system data.Such as, system data comprises manufacturer about rewritable nonvolatile memory module and model, the physical blocks number of rewritable nonvolatile memory module, the physical page number etc. of each physical blocks.

Belonging to the physical blocks replaced in district 508 is in logic replace program, with replacing damaged physical blocks for bad physical blocks.Specifically, if replace in district 508 still have normal physical blocks and the physical blocks of data field 502 is damaged time, memory management circuitry 302 can extract normal physical blocks to change the physical blocks of damage from replacement district 508.

Based on above-mentioned, in the running of memorizer memory devices 100, data field 502, idle district 504, system region 506 can dynamically change with the physical blocks replacing district 508.Such as, the physical blocks in order to storage data of rotating can belong to data field 502 or idle district 504 with changing.

It is worth mentioning that, in this exemplary embodiment, memory management circuitry 302 manages in units of each physical blocks.But the present invention is not limited thereto, in another exemplary embodiment, physical blocks also can be grouped into multiple physical location by memory management circuitry 302, and manages in units of physical location.Such as, each physical location can be made up of at least one physical blocks in same memory chip (die) or different memory chip.

Please refer to Fig. 4 B, memory management circuitry 302 meeting configuration logic block 610 (0) ~ 610 (H) is with the physical blocks in mapping (enum) data district 502, and wherein each logical blocks has multiple logical page (LPAGE) and the physical page of the Data Physical block that these logical page (LPAGE)s are mapping pair answers.Such as, when memorizer memory devices 100 is formatted, logical blocks 610 (0) ~ 610 (H) understands the physical blocks 410 (0) ~ 410 (F-1) in initially mapping (enum) data district 502.

In exemplary embodiment of the present invention, memory management circuitry 302 meeting service logic block-physical blocks mapping table (logicalblock-physicalblockmappingtable) is to record the mapping relations between logical blocks 610 (0) ~ 610 (H) and the physical blocks of data field 502.In addition, host computer system 1000 carrys out access data in units of logic access address.Such as, a logic access address is a logic sector (Sector).When host computer system 1000 access data, the logic access address 710 (0) ~ 710 (K) of correspond to memories storage device 100 can be converted to the address in corresponding logical page (LPAGE) by memory management circuitry 302.Such as, when host computer system 1000 is for accessing a certain logic access address, the logic access address that host computer system 1000 can access by memory management circuitry 302 is converted to the multi-dimensional address formed with the logical blocks of correspondence, logical page (LPAGE) and logical offset (offset), and by logical blocks-physical blocks mapping table access data in the physical page of correspondence.At this, skew is logic (or physics) address be positioned in a logical page (LPAGE) (or physical page), its be define the logical page (LPAGE) (or physical page) therewith of logic (or physics) address for this reason start address between distance, wherein this logic (or physics) address is also called logic (physics) offset address.

Referring to Fig. 5 ~ Fig. 7, such as, under the mapping status mapping to physical blocks 410 (0) in logical blocks 610 (0), when Memory Controller 104 receives write instruction and for write data to when belonging to the logical page (LPAGE) of logical blocks 610 (0) from host computer system 1000, memory management circuitry 302 can be map to physical blocks 410 (0) and extracts physical block 410 (F) is rotated physical blocks 410 (0) from idle district 504 according to logical blocks-physical blocks mapping table recognition logic block 610 (0) at present.But, while new data writes to physical blocks 410 (F), all valid data in physical blocks 410 (0) can not be moved to physical blocks 410 (F) and wipe physical blocks 410 (0) by Memory Controller 104 at once.Specifically, the valid data of memory management circuitry 302 meeting from physical blocks 410 (0) before reading wish write physical page (namely, data in 0th physical page of physical blocks 410 (0) and the 1st physical page), write in physical blocks 410 (0) in the 0th physical page of physical blocks 410 (F) and the 1st physical page (as shown in Figure 5) for the valid data before write physical page, and new data is write in 2nd ~ 4 physical pages of physical blocks 410 (F) (as shown in Figure 6).Now, namely memory management circuitry 302 completes the running of write.Because the valid data in physical blocks 410 (0) likely in next operation (such as, write instruction) in become invalid, therefore at once the valid data in physical blocks 410 (0) are moved to physical blocks 410 (F) and meaningless moving may be caused.In addition, data must write to the physical page in physical blocks in order, that is, physical page sequentially need be programmed according to its numbering.Such as, if when only not programming to the 0th and 1 physical page to the 2nd physical page programming, afterwards, the 0th and 1 physical page then cannot be programmed again.Therefore, memory management circuitry 302 only can first move for write physical page before valid data (namely, be stored in data in the 0th physical page of physical blocks 410 (0) and the 1st physical page), and all the other valid data (that is, being stored in data in 5th ~ K physical page of physical blocks 410 (0)) wouldn't be moved.

In this exemplary embodiment, the running temporarily maintaining these transient state relations is called unlatching (open) mother and child blocks, and original physical block (such as, above-mentioned physical blocks 410 (0)) be called female physical blocks and physical blocks (such as, above-mentioned with physical blocks 410 (F)) in order to replace female physical blocks is called muon physics block.

Afterwards, when needing physical blocks 410 (0) to merge (merge) with the data of physical blocks 410 (F), memory management circuitry 302 can by whole to physical blocks 410 (0) and the data of physical blocks 410 (F) and to a physical blocks, promote the service efficiency of physical blocks thus.At this, the running merging mother and child blocks is called data consolidation procedure or closedown (close) mother and child blocks.

Such as, as shown in Figure 7, when carrying out closedown mother and child blocks, (namely memory management circuitry 302 can read remaining valid data from physical blocks 410 (0), data in 5th ~ K physical page of physical blocks 410 (0)), remaining valid data in physical blocks 410 (0) are write in the 5th physical page ~ the K physical page of physical blocks 410 (F), erase operation is performed to physical blocks 410 (0), physical blocks 410 (0) after erasing is associated to idle district 504 and physical blocks 410 (F) is associated to data field 502.That is, logical blocks 610 (0) can remap to physical blocks 410 (F) by memory management circuitry 302 in logical blocks-physical blocks mapping table.

In addition, in this exemplary embodiment, memory management circuitry 302 can be set up idle district's physical blocks table (not illustrating) and record the physical blocks being associated to idle district 504 at present.It is worth mentioning that, in idle district 504, the number of physical blocks is limited, base this, during memorizer memory devices 100 operates, the number of the mother and child blocks group of having opened also can be restricted.Therefore, when memorizer memory devices 100 receives the write instruction coming from host computer system 1000, if the number having opened mother and child blocks group reaches in limited time, memory management circuitry 302 just can perform this write instruction after need closing at least one group of mother and child blocks group of having opened at present.

Except above-mentioned use muon physics block writes more except new data, in this exemplary embodiment, memory management circuitry 302 also can extract at least one physical blocks as chaotic (Random) physical blocks from idle district 504, to write more new data.

Please refer to Fig. 8, suppose that physical blocks 410 (S-1) is extracted as chaotic physical blocks and under the storing state shown in Fig. 6, host computer system 1000 is for writing more new data to the 1st logical page (LPAGE) of logical blocks 610 (0) time, memory management circuitry 302 can by this more new data to write in chaotic physical blocks in first empty physical page (such as, the 0th physical page of physical blocks 410 (S-1)).

In this exemplary embodiment, when current used chaotic physical blocks is fully written, memory management circuitry 302 can extract another physical blocks as new chaotic physical blocks, again until reach preset value as the number of the physical blocks of chaotic physical blocks from idle district 504.Specifically, the physical blocks in idle district 504 is limited, and therefore, the number as the physical blocks of chaotic physical blocks also can be restricted.When the number of the physical blocks as chaotic physical blocks reaches preset value, memory management circuitry 302 can perform above-mentioned data consolidation procedure, and the chaotic physical blocks stored data being all to invalid data performs erasing running and the physical blocks of having wiped is associated to idle district 504.Thus, when performing next write instruction, memory management circuitry 302 just can extract empty physical blocks again as chaotic physical blocks from idle district 504.

It is worth mentioning that, although Fig. 8 is with when host computer system 1000 has been written into muon physics block for the data of logical page (LPAGE) upgraded, this example that more new data can write to chaotic physical blocks is explained, but the use-pattern of chaotic physical blocks is not limited thereto.Such as, in another exemplary embodiment of the present invention, the more new data coming from host computer system 1000 also directly directly can first be write to chaotic physical blocks by memory management circuitry 302, and afterwards, the valid data belonging to same logical blocks are incorporated into from the empty physical blocks that idle district 504 extracts.

As mentioned above, rewritable nonvolatile memory module 106 is MLCNAND type flash memory module.Specifically, each storage unit of MLCNAND type flash memory module can store 2 bit data (that is, " 11 ", " 10 ", " 00 " with " 01 ＂).Base this, 2 stages can be divided into the write of MLCNAND type storage unit flash memory module.First stage is the write of lower physical page (lowerphysicalpage), and subordinate phase is the write (as shown in Figure 9 A) of upper physical page (upperphysicalpage), wherein descend the writing speed of physical page, cannot only to programme to upper physical page when lower physical page is not programmed faster than upper physical page.Therefore, the physical page of each physical blocks of MLCNAND type flash memory module can be divided into physical page (that is, upper physical page) and the rapid physical page (that is, lower physical page) at a slow speed.Particularly, compared to upper physical page, the storage fiduciary level of lower physical page is higher.Similarly, in TLCNAND type flash memory module, storage unit can store 3 bit data and the physical page of each physical blocks can be divided at a slow speed that physical page is (namely, upper physical page), middling speed physical page (namely, middle physical page) and the rapid physical page (that is, lower physical page).At this, physical page the fastest for writing speed is called lower physical page, the slower physical page of other writing speeds is referred to as physical page (that is, upper physical page and middle physical page).

Fig. 9 B is the example schematic of the physical page of the physical blocks illustrated according to an exemplary embodiment, and it illustrates physical page configuration of the physical blocks of MLCNAND type flash memory module.

Please refer to Fig. 9 B, physical blocks has 127 physical pages and these physical pages can be grouped into the physical page group 900 (0) ~ 900 (63) of sequential, and wherein each physical page group is made up of a upper physical page and a lower physical page.Such as, physical page group 900 (0) (that is, the first physical page group) is made up of the 0th physical page and the 4th physical page; Physical page group 900 (1) (that is, the second physical page group) is made up of the 1st physical page and the 5th physical page; Physical page group 900 (2) (that is, the 3rd physical page group) is made up of the 2nd physical page and the 8th physical page; Physical page group 900 (3) (that is, the 4th physical page group) is made up of the 3rd physical page and the 9th physical page; Physical page group 900 (4) (that is, the 5th physical page group) is made up of the 6th physical page and the 12nd physical page; Physical page group 900 (5) (that is, the 6th physical page group) is made up of the 7th physical page and the 13rd physical page; Physical page group 900 (6) (that is, the 7th physical page group) is made up of the 10th physical page and the 16th physical page; Physical page group 900 (7) (that is, the 8th physical page group) is made up of the 11st physical page and the 17th physical page; Physical page group 900 (8) (that is, the 9th physical page group) is made up of the 14th physical page and the 20th physical page; ... by that analogy.

It is worth mentioning that, the physical page of a physical page group is made up of same group of storage unit, and upper physical page just can be programmed (as shown in Figure 9 A) after lower physical page completes programming, therefore, if when there is misprogrammed on upper physical page, therefore the data be stored on lower physical page may be lost.

In order to avoid the data being stored in lower physical page are lost because of the misprogrammed of upper physical page, in this exemplary embodiment, when application program 1112a starts to upgrade or write to a document, memory management circuitry 302 can map the information identification next one according to logical blocks-physical blocks mapping table and physical page thereof can writing address (hereinafter referred to as the predetermined physical page), judge the risk distance of this predetermined physical page corresponding, select another physical page (hereinafter referred to as the secured physical page) according to this risk distance and will more write in the secured physical page by new data.Afterwards, when application program 1112a continue to transmit belong to same document continue more new data time, memory management circuitry 302 can continue to write follow-up renewal in the physical page of the secured physical page that continues.Specifically, when starting to upgrade or write to a document, memory management circuitry 202 can according to the risk distance of correspondence, and the physical page skipping part is programmed, and avoids thus losing the document previously stored when there is misprogrammed.

Such as, memory management circuitry 202 can set up risk distance table to record the risk distance of each physical page corresponding.Such as, memory management circuitry 202 can by risk distance table record in the physical blocks of system region 506, and risk distance table can be loaded into memory buffer 308, in order to inquiring about rapidly by memory management circuitry 202 when memorizer memory devices 100 starts.

Please refer to Figure 10, risk distance table 2000 comprises physical page number field, secured physical page number field and risk distance field.

Physical page number field is the numbering of record physical page, and the secured physical page of the physical page of secured physical page number field record corresponding physics page number field.Such as, when for programming to the 0th physical page, due to the non-storage data of this physical blocks, therefore, directly can programme to the 0th physical page, and the data be written into can not be affected because of misprogrammed.Again such as, when for programming to the 4th physical page, because the 0th physical page may storage data, therefore, superimpose data writes to the 6th physical page, just can not affect the data be previously written into because of misprogrammed.That is, when writing data in the secured physical page corresponding to a physical page, the data be previously stored in the physical page before this physical page can be guaranteed can not lose because of misprogrammed.It must be appreciated, the secured physical page corresponding to each physical page can be different according to different rewritable nonvolatile memory module, and Figure 10 is only an example.

Risk distance field records the distance between the physical page of corresponding physics page number field and its secured physical page.At this, so-called distance refers to the difference calculated according to the numbering of two physical pages.Such as, the risk distance of the lower physical page of the first physical page group can be set to 0; The risk distance of the upper physical page of the first physical page group can be set to 2; The risk distance of the lower physical page of the second physical page group can be set to 0; The risk distance of the upper physical page of the second physical page group can be set to 1; The risk distance of the lower physical page of the 3rd physical page group can be set to 0; The risk distance of the upper physical page of the 3rd physical page group can be set to 2; The risk distance of the lower physical page of the 4th physical page group can be set to 0; The risk distance of the upper physical page of the 4th physical page group can be set to 1; The risk distance of the lower physical page of the 5th physical page group can be set to 0; The risk distance of the upper physical page of the 5th physical page group can be set to 2; The risk distance of the lower physical page of the 6th physical page group can be set to 3; The risk distance of the upper physical page of the 6th physical page group can be set to 1; ... by that analogy.

In this exemplary embodiment, when application program 1112a is for starting to upgrade the document that is stored in memorizer memory devices 100 or writing in new document to memorizer memory devices 100, application program 1112a can transmit a safety write instruction to memorizer memory devices 100.Particularly, memory management circuitry 302 can write safely instruction according to this and in memory buffer 308, records a safety write mark (flag) and this is write safely mark and be set as starting state.Such as, the value that this can be write safely mark by memory management circuitry 302 is set as ' 1 ', to represent starting state, but it must be appreciated, the present invention is not limited thereto.Afterwards, when first the write instruction received after safety write instruction and data (be also called and upgrade data), memory management circuitry 302 can be skipped corresponding risk distance according to risk distance table 2000 and write in the corresponding secured physical page by more new data, and by record this and write safely mark and be set as illegal state (value such as, this being write safely mark is set as ' 0 ').Afterwards, when receiving write instruction if continue under not receiving safety and writing instruction, memory management circuitry 302 can be continued into data by the physical page relaying after this secured physical page that continues.Specifically, if when application program 1112a does not transmit safety write instruction and continues to transmit write instruction, represent that the more new data received belongs to same document, and when there is misprogrammed, host computer system 1000 can re-write this document.Therefore, follow-up data directly can be write to follow-up physical page by memory management circuitry 302, and need not consider the problem that the data that previously stored can lose because of misprogrammed.

Please refer to Figure 11, in step S1101, memory management circuitry 302 can set the secured physical page of each physical page of each physical page group corresponding according to the configuration information of rewritable nonvolatile memory module 106.

Afterwards, in step S1103, memory management circuitry 302 can calculate the risk distance of each physical page according to the secured physical page of each physical page corresponding.Such as, as shown in Figure 10, the risk distance of the lower physical page of the first physical page group can be set as the distance between the lower physical page of the first physical page group and the lower physical page of the first physical page group by memory management circuitry 202; The risk distance of the upper physical page of the first physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of the first physical page group; The risk distance of the lower physical page of the second physical page group is set as the distance between the lower physical page of the second physical page group and the lower physical page of the second physical page group; The risk distance of the upper physical page of the second physical page group is set as the distance between the lower physical page of the 5th physical page group and the upper physical page of this second physical page group; The risk distance of the lower physical page of the 3rd physical page group is set as the distance between the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group; The risk distance of the upper physical page of the 3rd physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group; The risk distance of the lower physical page of the 4th physical page group is set as the distance between the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group; The risk distance of the upper physical page of the 4th physical page group is set as the distance between the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group; The risk distance of the lower physical page of the 5th physical page group is set as the distance between the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group; The risk distance of the upper physical page of the 5th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group; The risk distance of the lower physical page of the 6th physical page group is set as the distance between the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group; The risk distance of the upper physical page of the 6th physical page group is set as the distance between the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group; ... by that analogy.

Please refer to Figure 12, in step S1201, memory management circuitry 302 can receive the more new data of a write instruction and this write instruction corresponding from host computer system 1000, and in step S1203, memory management circuitry 302 can judge that the write instruction received from host computer system 1000 writes instruction as safety or generally writes instruction.

If the write instruction received from host computer system 1000 is that when writing safely instruction, in step S1205, safety can be write mark and be set as starting state by memory management circuitry 302, writes instruction safely to respond this.

If when the write instruction received from host computer system 1000 is for general write instruction, in step S1207, memory management circuitry 302 can identify the predetermined physical page for this more new data of write.

Specifically, in step S1207, memory management circuitry 302 can according to the logical blocks-physical blocks mapping table identification target physical block for this more new data of write, such as, and the muon physics block as shown in Fig. 5 ~ 7 or chaotic physical blocks as shown in Figure 8.Further, map according to the physical page of current physical blocks the physical page (that is, the predetermined physical page) that information identification can be used for writing this more new data.

Afterwards, in step S1209, memory management circuitry 302 can judge whether safety write mark is set to starting state.

If safety write mark is non-be set to starting state (namely, be set to illegal state) time, in step S1211, more new data can write in the identified predetermined physical page by memory management circuitry 302, generally writes instruction to respond this.

If this writes safely mark when being set to starting state, in step S1213, memory management circuitry 302 can determine the secured physical page according to the risk distance of the predetermined physical page.Such as, the page number of the predetermined physical page can be added that the risk distance of the predetermined physical page is to obtain the secured physical page by memory management circuitry 302.

Afterwards, in step S1215, more new data can write in the secured physical page by memory management circuitry 302, generally writes instruction to respond this, and safety is write mark is reset to illegal state.

In sum, according to the method for writing data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices, when starting write the carrying out of a document or upgrade, secured physical page can decide according to the risk distance for write physical page of original setting and from then on the data belonging to this document can start to be written into by the secured physical page, can effectively avoid thus, when there is misprogrammed, losing and being stored in physical blocks the data belonging to other documents.

Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention, those skilled in the art, under the premise without departing from the spirit and scope of the present invention; can do some changes and retouching, therefore protection scope of the present invention is as the criterion with claim of the present invention.

Claims

1. a method for writing data, for data being write to a physical blocks of a rewritable nonvolatile memory module, this physical blocks has multiple physical page group, described in each, physical page group has multiple physical page, the physical page of physical page group described in each comprises physical page on physical page and, write the speed of data to described lower physical page faster than writing the speed of data to described upper physical page, this method for writing data comprises:

The risk distance of physical page described in each of the corresponding physical page group described in each of setting;

Reception one writes instruction safely and writes safely mark by one and is set as a starting state, writes instruction safely to respond this;

Receive a write instruction with to a more new data that should write instruction;

A predetermined physical page among the physical page identifying described physical page group;

Judge that this writes safely mark and whether is set to this starting state;

If this writes safely mark when being set to this starting state, by this more new data write to described physical page group described physical page among a secured physical page in, to respond this write instruction, and this is write safely mark and be reset to an illegal state, the difference wherein in this physical blocks between the programmed order of this secured physical page and the programmed order of this predetermined physical page equals should this risk distance of the predetermined physical page; And

If it is non-when being set to this starting state that this writes safely mark, by this more new data write in this predetermined physical page among described physical page, to respond this write instruction.

2. method for writing data as claimed in claim 1, wherein said physical page group comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group

Described in each of the wherein corresponding physical page group described in each of setting, the step of the risk distance of physical page comprises:

Difference between the programmed order risk distance of the lower physical page of this first physical page group being set as the programmed order of the lower physical page of this first physical page group and the lower physical page of this first physical page group;

Difference between the programmed order risk distance of the upper physical page of this first physical page group being set as the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this first physical page group;

Difference between the programmed order risk distance of the lower physical page of this second physical page group being set as the programmed order of the lower physical page of this second physical page group and the lower physical page of this second physical page group;

Difference between the programmed order risk distance of the upper physical page of this second physical page group being set as the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this second physical page group;

Difference between the programmed order risk distance of the lower physical page of the 3rd physical page group being set as the programmed order of the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group;

Difference between the programmed order risk distance of the upper physical page of the 3rd physical page group being set as the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group;

Difference between the programmed order risk distance of the lower physical page of the 4th physical page group being set as the programmed order of the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group; And

Difference between the programmed order risk distance of the upper physical page of the 4th physical page group being set as the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group.

3. method for writing data as claimed in claim 1, wherein said physical page group comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,

Difference between the programmed order risk distance of the lower physical page of the 5th physical page group being set as the programmed order of the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group;

Difference between the programmed order risk distance of the upper physical page of the 5th physical page group being set as the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group;

Difference between the programmed order risk distance of the lower physical page of the 6th physical page group being set as the programmed order of the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group; And

Difference between the programmed order risk distance of the upper physical page of the 6th physical page group being set as the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group.

4. method for writing data as claimed in claim 1, wherein said physical page group comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,

The risk distance of the lower physical page of this first physical page group is set as 0;

The risk distance of the upper physical page of this first physical page group is set as 2;

The risk distance of the lower physical page of this second physical page group is set as 0;

The risk distance of the upper physical page of this second physical page group is set as 1;

The risk distance of the lower physical page of the 3rd physical page group is set as 0;

The risk distance of the upper physical page of the 3rd physical page group is set as 2;

The risk distance of the lower physical page of the 4th physical page group is set as 0; And

The risk distance of the upper physical page of the 4th physical page group is set as 1.

5. method for writing data as claimed in claim 4, wherein said physical page group also comprises one the 5th physical page group and one the 6th physical page group,

The risk distance of the lower physical page of the 5th physical page group is set as 0;

The risk distance of the upper physical page of the 5th physical page group is set as 2;

The risk distance of the lower physical page of the 6th physical page group is set as 3; And

The risk distance of the upper physical page of the 6th physical page group is set as 1.

6. method for writing data as claimed in claim 1, also comprises:

Set up a risk distance table, and in this risk distance table the corresponding physical page group described in each of record each described in the risk distance of physical page.

7. a Memory Controller, for controlling a rewritable nonvolatile memory module, wherein this rewritable nonvolatile memory module has multiple physical blocks, physical blocks described in each has multiple physical page group, described in each, physical page group has multiple physical page, the physical page of physical page group described in each comprises physical page on physical page and, write the speed of data to described lower physical page faster than writing the speed of data to described upper physical page, this Memory Controller comprises:

One host interface, in order to be electrically connected to a host computer system;

One memory interface, in order to be electrically connected to this rewritable nonvolatile memory module; And

One memory management circuitry, is electrically connected to this host interface and this memory interface, and in order to the physical page group that sets corresponding described physical blocks each described in the risk distance of physical page,

Wherein this memory management circuitry reception one writes instruction safely and writes safely mark by one and is set as a starting state, writes instruction safely to respond this,

Wherein this memory management circuitry receive a write instruction with to a more new data that should write instruction, and the predetermined physical page among the physical page identifying the physical page group of the target physical block among described physical blocks,

Wherein this memory management circuitry judges that this writes safely mark and whether is set to this starting state,

If wherein this writes safely mark when being set to this starting state, this memory management circuitry by this more new data write to the physical page group of this target physical block physical page among a secured physical page in, to respond this write instruction, and this is write safely mark and be reset to an illegal state

If wherein this to write safely mark non-when being set to this starting state, this memory management circuitry by this more new data write in this predetermined physical page, to respond this write instruction,

A difference wherein in this target physical block between the programmed order of this secured physical page and the programmed order of this predetermined physical page equals should this risk distance of the predetermined physical page.

8. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group

Wherein the risk distance of the lower physical page of this first physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of this first physical page group and the lower physical page of this first physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of this first physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this first physical page group by this memory management circuitry,

Wherein the risk distance of the lower physical page of this second physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of this second physical page group and the lower physical page of this second physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of this second physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this second physical page group by this memory management circuitry,

Wherein the risk distance of the lower physical page of the 3rd physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of the 3rd physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group by this memory management circuitry,

Wherein the risk distance of the lower physical page of the 4th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of the 4th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group by this memory management circuitry.

9. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,

Wherein the risk distance of the lower physical page of the 5th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of the 5th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group by this memory management circuitry,

Wherein the risk distance of the lower physical page of the 6th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group by this memory management circuitry,

Wherein the risk distance of the upper physical page of the 6th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group by this memory management circuitry.

10. Memory Controller as claimed in claim 7, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,

Wherein the risk distance of the lower physical page of this first physical page group is set as 0 by this memory management circuitry, the risk distance of the upper physical page of this first physical page group is set as 2, the risk distance of the lower physical page of this second physical page group is set as 0, the risk distance of the upper physical page of this second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.

11. Memory Controllers as claimed in claim 10, wherein the physical page group of this target physical block also comprises one the 5th physical page group and one the 6th physical page group,

Wherein the risk distance of the lower physical page of the 5th physical page group is set as 0 by this memory management circuitry, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.

12. Memory Controllers as claimed in claim 7, wherein this memory management circuitry is more in order to set up a risk distance table, and record in this risk distance table the physical page group of corresponding described physical blocks each described in the risk distance of physical page.

13. 1 kinds of memorizer memory devices, comprising:

One rewritable nonvolatile memory module, there is multiple physical blocks, wherein physical blocks described in each has multiple physical page group, described in each, physical page group has multiple physical page, the physical page of physical page group described in each comprises physical page on physical page and, write data to the speed of described lower physical page faster than write data to the speed of described upper physical page;

A connector, in order to be electrically connected to a host computer system; And

One Memory Controller, is electrically connected to this rewritable nonvolatile memory module and this connector, in order to set the physical page group of corresponding described physical blocks each described in the risk distance of physical page,

Wherein this Memory Controller reception one writes instruction safely and writes safely mark by one and is set as a starting state, writes instruction safely to respond this,

Wherein this Memory Controller receive a write instruction with to a more new data that should write instruction, and the predetermined physical page among the physical page identifying the physical page group of the target physical block among described physical blocks,

Wherein this Memory Controller judges that this writes safely mark and whether is set to this starting state,

If wherein this writes safely mark when being set to this starting state, this Memory Controller by this more new data write to the physical page group of this target physical block physical page among a secured physical page in, to respond this write instruction, and this is write safely mark and be reset to an illegal state

If wherein this to write safely mark non-when being set to this starting state, this Memory Controller by this more new data write in this predetermined physical page, to respond this write instruction,

14. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group, one the 4th physical page group, one the 5th physical page group, one the 6th physical page group and one the 7th physical page group

Wherein the risk distance of the lower physical page of this first physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of this first physical page group and the lower physical page of this first physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of this first physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this first physical page group by this Memory Controller,

Wherein the risk distance of the lower physical page of this second physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of this second physical page group and the lower physical page of this second physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of this second physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the upper physical page of this second physical page group by this Memory Controller,

Wherein the risk distance of the lower physical page of the 3rd physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 3rd physical page group and the lower physical page of the 3rd physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of the 3rd physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 3rd physical page group by this Memory Controller,

Wherein the risk distance of the lower physical page of the 4th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 4th physical page group and the lower physical page of the 4th physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of the 4th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the upper physical page of the 4th physical page group by this Memory Controller.

15. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one the 5th physical page group, one the 6th physical page group, one the 7th physical page group, one the 8th physical page group and one the 9th physical page group,

Wherein the risk distance of the lower physical page of the 5th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 5th physical page group and the lower physical page of the 5th physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of the 5th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 5th physical page group by this Memory Controller,

Wherein the risk distance of the lower physical page of the 6th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 7th physical page group and the lower physical page of the 6th physical page group by this Memory Controller,

Wherein the risk distance of the upper physical page of the 6th physical page group is set as the difference between the programmed order of the programmed order of the lower physical page of the 9th physical page group and the upper physical page of the 6th physical page group by this Memory Controller.

16. memorizer memory devices as claimed in claim 13, wherein the physical page group of this target physical block comprises one first physical page group, one second physical page group, one the 3rd physical page group and one the 4th physical page group,

Wherein the risk distance of the lower physical page of this first physical page group is set as 0 by this Memory Controller, the risk distance of the upper physical page of this first physical page group is set as 2, the risk distance of the lower physical page of this second physical page group is set as 0, the risk distance of the upper physical page of this second physical page group is set as 1, the risk distance of the lower physical page of the 3rd physical page group is set as 0, the risk distance of the upper physical page of the 3rd physical page group is set as 2, the risk distance of the lower physical page of the 4th physical page group is set as 0, and the risk distance of the upper physical page of the 4th physical page group is set as 1.

17. memorizer memory devices as claimed in claim 16, wherein the physical page group of this target physical block also comprises one the 5th physical page group and one the 6th physical page group,

Wherein the risk distance of the lower physical page of the 5th physical page group is set as 0 by this Memory Controller, the risk distance of the upper physical page of the 5th physical page group is set as 2, the risk distance of the lower physical page of the 6th physical page group is set as 3, and the risk distance of the upper physical page of the 6th physical page group is set as 1.

18. memorizer memory devices as claimed in claim 13, wherein this Memory Controller is also in order to set up a risk distance table, and record in this risk distance table the physical page group of corresponding described physical blocks each described in the risk distance of physical page.