CN102592670B

CN102592670B - Method for writing data, Memory Controller and memorizer memory devices

Info

Publication number: CN102592670B
Application number: CN201110002440.7A
Authority: CN
Inventors: 陈庆聪; 蔡来福
Original assignee: Phison Electronics Corp
Current assignee: Phison Electronics Corp
Priority date: 2011-01-07
Filing date: 2011-01-07
Publication date: 2015-09-30
Anticipated expiration: 2031-01-07
Also published as: CN102592670A

Abstract

A kind of method for writing data for reproducible nonvolatile memorizer module.This method comprises and receives at least one pen more new data, and wherein more new data belongs at least one logical page (LPAGE) of the first logical blocks and the first logical page (LPAGE) maps the first physical blocks.This method also comprises, when this at least one logical page (LPAGE) corresponding in the second physical blocks of muon physics block being the first physical blocks at present physical page storage data time, from idle district, extract the 3rd physical blocks; This little more new data is write in the 3rd physical blocks; Using the muon physics block of the 3rd physical blocks as corresponding first physical blocks; And erase operation for use is performed to the second physical blocks.Base this, this method can reduce data merge operation and promote write data speed.

Description

Method for writing data, Memory Controller and memorizer memory devices

Technical field

The invention relates to a kind of method for writing data, and relate to a kind of for writing more new data to the method for writing data of non-volatile memory module and the Memory Controller and the memorizer memory devices that use the method especially.

Background technology

Digital camera, mobile phone and MP3 are very rapid in growth over the years, and the storage requirements of consumer to digital content is also increased rapidly.Because flash memory (Flash Memory) has the little characteristic with mechanical structure etc. of data non-volatile, power saving, volume, applicable user carries with the Storage Media as digital document transmission and exchange.

Based on the physical characteristics of flash memory, only can unidirectional programming be carried out (namely at flash memory cell, position in storage unit only can be programmed for 0 from 1), can new data be re-write after must first data previously stored in storage unit being erased when therefore writing data in the storage unit of flash memory.

In the design of flash memory system, in general, (namely the flash memory physical blocks of flash memory system can be grouped into multiple physical blocks, each physical blocks is made up of one or more physical blocks), there is in this physical blocks at least one flash memory cell (flash memory cell), each storage unit is made up of at least one transistor, as MOSFET or other transistor or logical circuit, respectively this storage unit can store at least one position, and this little physical blocks can be grouped into data field (data area) and idle district (free area).Classify as in the physical blocks of data field the data that can store and be write by write instruction, and the physical blocks in idle district is in order to the physical blocks in the replacement data district when performing write instruction, writes data.Successfully can be accessed to allow main frame to rotate the physical blocks of mode storage data, and flash memory system can provide logical blocks to map this little physical blocks.Specifically, the logic access address that main frame can access by flash memory system is converted to corresponding logical blocks, and reflect rotating of physical blocks by record in logical blocks-physical blocks mapping table (logical unit-physical unit mapping table) and the enantiomorphic relationship upgraded between logical blocks and the physical blocks of data field, so main frame only needs to access according to logic access address, and flash memory system can carry out reading or the write of data according to the logical blocks-physical blocks of physical blocks mapping table to institute's mapping.

Specifically, when main frame for by data storing in a logical blocks time, flash memory can extract a physical blocks and new data can be write to the physical blocks (being also called muon physics block) extracted from idle district from idle district, to replace original physical blocks (being also called parent substance reason block) mapping this logical blocks.Afterwards, machine in due course, flash memory can carry out data consolidation procedure, so that the valid data in female physical blocks and muon physics block are merged (that is, the data belonging to this logical blocks being all incorporated in a physical blocks).Such as, valid data in female physical blocks can be copied to muon physics block by flash memory, this logical blocks is remapped to muon physics block (namely, this muon physics block will be associated to data field), and female physical blocks in original data district is carried out erasing and is associated to idle district.

Under operational architecture based on above-mentioned flash memory system, when main frame carries out Data Update repeatedly to logical page (LPAGE) identical in same logical blocks, flash memory must perform data merging repeatedly and erase with data.Therefore, the time of execution write needed for instruction can increase, and affects the access usefulness of flash memory.

Summary of the invention

The invention provides a kind of method for writing data, Memory Controller and memory storage system, it can shorten the time performing write instruction effectively, promotes the speed of write data thus.

The present invention proposes a kind of method for writing data, for writing data to reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks, and each physical blocks has according to a tactic multiple physical page.Notebook data wiring method comprises and this little physical blocks is at least grouped into a data field and an idle district, and configures multiple logical blocks with the physical blocks in mapping (enum) data district, and wherein each logical blocks has multiple logical page (LPAGE).Notebook data wiring method also comprises reception many more new datas, wherein this little more new data belongs to the multiple continuous print logical page (LPAGE)s among this little logical page (LPAGE), and this little continuous print logical page (LPAGE) belongs to the first logical blocks and this first logical page (LPAGE) maps the first physical blocks.Notebook data wiring method also comprises arbitrary physical blocks in the idle district of judgement and whether has been extracted the muon physics block as this first physical blocks corresponding.Notebook data wiring method also comprises, when second physical blocks in idle district has been extracted the muon physics block as corresponding first physical blocks, judge one of them part whether storage data of the physical page of this little continuous print logical page (LPAGE) corresponding in this second physical blocks.Notebook data wiring method also comprises, when the physical page of this little continuous print logical page (LPAGE) corresponding in the second physical blocks one of them part storage data time, perform the second write-in program.At this, the second write-in program comprises: be the first data and the second data by the data separation be stored in the second physical blocks; The 3rd physical blocks is extracted from idle district; By this, more new data and this second data write in the 3rd physical blocks a bit; Using the muon physics block of the 3rd physical blocks as corresponding first physical blocks; And erase operation for use is performed to the second physical blocks, wherein, the first data are the data that to be stored in the second physical blocks in the physical page of this little continuous print logical page (LPAGE) corresponding and two data are stored in the data in the physical page of this little continuous print logical page (LPAGE) of non-corresponding in the second physical blocks.

In one embodiment of this invention, above-mentioned method for writing data also comprises, when the non-storage data of the physical page of this little continuous print logical page (LPAGE) corresponding in the second physical blocks, this little more new data is write in the physical page of this little continuous print logical page (LPAGE) corresponding in the second physical blocks.

In one embodiment of this invention, above-mentioned method for writing data also comprises: before writing in the physical page of this little continuous print logical page (LPAGE) corresponding in the second physical blocks by this little more new data, copied in the second physical blocks by the valid data in the first physical blocks.

In one embodiment of this invention, above-mentioned method for writing data also comprises, when being extracted the muon physics block as corresponding first physical blocks without any physical blocks in idle district, from idle district, extract one the 4th physical blocks, this little more new data to be write in the 4th physical blocks and using the muon physics block of the 4th physical blocks as the first physical blocks.

The present invention proposes a kind of method for writing data, for writing many more new data to reproducible nonvolatile memorizer module.This reproducible nonvolatile memorizer module has multiple physical blocks, and each physical blocks has according to a tactic multiple physical page, and this little physical blocks is grouped into a data field and an idle district.In addition, multiple logical blocks is configured to the physical blocks in mapping (enum) data district, the physical blocks in each logical blocks mapping (enum) data district one of them and there is multiple logical page (LPAGE).Moreover, the first logical blocks among the 5th physical blocks mapping logic block among the physical blocks of data field, the 6th physical blocks among the physical blocks in idle district has been extracted the muon physics block as corresponding 5th physical blocks, this bit more new data belong to the first logical blocks logical page (LPAGE) among multiple continuous print logical page (LPAGE) and in the 6th physical blocks one of them part storage data of the physical page of this little continuous print logical page (LPAGE) corresponding.Notebook data wiring method comprises: judge whether the physical page of this little continuous print logical page (LPAGE) corresponding in the 6th physical blocks belongs to a specific webpage region.Notebook data wiring method also comprises, and when the physical page of this little continuous print logical page (LPAGE) corresponding in the 6th physical blocks belongs to this specific webpage region, performs the second write-in program.At this, the second write-in program comprises: be the first data and the second data by the data separation be stored in the 6th physical blocks; The 7th physical blocks is extracted from the physical blocks in idle district; By in this little more new data and the write of the second data so far the 7th physical blocks; Using the 7th physical blocks this muon physics block as corresponding 5th physical blocks; And erase operation for use is performed to the 6th physical blocks, wherein the first data are the data that to be stored in the 6th physical blocks in the physical page of this little continuous print logical page (LPAGE) corresponding and two data are the data in the non-physical page being stored in this little continuous print logical page (LPAGE) corresponding in the 6th physical blocks.In addition, specific webpage region is the multiple continuous physical pages comprising initial physical page in each physical blocks.

In one embodiment of this invention, above-mentioned method for writing data also comprises, and when the physical page of this little continuous print logical page (LPAGE) corresponding in the 6th physical blocks does not belong to above-mentioned specific webpage region, performs the first write-in program.At this, the first write-in program comprises: copied to by the valid data in the 5th physical blocks in the 6th physical blocks; Erase operation for use is performed to the 5th physical blocks; 5th physical blocks is associated to idle district; First logical blocks is mapped to the 6th physical blocks; The 8th physical blocks is extracted from idle district; This little more new data is write in the 8th physical blocks; And using the muon physics block of the 8th physical blocks as corresponding 6th physical blocks.

In one embodiment of this invention, above-mentioned the step that more new data writes in the 8th physical blocks to be comprised: from an initial physical page among the physical page of the 8th physical blocks, write this little more new data.

In one embodiment of this invention, above-mentioned this little step that more new data writes in the 8th physical blocks to be comprised: the part valid data in the 6th physical blocks are copied in the 8th physical blocks; And this little more new data is write in the physical page of this little continuous print logical page (LPAGE) corresponding in the 8th physical blocks.

The present invention proposes a kind of method for writing data, for writing data to reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks, and each physical blocks has according to a tactic multiple physical page.Notebook data wiring method comprises and this little physical blocks is at least grouped into a data field and an idle district; And configure multiple logical blocks with the physical blocks in mapping (enum) data district, wherein each logical blocks has multiple logical page (LPAGE).Notebook data wiring method also comprises at least one pen of reception more new data, wherein this more new data correspond at least one logical page (LPAGE) among this little logical page (LPAGE), this at least one logical page (LPAGE) belongs to one first logical blocks among this little logical blocks and this first logical blocks maps one first physical blocks among this little physical blocks.Whether the notebook data wiring method arbitrary physical blocks also comprised among the physical blocks judging idle district has been extracted the muon physics block as this first physical blocks corresponding.Notebook data wiring method also comprises, when the second physical blocks among the physical blocks in idle district has been extracted the muon physics block as this first physical blocks corresponding, judge the physical page whether storage data of this logical page (LPAGE) corresponding in the second physical blocks, and when this logical page (LPAGE) corresponding in the second physical blocks physical page storage data time, perform one second write-in program.At this, the second write-in program comprises: from the physical blocks in idle district, extract one the 3rd physical blocks; To more write in the 3rd physical blocks by new data; Using the muon physics block of the 3rd physical blocks as corresponding first physical blocks; And an erase operation for use is performed to the second physical blocks.

In one embodiment of this invention, wherein when the second physical blocks has the second data of the first data of this logical page (LPAGE) corresponding and this logical page (LPAGE) of non-corresponding, above-mentioned second write-in program also comprises and the second data being write in the 3rd physical blocks.

In one embodiment of this invention, above-mentioned method for writing data judges before being also included in execution second write-in program whether the physical page of this logical page (LPAGE) corresponding in the second physical blocks is positioned at a specific webpage region, and when physical page is positioned at this specific webpage region, side performs above-mentioned second write-in program.

Exemplary embodiment of the present invention proposes a kind of Memory Controller, and for managing reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks.This Memory Controller comprises host interface, memory interface and memory management circuitry.Host interface is in order to be coupled to host computer system, and memory interface is in order to be coupled to reproducible nonvolatile memorizer module.Memory management circuitry couples so far host interface memory interface therewith, and in order to perform above-mentioned method for writing data.

Exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises connector, reproducible nonvolatile memorizer module and Memory Controller.Reproducible nonvolatile memorizer module has multiple physical blocks.Memory Controller couples so far reproducible nonvolatile memorizer module connector therewith, and in order to perform above-mentioned method for writing data.

Based on above-mentioned, the method for writing data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices can reduce and perform data and merge, and effectively shorten the time performing write instruction thus.

For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.

Accompanying drawing explanation

Figure 1A illustrates host computer system and memorizer memory devices according to the present invention first exemplary embodiment.

Figure 1B is the schematic diagram of computing machine, input/output device and the memorizer memory devices illustrated according to exemplary embodiment of the present invention.

Fig. 1 C is the schematic diagram of host computer system and the memorizer memory devices illustrated according to another exemplary embodiment of the present invention.

Fig. 2 is the schematic block diagram illustrating the memorizer memory devices shown in Figure 1A.

Fig. 3 is the schematic block diagram of the Memory Controller illustrated according to the present invention first exemplary embodiment.

Fig. 4 and Fig. 5 is the schematic diagram of the managing physical block illustrated according to the present invention first exemplary embodiment.

Fig. 6 ~ Fig. 8 be according to the present invention first exemplary embodiment illustrate with the general write of write mode in proper order data to the example of reproducible nonvolatile memorizer module.

Fig. 9 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to the example of reproducible nonvolatile memorizer module.

Figure 10 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to another example of reproducible nonvolatile memorizer module.

Figure 11 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to another example of reproducible nonvolatile memorizer module.

Figure 12 is the process flow diagram of the method for writing data illustrated according to the present invention first exemplary embodiment.

Figure 13 is the schematic diagram of the physical page of the differentiation physical blocks illustrated according to the present invention second exemplary embodiment.

Figure 14 is the process flow diagram of the method for writing data illustrated according to the present invention second exemplary embodiment.

[main element label declaration]

1000: host computer system

1100: computing machine

1102: microprocessor

1104: random access memory

1106: input/output device

1108: system bus

1110: data transmission interface

1202: mouse

1204: keyboard

1206: display

1208: printer

1212: portable disk

1214: storage card

1216: solid state hard disc

1310: digital camera

1312:SD card

1314:MMC card

1316: memory stick

1318:CF card

1320: embedded storage device

100: memorizer memory devices

102: connector

104: Memory Controller

106: reproducible nonvolatile memorizer module

202: memory management circuitry

204: host interface

206: memory interface

252: memory buffer

254: electric power management circuit

256: bug check and correcting circuit

310 (0) ~ 310 (R): physical blocks

502: system region

504: data field

506: idle district

508: replace district

510 (0) ~ 510 (H): logical blocks

UD: more new data

S1201, S1203, S1205, S1207, S1209, S1211, S1213, S1215, S1217, S1219: the step of data write

1302: specialized page region

S1401, S1403, S1405, S1407, S1409, S1411, S1413: the step of data write

Embodiment

[the first exemplary embodiment]

Figure 1A illustrates host computer system and memorizer memory devices according to example first embodiment of the present invention.

Please refer to Figure 1A, host computer system 1000 generally comprises computing machine 1100 and I/O (input/output, I/O) device 1106.Computing machine 1100 comprises microprocessor 1102, random access memory (random access memory, RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 comprises as the mouse 1202 of Figure 1B, keyboard 1204, display 1206 and printer 1208.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other device.

In embodiments of the present invention, memorizer memory devices 100 is coupled by data transmission interface 1110 other element with host computer system 1000.Data can be write to memorizer memory devices 100 by microprocessor 1102, random access memory 1104 with the running of input/output device 1106 or read data from memorizer memory devices 100.Such as, memorizer memory devices 100 can be the non-volatile memory storage device of portable disk 1212, storage card 1214 or solid state hard disc (Solid State Drive, SSD) 1216 etc. as shown in Figure 1B.

Generally speaking, host computer system 1000 can be can any system of storage data substantially.Although in this exemplary embodiment, host computer system 1000 explains with computer system, but host computer system 1000 can be the systems such as digital camera, video camera, communicator, audio player or video player in another exemplary embodiment of the present invention.Such as, when host computer system is digital camera (video camera) 1310, non-volatile memory storage device is then its SD card 1312 used, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (as shown in Figure 1 C).Embedded storage device 1320 comprises embedded multi-media card (Embedded MMC, eMMC).It is worth mentioning that, embedded multi-media card is directly coupled on the substrate of host computer system.

Please refer to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and reproducible nonvolatile memorizer module 106.

In this exemplary embodiment, connector 102 is secure digital (Secure Digital, SD) interface connector.But, it must be appreciated, the present invention is not limited thereto, connector 102 can also be universal serial bus (Universal Serial Bus, USB) connector, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, IEEE) 1394 connectors, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express, PCIExpress) connector, advanced annex (the Serial Advanced Technology Attachment of sequence, SATA) connector, memory stick (Memory Stick, MS) interface connector, Multi Media Card (MultiMedia Card, MMC) interface connector, compact flash (Compact Flash, CF) interface connector, integrated form drives electrical interface (Integrated Device Electronics, IDE) connector or other connector be applicable to.

Memory Controller 104 in order to perform in the form of hardware or multiple logic gate of form of firmware implementation or steering order, and according to the instruction of host computer system 1000 carry out in reproducible nonvolatile memorizer module 106 data write, read and the running such as to erase.Particularly, Memory Controller 104 can write data according to the method for writing data of this exemplary embodiment.

Reproducible nonvolatile memorizer module 106 is coupled to Memory Controller 104, and in order to store the data that host computer system 1000 writes.

Reproducible nonvolatile memorizer module 106 has physical blocks 310 (0) ~ 310 (R).Each physical blocks has multiple physical page respectively, and the physical page wherein belonging to same physical blocks can be written independently and side by side be erased.Such as, each physical blocks is made up of 128 physical pages.But it must be appreciated, the present invention is not limited thereto, each physical blocks can be made up of 64 physical pages, 256 physical pages or other any physical page.

In more detail, physical blocks is the least unit of erasing.That is, each physical blocks contain minimal amount in the lump by the storage unit of erasing.Physical page is the least unit of programming.That is, physical page is the least unit of write data.But it must be appreciated, in another exemplary embodiment of the present invention, the least unit of write data can also be sector (Sector) or other size.Each physical page generally includes data bit district D and redundant digit district R.Data bit district D is in order to store the data of user, and redundant digit district R is in order to the data (such as, bug check and correcting code) of stocking system.

In this exemplary embodiment, reproducible nonvolatile memorizer module 106 is multi-level cell memory (Multi Level Cell, MLC) nand flash memory module.But, the present invention is not limited thereto, reproducible nonvolatile memorizer module 106 also single-order storage unit (Single Level Cell, SLC) nand flash memory module, other flash memory module or other there is the memory module of identical characteristics.

Please refer to Fig. 3, Memory Controller 104 comprises memory management circuitry 202, host interface 204 and memory interface 206.

Memory management circuitry 202 is in order to the overall operation of control store controller 104.Specifically, memory management circuitry 202 has multiple steering order, and when memorizer memory devices 100 operates, this little steering order can be performed with the write carrying out data in reproducible nonvolatile memorizer module 106, reads and the running such as to erase.Particularly, data can be write to reproducible nonvolatile memorizer module 106 according to the method for writing data of this exemplary embodiment by memory management circuitry 202.

In this exemplary embodiment, the steering order of memory management circuitry 202 carrys out implementation with form of firmware.Such as, memory management circuitry 202 has microprocessor unit (not illustrating) and ROM (read-only memory) (not illustrating), and this little steering order is burned onto in this ROM (read-only memory).When memorizer memory devices 100 operates, this little steering order can by microprocessor unit perform to carry out data write, read and the running such as to erase.

In another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 can also procedure code form be stored in the specific region (such as, being exclusively used in the system region of storage system data in memory module) of reproducible nonvolatile memorizer module 106.In addition, memory management circuitry 202 has microprocessor unit (not illustrating), ROM (read-only memory) (not illustrating) and random access memory (not illustrating).Particularly, this ROM (read-only memory) has driving code section, and when Memory Controller 104 is enabled, microprocessor unit first can perform this and drive code section the steering order be stored in reproducible nonvolatile memorizer module 106 to be loaded in the random access memory of memory management circuitry 202.Afterwards, microprocessor unit can operate this little steering order with perform data write, read and the running such as to erase.In addition, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 example, in hardware can also carry out implementation.

Host interface 204 is coupled to memory management circuitry 202 and in order to receive and to identify the instruction that transmits of host computer system 1000 and data.That is, the instruction that transmits of host computer system 1000 and data can be sent to memory management circuitry 202 by host interface 204.In this exemplary embodiment, host interface 204 is corresponding connectors 102 is SD interface.But, it must be appreciated and the present invention is not limited thereto, host interface 204 can also be USB interface, PATA interface, IEEE 1394 interface, PCIExpress interface, SATA interface, MS interface, MMC interface, CF interface, ide interface or other data transmission interface be applicable to.

Memory interface 206 is coupled to memory management circuitry 202 and in order to access reproducible nonvolatile memorizer module 106.That is, the data for writing to reproducible nonvolatile memorizer module 106 can be converted to the receptible form of reproducible nonvolatile memorizer module 106 via memory interface 206.

In the present invention one exemplary embodiment, Memory Controller 104 also comprises memory buffer 252.Memory buffer 252 is coupled to memory management circuitry 202 and comes from the data and instruction of host computer system 1000 in order to temporary or come from the data of reproducible nonvolatile memorizer module 106.

In the present invention one exemplary embodiment, Memory Controller 104 also comprises electric power management circuit 254.Electric power management circuit 254 is coupled to memory management circuitry 202 and in order to the power supply of control store storage device 100.

In the present invention one exemplary embodiment, Memory Controller 104 also comprises bug check and correcting circuit 256.Bug check and correcting circuit 256 are coupled to memory management circuitry 202 and in order to execution error inspection and correction program to guarantee the correctness of data.Specifically, when memory management circuitry 202 receives write instruction from host computer system 1000, bug check and correcting circuit 256 can be that the corresponding data that this writes instruction produce corresponding bug check and correcting code (Error Checking andCorrecting Code, ECC Code), and the data of this write instruction corresponding can write in reproducible nonvolatile memorizer module 106 with corresponding bug check and correcting code by memory management circuitry 202.Afterwards, can read bug check corresponding to these data and correcting code when memory management circuitry 202 reads data from reproducible nonvolatile memorizer module 106, and bug check and correcting circuit 256 can according to this bug check and correcting code to read data execution error inspection and correction programs simultaneously.

Please refer to Fig. 4, physical blocks 310 (0) ~ 310 (R) logically can be grouped into data field 502, idle district 504, system region 506 and replace district 508 by the memory management circuitry 202 of Memory Controller 104.

Belonging to data field 502 in logic with the physical blocks in idle district 504 is in order to store the data coming from host computer system 1000.Specifically, data field 502 is physical blocks of storage data, and the physical blocks in idle district 504 is the physical blocks in order to replacement data district 502.Therefore, the physical blocks in idle district 504 be sky or spendable physical blocks, i.e. no record data or be labeled as invalid data useless.That is, the physical blocks in idle district 504 has been performed running of erasing, or the physical blocks be extracted for extracting before storage data when the physical blocks in idle district 504 can be performed running of erasing.Therefore, the physical blocks in idle district 504 is can by the physical blocks used.

The physical blocks belonging to system region 506 is in logic in order to register system data, and wherein this system data comprises manufacturer about reproducible nonvolatile memorizer module and model, the physical blocks number of reproducible nonvolatile memorizer module, the physical page number etc. of each physical blocks.

Belonging to the physical blocks replaced in district 508 is in logic replace bad physical blocks.Such as, non-volatile memory module 106 can reserve the physical blocks of 4% as replacing use in time dispatching from the factory.That is, when data field 502, idle district 504 damage with the physical blocks in system region 506, reserve and can be used to replacing damaged physical blocks in replacing the physical blocks in district 508.Therefore, if when still having normal physical blocks in replacement district 508 and physical blocks damage occurs, memory management circuitry 202 can extract normal physical blocks to change the physical blocks of damage from replacement district 508.If when to replace in district 508 without normal physical blocks and physical blocks damage occurs, then whole memorizer memory devices 100 can be declared as write protection (write protect) state by memory management circuitry 202, and cannot write data again.

Particularly, data field 502, idle district 504, system region 506 can be different according to different storer specifications with the quantity of the physical blocks in replacement district 508.In addition, it must be appreciated, during the running of memorizer memory devices 100, physical blocks is associated to data field 502, idle district 504, system region 506 can dynamically change with the grouping relation replacing district 508.Such as, when the physical blocks in idle district 504 is damaged and is substituted the physical blocks replacement in district, then the physical blocks originally replacing district 508 can be associated to idle district 504.

Please refer to Fig. 5, as mentioned above, data field 502 is data that the mode of rotating writes to store host computer system 1000 with the physical blocks in idle district 504.In this exemplary embodiment, memory management circuitry 202 meeting configuration logic block 510 (0) ~ 510 (H) is to map the physical blocks carrying out storage data in the above-mentioned mode of rotating, and the logical page (LPAGE) of logical blocks 510 (0) ~ 510 (H) is mapped to the logic access address that host computer system 1000 accesses, carry out access data in order to host computer system 1000.

Such as, logical blocks 510 (0) ~ 510 (H) initially can be mapped to the physical blocks of data field 502 by memory management circuitry 202.Specifically, when memorizer memory devices 100 is done manufacture, logical blocks 510 (0) ~ 510 (H) maps to the physical blocks 310 (0) ~ 310 (D) of data field 502 respectively.That is, a physical blocks in a logical blocks meeting mapping (enum) data district 502.At this, memory management circuitry 202 can set up logical blocks-physical blocks mapping table (logicalunit-physical unit mapping table), to record the mapping relations between logical blocks and physical blocks.That is, host computer system 1000 can be converted to the logical page (LPAGE) of corresponding logical blocks by memory management circuitry 202 for the logic access address accessed, thus by query logic block-physical blocks mapping table access data in physical address.

Referring to Fig. 6 ~ Fig. 8, such as, under the mapping status mapping to physical blocks 310 (0) in logical blocks 510 (0), when Memory Controller 104 receives write instruction and for write data to when belonging to the logical page (LPAGE) of logical blocks 510 (0) from host computer system 1000, memory management circuitry 202 can according to logical blocks-physical blocks mapping table recognition logic block 510 (0) be at present map to physical blocks 310 (0) and from idle district 504 extracts physical block 310 (D+1) as replacement physical blocks to physical blocks 310 (0) of rotating.But, while new data is write to muon physics block 310 (D+1) by memory management circuitry 202, all valid data in physical blocks 310 (0) can not be moved the physical blocks 310 (0) of erasing to physical blocks 310 (D+1) by memory management circuitry 202 at once.Specifically, memory management circuitry 202 can by the valid data before wish write physical page in physical blocks 310 (0) (namely, data in 0th physical page of physical blocks 310 (0) and the 1st physical page) be copied in the 0th physical page of physical blocks 310 (D+1) and the 1st physical page (as shown in Figure 7), and new data is write in 2nd ~ 4 physical pages of physical blocks 310 (D+1) (as shown in Figure 8).Now, namely memory management circuitry 202 completes the running of write.Because the valid data in physical blocks 310 (0) likely in next operation (such as, write instruction) in become invalid, therefore at once other valid data in physical blocks 310 (0) are moved to physical blocks 310 (D+1) and meaningless moving may be caused.In addition, data must write to the physical page in physical blocks in order, therefore, memory management circuitry 202 only can first move for write physical page before valid data (namely, be stored in data in the 0th physical page of physical blocks 310 (0) and the 0th physical page), and all the other valid data (that is, being stored in data in 5th ~ K physical page of physical blocks 310 (0)) wouldn't be moved.

In this exemplary embodiment, the running temporarily maintaining these instantaneous relationship is called unlatching (open) mother and child blocks, and original physical block (such as, above-mentioned physical blocks 310 (0)) be called female physical blocks and replace physical blocks (such as, above-mentioned with physical blocks 310 (D+1)) and be called muon physics block.

Afterwards, when needing physical blocks 310 (0) to merge (merge) with the data of physical blocks 310 (D+1), memory management circuitry 202 can by whole to physical blocks 310 (0) and the data of physical blocks 310 (D+1) and to a physical blocks, promote the service efficiency of physical blocks thus.At this, the running merging mother and child blocks is called data consolidation procedure or closedown (close) mother and child blocks.Such as, as shown in Figure 9, when carrying out closedown mother and child blocks, memory management circuitry 202 can by remaining valid data in physical blocks 310 (0) (namely, data in 5th ~ K physical page of physical blocks 310 (0)) be copied in the 5th physical page ~ the K physical page replacing physical blocks 310 (D+1), then erase operation for use is performed to physical blocks 310 (0) and the physical blocks 310 (0) after erasing is associated to idle district 504, meanwhile, physical blocks 310 (D+1) is associated to data field 502.That is, logical blocks 510 (0) can remap to physical blocks 310 (D+1) by memory management circuitry 202 in logical blocks-physical blocks mapping table.In addition, in this exemplary embodiment, memory management circuitry 202 can be set up idle district's physical blocks table (not illustrating) and record the physical blocks being associated to idle district at present.It is worth mentioning that, in idle district 504, the number of physical blocks is limited, base this, during memorizer memory devices 100 operates, the group number of the mother and child blocks of unlatching also can be restricted.Therefore, when memorizer memory devices 100 receives the write instruction coming from host computer system 1000, if the group number having opened mother and child blocks reaches in limited time, memory management circuitry 202 just can perform this write instruction after need closing at least one group of mother and child blocks of having opened at present.

Such as, be in the example of SD storage card at flash memory, the upper limit of the group number of openable mother and child blocks is generally be set as 1.Such as, when under state as shown in Figure 8 and Memory Controller 104 receives write instruction and for write data to when belonging to the logic access address of logical blocks 510 (1) from host computer system 1000, memory management circuitry 202 first must close mother and child blocks (as shown in Figure 8), and afterwards, then from idle district 504 extract a physical blocks to open mother and child blocks (as shown in figs. 6-7) to complete data write.

In this exemplary embodiment, the memory management circuitry 202 of Memory Controller 104 except can performing above-mentioned general write mode in proper order, also in order to use special write mode in proper order to write data.

Specifically, due to reproducible nonvolatile memorizer module 106 program norm require must start to write to last physical page from the initial physical page of each physical blocks (that is, the 0th physical page) and each position only can program once (namely from only can " 1 " become " 0 ") condition under.Therefore, once after the physical page of physical blocks is written into data, if just another physical blocks must be extracted to re-start the operation shown in Fig. 8, Fig. 6 and Fig. 7 from idle district 504 for upgrading the data write.In this exemplary embodiment, if the data of corresponding multiple continuous print logical page (LPAGE) have been written in muon physics block and host computer system 1000 upgrades this little continuous print logical page (LPAGE) once more time, memory management circuitry 202 can not perform above-mentioned general write mode in proper order, and can replace with special write mode in proper order.Specifically, in special write mode in proper order, the memory management circuitry 202 of Memory Controller 104 can not perform the operation of above-mentioned closedown mother and child blocks to carry out data merging, but from idle district 504, extracts another physical blocks write of belonging to this continuous print logical page (LPAGE) or many more new data as new muon physics block.

Fig. 9 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to the example of reproducible nonvolatile memorizer module, the special write mode in proper order when it is same as the page of data of old muon physics block in order to the renewal page of data representing when new muon physics block.

Please refer to Fig. 9, when under the storing state of reproducible nonvolatile memorizer module 106 is in the state shown in Fig. 7 and Memory Controller 104 from host computer system 1000, receive write instruction and for writing more new data UD to 0th ~ 4 logical page (LPAGE) of logical blocks 510 (0) time, memory management circuitry 202 to extract an empty physical blocks (such as from idle district 504, physical blocks 310 (D+2)), to more write in 0th ~ 4 physical pages of physical blocks 310 (D+2) by new data UD, using the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and erase operation for use is performed to physical blocks 310 (D+1).

Figure 10 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to another example of reproducible nonvolatile memorizer module, it is in order to represent when the renewal page of data of new muon physics block is more than the special write mode in proper order during page of data on old muon physics block.

Please refer to Figure 10, when under the storing state of reproducible nonvolatile memorizer module 106 is in the state shown in Fig. 7 and Memory Controller 104 from host computer system 1000, receive write instruction and for writing more new data UD to 0th ~ 5 logical page (LPAGE) of logical blocks 510 (0) time, memory management circuitry 202 to extract an empty physical blocks (such as from idle district 504, physical blocks 310 (D+2)), to more write in 0th ~ 5 physical pages of physical blocks 310 (D+2) by new data UD, using the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and erase operation for use is performed to physical blocks 310 (D+1).

Figure 11 be according to the present invention first exemplary embodiment illustrate with special write mode in proper order write data to another example of reproducible nonvolatile memorizer module, the special write mode in proper order it is less than the page of data on old muon physics block during in order to the renewal page of data representing when new muon physics block.

Please refer to Figure 11, when under the storing state of reproducible nonvolatile memorizer module 106 is in the state shown in Fig. 7 and Memory Controller 104 from host computer system 1000, receive write instruction and for writing more new data UD to 2nd ~ 3 logical page (LPAGE) of logical blocks 510 (0) time, memory management circuitry 202 to extract an empty physical blocks (such as from idle district 504, physical blocks 310 (D+2)), valid data in 0th ~ 1 physical page of physical blocks 310 (D+1) are copied in physical blocks 310 (D+2), to more write in 2nd ~ 3 physical pages of physical blocks 310 (D+2) by new data UD, valid data in 4th physical page of physical blocks 310 (D+1) are copied in physical blocks 310 (D+2), using the muon physics block of physical blocks 310 (D+2) as corresponding physical blocks 310 (0), and erase operation for use is performed to physical blocks 310 (D+1).

Based on above-mentioned, in this exemplary embodiment, when host computer system 1000 for write multiple continuous print logical page (LPAGE) of more new data to logical blocks and the muon physics block of physical blocks that this logical blocks corresponding maps has stored the data of this little continuous print logical page (LPAGE) corresponding time, memory management circuitry 202 can extract another physical blocks as new muon physics block to store valid data (as Suo Shi Fig. 9 ~ 11) from idle district 504, and data merging can not be performed (namely, close the operation of mother and child blocks), reduce the operation of data merging thus and shorten the time performing write instruction.

Please refer to Figure 12, when receiving the more new data for writing to multiple continuous print logical page (LPAGE) from host computer system 1000, in step S1201, memory management circuitry 202 can identify this logical blocks belonging to a little continuous print logical page (LPAGE).

Then, in step S1203, memory management circuitry 202 can identify current the mapped physical blocks of this logical blocks (hereinafter referred to as the first physical blocks).And in step S1205, whether memory management circuitry 202 can judge to have in idle district 504 arbitrary physical blocks to be extracted muon physics block as corresponding first physical blocks.

If when not having any physical blocks in idle district 504 by muon physics block as corresponding first physical blocks, in step S1207, memory management circuitry 202 can extract physical blocks (under be called the 4th physical blocks) from idle district 504, and will more write in the 4th physical blocks by new data.Specifically, more new data can write in the corresponding physical page of the 4th physical blocks according to putting in order of physical page by memory management circuitry 202 in order.Particularly, when the physical page writing more new data non-for initial physical page time, the valid data of the physical page before the corresponding physical page for write first can be copied to the 4th physical blocks (as can be seen from figures 6 to 8) from the first physical blocks by memory management circuitry 202.Afterwards, in step S1209, memory management circuitry 202 can using the muon physics block of the 4th physical blocks as corresponding first physical blocks.

If when in idle district 504, an existing physical blocks (hereinafter referred to as the second physical blocks) is extracted the muon physics block as corresponding first physical blocks, in step S1211, whether memory management circuitry 202 judges in the second physical blocks the storage data at least partially of the physical page of this little continuous print logical page (LPAGE) corresponding.

If in the second physical blocks one of them part of the physical page of this little continuous print logical page (LPAGE) corresponding storage data time, in step S1213, the data separation be stored in the second physical blocks can be the first data and the second data by memory management circuitry 202.Data in these so-called first data refer to the physical page being stored in this little continuous print logical page (LPAGE) corresponding in the second physical blocks (such as, data in 2nd and 3 physical pages of the physical blocks 310 (D+1) shown in Figure 11), and the second data refer to the data (data in the 0th, 1 and 4 physical pages of the physical blocks 310 (D+1) such as, shown in Figure 11) in the physical page being stored in this little continuous print logical page (LPAGE) of non-corresponding in the second physical blocks.

Afterwards, in step S1215, middle memory management circuitry 202 can extract a physical blocks (hereinafter referred to as the 3rd physical blocks) from idle district 504, and more new data and the second data write in the 3rd physical blocks a bit by this.Specifically, more new data and the second data can be written in the 3rd physical blocks in order according to the physical page of its correspondence.

Then, in step S1217, memory management circuitry 202 can using the 3rd physical blocks as the muon physics block of corresponding first physical blocks and to the second physical blocks execution erase operation for use.At this, above-mentioned steps S1213, step S1215 and step S1217 can be described as the second write-in program.

If in the second physical blocks one of them part of the physical page of this little continuous print logical page (LPAGE) corresponding storage data time, in step S1219, more new data can write in the second physical blocks by memory management circuitry 202.Similarly, the valid data of the physical page before the corresponding physical page for writing first can be copied to the second physical blocks from the first physical blocks by memory management circuitry 202.

[the second exemplary embodiment]

The memorizer memory devices of the present invention second exemplary embodiment and host computer system are the memorizer memory devices and the host computer system that are same as the first exemplary embodiment in essence, and wherein difference is that the Memory Controller of the second exemplary embodiment just uses above-mentioned special write mode in proper order to write data under given conditions.Below the second exemplary embodiment is described for cooperation Figure 1A, Fig. 2 and Fig. 3.

In the second exemplary embodiment, the memory management circuitry 202 of Memory Controller 104 uses the memory management mode being same as the first exemplary embodiment to manage reproducible nonvolatile memorizer module 106 (as Suo Shi Fig. 4 and 5).In addition, a part for the physical page of each physical blocks can be identified as specialized page region by memory management circuitry 202.Particularly, when the data of correspondence multiple continuous print logical page (LPAGE) have been written in muon physics block and host computer system 1000 upgrades this little continuous print logical page (LPAGE) once more, whether memory management circuitry 202 can belong to specialized page region according to the physical page for writing more new data has been decided with general write mode in proper order or has write this more new data with special write mode in proper order.Such as, when whether the physical page for writing more new data belongs to specialized page region, memory management circuitry 202 can write this more new data with special write mode in proper order, otherwise memory management circuitry 202 can write this more new data with general write mode in proper order.

Please refer to Figure 13, for physical blocks 310 (0), memory management circuitry 202 can start in order 0th ~ P physical page to be set as specialized page region 1302 from initial physical page (that is, the 0th physical page).In exemplary embodiment of the present invention, P is K/2.But, it must be appreciated, the present invention is not limited thereto.Specifically, due to specialized page region be arrange among physical blocks comparatively before several physical page and physical page must sequentially write, therefore, when repeatedly upgrading the data in specialized page region when host computer system 1000, utilize above-mentioned special write mode in proper order effectively can reduce the operation of data merging.And when repeatedly upgrading the data in no special page area when host computer system 1000, due to perform data merge needed for time shorter, use that general write mode may be more efficient in proper order.

Figure 14 is the process flow diagram of the method for writing data illustrated according to the present invention second exemplary embodiment, its data illustrated when corresponding multiple continuous print logical page (LPAGE) to be written in muon physics block (hereinafter referred to as the 6th physical blocks) and host computer system 1000 once more store more new data so far a little continuous print logical page (LPAGE) time write step, wherein this little continuous print logical page (LPAGE) belongs to same logical blocks (hereinafter referred to as the first logical blocks) and the first logical blocks is the physical blocks (hereinafter referred to as the 5th physical blocks) of data field 502 mapped.

Please refer to Figure 14, in step S1401, memory management circuitry 202 can judge whether the physical page of this little continuous print logical page (LPAGE) corresponding in the 6th physical blocks belongs to specific webpage region.

If when in the 6th physical blocks, the physical page of this little continuous print logical page (LPAGE) corresponding belongs to specific webpage region, then in step S1403, the data separation be stored in the 6th physical blocks can be the first data and the second data by memory management circuitry 202.Be same as in the first exemplary embodiment, at this, first data refer to the data in the physical page being stored in this little continuous print logical page (LPAGE) corresponding in the second physical blocks, and the second data refer to the data in the physical page being stored in this little continuous print logical page (LPAGE) of non-corresponding in the second physical blocks.

Afterwards, in step S1405, memory management circuitry 202 can be extracted a physical blocks (hereinafter referred to as the 7th physical blocks) and will more new data and the second data write in the 7th physical blocks from idle district 504.Specifically, more new data and the second data can be written in the 7th physical blocks in order according to the physical page of its correspondence.

Then, in step S1407, memory management circuitry 202 can using the 7th physical blocks as this muon physics block of corresponding 5th physical blocks and to the 6th physical blocks execution erase operation for use.At this, above-mentioned steps S1403, S1405, S1407 can be described as the second write-in program.

If when in the 6th physical blocks, the physical page of this little continuous print logical page (LPAGE) corresponding does not belong to specific webpage region, then in step S1409, valid data in the 5th physical blocks can copy in the 6th physical blocks by memory management circuitry 202, erase operation for use is performed to the 5th physical blocks, 5th physical blocks is associated to idle district 504, and the first logical blocks is mapped to the 6th physical blocks.

Then, in step S1411, memory management circuitry 202 can extract a physical blocks (hereinafter referred to as the 8th physical blocks) from idle district 504, and will more write in the 8th physical blocks by new data.Such as, in exemplary embodiment of the present invention, more new data can write in the corresponding physical page of the 8th physical blocks according to putting in order of physical page by memory management circuitry 202 in order.Particularly, when the physical page writing more new data non-for initial physical page time, the valid data of the physical page before the corresponding physical page for write first can be copied to the 8th physical blocks (as can be seen from figures 6 to 8) from the 6th physical blocks by memory management circuitry 202.

Except above-mentioned, more new data is write to except in the corresponding physical page of the 8th physical blocks, in another exemplary embodiment of the present invention, memory management circuitry 202 also can be write direct more new data from the initial physical page of the 8th physical blocks, and record the mapping relations that gap value (offset) identifies logical page (LPAGE) and physical page in the 8th physical blocks, such as the data for write the 3rd and 4 logical page (LPAGE)s are write the 0th and 1 physical page, but record gap value is 3 in order to represent that the data in this 0th and 1 physical page correspond to the 3rd and 4 logical page (LPAGE)s respectively.

Afterwards, in step S1413, memory management circuitry 202 can using the muon physics block of the 8th physical blocks as the 6th physical blocks.At this, above-mentioned steps S1409, S1411, S1413 can be described as the first write-in program.

In sum, method for writing data, the Memory Controller of exemplary embodiment of the present invention can when host computer system repeat again to store the continuous print logical page (LPAGE) that more new data is extremely identical with memory storage system, reduce data to merge, promote the speed of write data thus.

Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention; have in any art and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the appended right person of defining.

Claims

1. a method for writing data, for writing data to reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks, and each physical blocks has according to a tactic multiple physical page, and this method for writing data comprises:

The plurality of physical blocks is at least grouped into a data field and an idle district;

Configure multiple logical blocks to map the physical blocks of this data field, wherein each logical blocks has multiple logical page (LPAGE);

Receive many more new datas, wherein these many more new data correspond to the multiple continuous print logical page (LPAGE)s among the plurality of logical page (LPAGE), the plurality of continuous print logical page (LPAGE) belongs to one first logical blocks among the plurality of logical blocks and this first logical blocks maps one first physical blocks among the plurality of physical blocks;

Whether the arbitrary physical blocks among the physical blocks judging this idle district has been extracted as to should a muon physics block of the first physical blocks;

One second physical blocks among the physical blocks in this idle district be extracted as to should this muon physics block of the first physical blocks time, judge one of them part whether storage data of the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks; And

When the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks one of them part storage data time, perform one second write-in program, this second write-in program comprises:

Be one first data and one second data by the data separation be stored in this second physical blocks;

One the 3rd physical blocks is extracted from the physical blocks in this idle district;

By these many, more new data and this second data write in the 3rd physical blocks;

Using the 3rd physical blocks as to should this muon physics block of the first physical blocks; And

Perform an erase operation for use to this second physical blocks, wherein these first data are the data that are stored in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks and this second data are stored in the data in the plurality of physical page of non-corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks.

2. method for writing data according to claim 1, also comprises:

When the non-storage data of the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks, by these many more new data write in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks.

3. method for writing data according to claim 2, also comprises:

Before by these many, more new data writes in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks, the valid data in this first physical blocks are copied in this second physical blocks.

4. method for writing data according to claim 1, also comprises:

Among the physical blocks in this idle district without any physical blocks be extracted as to should this muon physics block of the first physical blocks time, from the physical blocks in this idle district, extract one the 4th physical blocks, by these many more new data to write in the 4th physical blocks and using the 4th physical blocks this muon physics block as this first physical blocks.

5. a method for writing data, for writing many more new data to reproducible nonvolatile memorizer module, this reproducible nonvolatile memorizer module has multiple physical blocks, each physical blocks has according to a tactic multiple physical page, the plurality of physical blocks is grouped into a data field and an idle district, multiple logical blocks is configured to the physical blocks mapping this data field, each logical blocks maps one of them of the physical blocks of this data field and has multiple logical page (LPAGE), among the physical blocks of this data field 1 the 5th physical blocks maps one first logical blocks among the plurality of logical blocks, among the physical blocks in this idle district 1 the 6th physical blocks has been extracted as to should a muon physics block of the 5th physical blocks, these many more new data belong to this first logical blocks the plurality of logical page (LPAGE) among multiple continuous print logical page (LPAGE) and in the 6th physical blocks one of them part storage data of the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE), this method for writing data comprises:

Judge whether the physical page of corresponding the plurality of continuous print logical page (LPAGE) in the 6th physical blocks belongs to a specific webpage region; And

When the physical page of the plurality of continuous print logical page (LPAGE) corresponding in the 6th physical blocks belongs to this specific webpage region, perform one second write-in program, this second write-in program comprises:

Be one first data and one second data by the data separation be stored in the 6th physical blocks;

One the 7th physical blocks is extracted from the physical blocks in this idle district;

By these many, more new data and this second data write in the 7th physical blocks;

Using the 7th physical blocks as to should this muon physics block of the 5th physical blocks; And

One erase operation for use is performed to the 6th physical blocks, wherein these first data are the data that are stored in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in the 6th physical blocks and this second data are the data in the non-the plurality of physical page being stored in corresponding the plurality of continuous print logical page (LPAGE) in the 6th physical blocks

Wherein this specific webpage region is the multiple continuous physical pages comprising an initial physical page in each physical blocks.

6. method for writing data according to claim 5, also comprises:

When the physical page of the plurality of continuous print logical page (LPAGE) corresponding in the 6th physical blocks does not belong to this specific webpage region, perform one first write-in program, this first write-in program comprises:

Valid data in the 5th physical blocks are copied in the 6th physical blocks;

This erase operation for use is performed to the 5th physical blocks;

5th physical blocks is associated to this idle district;

This first logical blocks is mapped the 6th physical blocks;

One the 8th physical blocks is extracted from the physical blocks in this idle district;

By these many more new data write in the 8th physical blocks; And

Using the muon physics block of the 8th physical blocks as the 6th physical blocks.

7. these many steps that more new data writes in the 8th physical blocks are wherein comprised by method for writing data according to claim 6:

These many more new datas are write an initial physical page among the plurality of physical page of the 8th physical blocks.

8. these many steps that more new data writes in the 8th physical blocks are wherein comprised by method for writing data according to claim 6:

Part valid data in the 6th physical blocks are copied in the 8th physical blocks; And

By these many more new data write in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in the 8th physical blocks.

9. a method for writing data, for writing data to reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks, and each physical blocks has according to a tactic multiple physical page, and this method for writing data comprises:

Receive at least one pen more new data, wherein this more new data correspond at least one logical page (LPAGE) among the plurality of logical page (LPAGE), this at least one logical page (LPAGE) belongs to one first logical blocks among the plurality of logical blocks and this first logical blocks maps one first physical blocks among the plurality of physical blocks;

One second physical blocks among the physical blocks in this idle district be extracted as to should this muon physics block of the first physical blocks time, judge in this second physical blocks should this physical page whether storage data of logical page (LPAGE); And

When in this second physical blocks to should logical page (LPAGE) this physical page storage data time, perform one second write-in program, this second write-in program comprises:

By this more new data write in the 3rd physical blocks;

One erase operation for use is performed to this second physical blocks.

10. method for writing data according to claim 9, wherein when this second physical blocks have to should second data of one first data of logical page (LPAGE) and this logical page (LPAGE) of non-corresponding time, this second write-in program also comprises and these the second data being write in the 3rd physical blocks.

11. method for writing data according to claim 9, also be included in perform and judge before this second write-in program in this second physical blocks this physical page of logical page (LPAGE) whether being positioned at a specific webpage region, and when this physical page is positioned at this specific webpage region, side performs this second write-in program.

12. 1 kinds of Memory Controllers, for managing a reproducible nonvolatile memorizer module, wherein this reproducible nonvolatile memorizer module has multiple physical blocks and each physical blocks has according to a tactic multiple physical page, and this Memory Controller comprises:

One host interface, in order to be coupled to a host computer system;

One memory interface, in order to be coupled to this reproducible nonvolatile memorizer module; And

One memory management circuitry, is coupled to this host interface and this memory interface,

Wherein this memory management circuitry is in order to be at least grouped into a data field and an idle district by the plurality of physical blocks, and configures multiple logical blocks to map the physical blocks of this data field, and wherein each logical blocks has multiple logical page (LPAGE),

Wherein this memory management circuitry receives many more new datas from this host computer system, wherein these many more new data belong to the multiple continuous print logical page (LPAGE)s among the plurality of logical page (LPAGE), the plurality of continuous print logical page (LPAGE) belongs to one first logical blocks among the plurality of logical blocks and this first logical page (LPAGE) maps one first physical blocks among the plurality of physical blocks

Wherein this memory management circuitry judge this idle district physical blocks among arbitrary physical blocks whether be extracted as to should a muon physics block of the first physical blocks,

One second physical blocks wherein among the physical blocks in this idle district be extracted as to should this muon physics block of the first physical blocks time, whether this memory management circuitry judges one of them part storage data of the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks

Wherein when the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks one of them part storage data time, the data separation be stored in this second physical blocks is one first data and one second data by this memory management circuitry, one the 3rd physical blocks is extracted from the physical blocks in this idle district, by these many, more new data and this second data write in the 3rd physical blocks, using the 3rd physical blocks as to should this muon physics block of the first physical blocks, and erase operation for use is performed to this second physical blocks,

Wherein these first data are the data that are stored in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks and this second data are stored in the data in the plurality of physical page of non-corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks.

13. Memory Controllers according to claim 12,

Wherein when the non-storage data of the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks, this memory management circuitry by these many more new data write in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks.

14. Memory Controllers according to claim 13,

Wherein before by these many, more new data writes in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks, the valid data in this first physical blocks copy in this second physical blocks by this memory management circuitry.

15. Memory Controllers according to claim 14,

Wherein among the physical blocks in this idle district without any physical blocks be extracted as to should this muon physics block of the first physical blocks time, this memory management circuitry extracts one the 4th physical blocks from the physical blocks in this idle district, by these many more new data to write in the 4th physical blocks and using the 4th physical blocks this muon physics block as this first physical blocks.

16. Memory Controllers according to claim 12, wherein when the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks one of them part storage data time, this memory management circuitry also judges whether the physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks belongs to a specific webpage region

Wherein only when the physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks belongs to this specific webpage region, the data separation be stored in this second physical blocks is these first data and this second data by this memory management circuitry, the 3rd physical blocks is extracted from the physical blocks in this idle district, by these many, more new data and this second data write in the 3rd physical blocks, using the 3rd physical blocks as to should this muon physics block of the first physical blocks, and this erase operation for use be performed to this second physical blocks.

17. 1 kinds of memorizer memory devices, comprising:

A connector, in order to be coupled to a host computer system;

One reproducible nonvolatile memorizer module, has multiple physical blocks and each physical blocks has according to a tactic multiple physical page; And

One Memory Controller, is coupled to this connector and this reproducible nonvolatile memorizer module,

Wherein this Memory Controller is in order to be at least grouped into a data field and an idle district by the plurality of physical blocks, and configures multiple logical blocks to map the physical blocks of this data field, and wherein each logical blocks has multiple logical page (LPAGE),

Wherein this Memory Controller receives many more new datas from this host computer system, wherein these many more new data belong to the multiple continuous print logical page (LPAGE)s among the plurality of logical page (LPAGE), the plurality of continuous print logical page (LPAGE) belongs to one first logical blocks among the plurality of logical blocks and this first logical page (LPAGE) maps one first physical blocks among the plurality of physical blocks

Wherein this Memory Controller judge this idle district physical blocks among arbitrary physical blocks whether be extracted as to should a muon physics block of the first physical blocks,

One second physical blocks wherein among the physical blocks in this idle district be extracted as to should this muon physics block of the first physical blocks time, whether this Memory Controller judges one of them part storage data of the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks

Wherein when the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks one of them part storage data time, the data separation be stored in this second physical blocks is one first data and one second data by this Memory Controller, one the 3rd physical blocks is extracted from the physical blocks in this idle district, by these many, more new data and this second data write in the 3rd physical blocks, using the 3rd physical blocks as to should this muon physics block of the first physical blocks, and an erase operation for use is performed to this second physical blocks,

18. memorizer memory devices according to claim 17,

Wherein when the non-storage data of the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks, this Memory Controller by these many more new data write in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks.

19. memorizer memory devices according to claim 18,

Wherein before by these many, more new data writes in the plurality of physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks, the valid data in this first physical blocks copy in this second physical blocks by this Memory Controller.

20. memorizer memory devices according to claim 17,

Wherein among the physical blocks in this idle district without any physical blocks be extracted as to should this muon physics block of the first physical blocks time, this Memory Controller extracts one the 4th physical blocks from the physical blocks in this idle district, by these many more new data to write in the 4th physical blocks and using the 4th physical blocks this muon physics block as this first physical blocks.

21. memorizer memory devices according to claim 17, wherein when the plurality of physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks one of them part storage data time, this Memory Controller also judges whether the physical page of corresponding the plurality of continuous print logical page (LPAGE) in this second physical blocks belongs to a specific webpage region

Wherein only when the physical page of the plurality of continuous print logical page (LPAGE) corresponding in this second physical blocks belongs to this specific webpage region, the data separation be stored in this second physical blocks is these first data and this second data by this Memory Controller, the 3rd physical blocks is extracted from the physical blocks in this idle district, by these many, more new data and this second data write in the 3rd physical blocks, using the 3rd physical blocks as to should this muon physics block of the first physical blocks, and this erase operation for use be performed to this second physical blocks.