CN103312331B - A kind of analog to digital converter based on memristor - Google Patents
A kind of analog to digital converter based on memristor Download PDFInfo
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- CN103312331B CN103312331B CN201310208362.5A CN201310208362A CN103312331B CN 103312331 B CN103312331 B CN 103312331B CN 201310208362 A CN201310208362 A CN 201310208362A CN 103312331 B CN103312331 B CN 103312331B
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Abstract
The present invention relates to semiconductor integrated circuit field, it discloses and a kind ofly novel there is high accuracy, low-power consumption, the analog to digital converter based on memristor that chip occupying area is little.This analog to digital converter comprises generating circuit from reference voltage, comparator, the counter of generation output codons and reset circuit; Described generating circuit from reference voltage is connected with the end of oppisite phase of comparator; The homophase termination input voltage of described comparator; The output of described comparator passes through or door is connected with the counter of described generation output codons; Described reset circuit is connected with described generating circuit from reference voltage.The present invention is based on the analog to digital converter that memristor realizes and there is high accuracy, low-power consumption, advantage that chip occupying area is little, and this analog to digital converter simple structure, be easy to control, be applicable to low-power consumption analog-to-digital conversion.
Description
Technical field
The present invention relates to semiconductor integrated circuit field, particularly a kind of analog to digital converter based on memristor, for carrying out the conversion of analog signal to digital signal.
Background technology
Along with developing rapidly and the extensive use of computer in automatic detection and automatic control system of electronic technology, utilize that digital computer is handled and what transmit is all discontinuous digital signal, and what run in reality is mostly continually varying analog quantity, analog quantity is after the analog quantity that transducer Collect conversion becomes the signal of telecommunication, digital signal need be become through analog-to-digital conversion just can be input in digital system and carry out processing and controlling, thus as interface circuit analog electrical energy being converted to digital output---A/D converter is the bridge that analog signal leads to digital signal, also be key and the bottleneck place of the development of current electronic technology.
Analog to digital converter comprises three basic functions: sampling, quantification and coding; Sampling is by analog signal discretization in time, makes it to become sampled signal; The amplitude discretization of sampled signal is quantized to make it to become digital signal; Digital signal is then finally expressed as the receptible form of digital system by coding; How to realize form and performance that these three functions just determine ADC.Meanwhile, the resolution of ADC is higher, and the change-over time of needs is longer, and switching rate is lower, therefore the always mutual restriction of the resolution of ADC and switching rate.Thus to take into account at a high speed while development high resolution A/D C, high-resolution will be taken into account while Developing High-speed ADC, also to consider on this basis power consumption, volume, portability, multi-functional, with computer and the problem such as the compatibility of communication network and the particular/special requirement of application, this also make the structure of ADC and classification intricate.
Current, in order to adapt to computer, communication and the develop rapidly of multimedia technology and the digitlization process of high-technology field is constantly accelerated, analog to digital conversion circuit all makes great progress on technique, properity, towards low-power consumption, at a high speed, high-resolution future development.
Memristor (MEMRISTOR) is the 4th kind of basic passive device outside resistance, electric capacity and inductance, proposes the concept of memristor first and demonstrate its theoretical foundation existed by the few Chinese bush cherry of Cai in 1971.2008, HP laboratory found and has made the both-end resistance having and recall resistance characteristic.Memristor resistance can be made at maximum value R to the additional program voltage of memristor
mAXwith minimum resistance R
mINbetween change: when memristor two ends add positive voltage, memristor resistance reduce; When memristor two ends add negative voltage, memristor resistance raises.
The maximum value R of usual memristor
mAXwith minimum resistance R
mINdiffer more than three orders of magnitude, the resistance change time can be low to moderate nanosecond order, program voltage is low, and memristor resistance can be programmed in any resistance between maximum value and minimum resistance by controlling the amplitude of programming pulse, frequency, number and duty ratio.
Therefore, the These characteristics how applying memristor designs the emphasis that a kind of analog to digital conversion circuit with advantages such as high accuracy, low-power consumption, chip occupying area are little based on memristor becomes current research.
Summary of the invention
Technical problem to be solved by this invention is: propose a kind of novel high accuracy, low-power consumption, the analog to digital converter based on memristor that chip occupying area is little.
The scheme that the present invention solves the problems of the technologies described above employing is: a kind of analog to digital converter based on memristor, comprises generating circuit from reference voltage, comparator, the counter of generation output codons and reset circuit; Described generating circuit from reference voltage is connected with the end of oppisite phase of comparator; The homophase termination input voltage of described comparator; The output of described comparator passes through or door is connected with the counter of described generation output codons; Described reset circuit is connected with described generating circuit from reference voltage.
Further, described generating circuit from reference voltage comprises memristor, the first transmission gate, the second transmission gate, inverter and current source; The input of described inverter is connected with the control end of described first transmission gate, and connects clock signal; The output of described inverter is connected with the control end of described second transmission gate; The input of described first transmission gate is connected with program voltage, and its output is connected with the top electrode (TE) of described memristor; The input of described second transmission gate is connected with the top electrode (TE) of described memristor, and its output is connected with described current source; Hearth electrode (BE) ground connection of described memristor.
Further, described reset circuit comprises voltage source and the 3rd transmission gate; The input of described 3rd transmission gate is connected with described voltage source, and its output is connected with the top electrode (TE) of described memristor, and its control end is connected with the output of described comparator.
The invention has the beneficial effects as follows: the analog to digital converter realized based on memristor has high accuracy, low-power consumption, advantage that chip occupying area is little, and this analog to digital converter simple structure, be easy to control, be applicable to low-power consumption analog-to-digital conversion.
Accompanying drawing explanation
Fig. 1 is the generating circuit from reference voltage structure chart of the analog to digital converter in the present invention;
Fig. 2 is the reset circuit structure chart of the analog to digital converter in the present invention;
Fig. 3 is the overall structure figure of the analog to digital converter in the present invention;
Fig. 4 is that the resistance of memristor is with pulse number change curve;
Fig. 5 is the workflow diagram of the analog to digital converter in the present invention;
Fig. 6 is that memristor resistance in embodiment is with clock number change curve;
Fig. 7 be in embodiment reference voltage with clock number change curve;
In figure, S1 is the first transmission gate, S2 is the second transmission gate, S3 is the 3rd transmission gate, I1 is inverter, I2 is or door, I
rEADfor current source, CLK be clock signal, Vp is program voltage, V
rESETfor voltage source, V
iNfor input voltage.
Embodiment
The present invention is intended to propose a kind ofly novel have high accuracy, low-power consumption, the analog to digital converter based on memristor that chip occupying area is little, and memristor (MEMRISTOR) is the 4th kind of basic passive device outside resistance, electric capacity and inductance.The resistance of memristor is programmed in maximum value R by amplitude, frequency, number and the duty ratio that can pass through to control to be added in the pulse signal at memristor two ends
mAXwith minimum resistance R
mINbetween any resistance; Use the resistance of potential pulse to memristor to programme in the present invention, memristor resistance can gradually change with pulse number; In order to realize the decline gradually of memristor resistance, the present invention adopts positive voltage pulse to be added in memristor top electrode and programmes to memristor resistance, thus memristor resistance can be made to be that step-like declines gradually by control impuls amplitude, frequency, duty ratio and pulse number.
Analog to digital converter in the present invention comprises generating circuit from reference voltage, comparator, the counter of generation output codons and the several part of reset circuit, and described generating circuit from reference voltage is connected with the end of oppisite phase of comparator; The homophase termination input voltage of described comparator; The output of described comparator passes through or door is connected with the counter of described generation output codons; Described reset circuit is connected with described generating circuit from reference voltage.
On concrete enforcement, as shown in Figure 1, it comprises memristor (MEMRISTOR), the first transmission gate S1, the second transmission gate S2, inverter I1 and current source I to generating circuit from reference voltage
rEAD; The input of described inverter I1 is connected with the control end of described first transmission gate S1, and connects clock signal clk; The output of described inverter I1 is connected with the control end of described second transmission gate S2; The input of described first transmission gate S1 and program voltage V
pbe connected, its output is connected with the top electrode TE of described memristor; The input of described second transmission gate S2 is connected with the top electrode of described memristor, its output and described current source I
rEADbe connected; Hearth electrode (BE) ground connection of described memristor; This generating circuit from reference voltage is for generation of the reference voltage V declined gradually with clock number
rEFbe added to end of oppisite phase and the input voltage V of comparator (CMP)
iNcompare;
As shown in Figure 2, it comprises voltage source V to reset circuit
rESETand the 3rd transmission gate S3, the input of described 3rd transmission gate S3 and described voltage source V
rESETbe connected, its output is connected with the top electrode of described memristor, and its control end is connected with the output of described comparator; This reset circuit is used for carrying out reset operation to memristor, makes its resistance get back to maximum R
mAX;
The overall structure of the analog to digital converter formed based on above-mentioned generating circuit from reference voltage, reset circuit, comparator and the counter producing output codons as shown in Figure 3.
In the present invention, pass through to additional identical with clock signal frequency on memristor during generating circuit from reference voltage work, duty ratio is identical, and amplitude is V
ppotential pulse memristor resistance is programmed, memristor resistance is declined gradually with clock number, thus produces the reference voltage V that declines gradually
rEF.
Before first clock pulse of each change-over period arrives, memristor is reset circuit reset to R
mAX; When clock signal clk is high level, the first transmission gate S1 conducting, the second transmission gate S2 turns off, and memristor top electrode (TE) meets program voltage V
p, hearth electrode (BE) ground connection, V
pto the programming of memristor resistance, due to program voltage V
pfor positive voltage, memristor resistance declines gradually with clock number, thus can produce the reference voltage V declined gradually with clock number
rEF.When clock signal clk is low level, the first transmission gate S1 turns off, the second transmission gate S2 conducting, a read current I that can not cause memristor change in resistance
rEADflow into from memristor top electrode, thus the memristor resistance after programming is converted to reference voltage V
rEF, that is:
V
REF=I
READR
M
Wherein R
mfor memristor resistance.
The workflow of the analog to digital conversion circuit in the present invention as shown in Figure 5, when the change-over period starts, analog input signal (i.e. input voltage V
iN) be sampled, keep and deliver to the in-phase end of comparator; Counter is reset, and memristor resistance is reset to maximum value R
mAX, clock is added on the transmission gate for controlling memristor resistance simultaneously.When first clock pulse arrives, when clock is low level, the first transmission gate S1 turns off, the second transmission gate S2 conducting, a reading electric current I not affecting memristor resistance
rEADread memristor resistance and be converted to end of oppisite phase and the input voltage V that reference voltage is added in comparator
iNrelatively, now memristor resistance is maximum R
mAX, produce initial reference voltage, if V
iNless than initial reference voltage value, comparator output low level, output counter adds 1 to clock count; When next clock high level comes interim, the first transmission gate S1 conducting, the second transmission gate S2 turns off, program voltage V
pto the programming of memristor resistance, reduce the resistance of memristor further, thus when next clock low arrives, the reference voltage being added in comparator end of oppisite phase is declined further.Because V
iNless than reference voltage, comparator output low level, and to be added to or each clock pulse on door I2 causes the rolling counters forward of output; Finally, reference voltage is made to be less than or equal to V when memristor resistance is reduced to
iNtime, comparator exports and rises to high level, and output counter is prohibited, and makes the 3rd transmission gate S3 conducting, to the additional larger negative voltage V of memristor
rESETreset operation is carried out to memristor, makes memristor resistance get back to maximum value R
mAX.The binary number representing output counter state can convert the pattern of requirement now to.Memristor resistance with pulse number change curve as shown in Figure 4, can change the size of memristor change in resistance step value by the size changing pulse frequency, duty ratio and amplitude.The present invention can by changing clock frequency, duty ratio and V
psize change the size of memristor change in resistance step value, change the size of reference voltage change step value.
Below in conjunction with drawings and Examples, the solution of the present invention is further described:
In this example, memristor maximum value R
mAXfor 20kOhm, minimum resistance R
mINfor 10kOhm, voltage source V
pfor 0.5V, current source I
rEADfor 10uA, clock frequency is 1KHz, and duty ratio is 20%, then memristor resistance with clock number change curve as shown in Figure 6, each programming pulse makes memristor resistance decline 500Ohm, and namely often cross a clock reference voltage drop 5mV, reference voltage with clock number change curve as shown in Figure 7; When adopting the analog to digital converter in this example to carry out work, its input reference signal and corresponding counter export as shown in the table:
Table one: the corresponding table that input reference signal and counter export
Input reference signal | Counter exports |
200mV<V IN | 00000 |
195mV<V IN≤200mV | 00001 |
190mV<V IN≤195mV | 00010 |
185mV<V IN≤190mV | 00011 |
180mV<V IN≤185mV | 00100 |
175mV<V IN≤180mV | 00101 |
170mV<V IN≤175mV | 00110 |
165mV<V IN≤170mV | 00111 |
160mV<V IN≤165mV | 01000 |
155mV<V IN≤160mV | 01001 |
150mV<V IN≤155mV | 01010 |
145mV<V IN≤150mV | 01011 |
140mV<V IN≤145mV | 01100 |
135mV<V IN≤140mV | 01101 |
130mV<V IN≤135mV | 01110 |
125mV<V IN≤130mV | 01111 |
120mV<V IN≤125mV | 10000 |
115mV<V IN≤120mV | 10001 |
110mV<V IN≤115mV | 10010 |
105mV<V IN≤110mV | 10011 |
As can be seen here, the analog to digital converter in the present invention is adopted can to realize high-precision analog-to-digital conversion demand.
It should be noted that; the scheme of application claims protection comprises but is not limited only to above-described embodiment; those skilled in the art not departing from according to equivalent modifications/replacement that the description of above-described embodiment is made in Spirit Essence situation of the present invention, all within protection scope of the present invention.
Claims (1)
1. based on an analog to digital converter for memristor, it is characterized in that, comprise generating circuit from reference voltage, comparator, the counter of generation output codons and reset circuit; Described generating circuit from reference voltage is connected with the end of oppisite phase of comparator; The homophase termination input voltage of described comparator; The output of described comparator passes through or door is connected with the counter of described generation output codons; Described reset circuit is connected with described generating circuit from reference voltage;
Described generating circuit from reference voltage comprises memristor, the first transmission gate, the second transmission gate, inverter and current source; The input of described inverter is connected with the control end of described first transmission gate, and connects clock signal; The output of described inverter is connected with the control end of described second transmission gate; The input of described first transmission gate is connected with program voltage, and its output is connected with the top electrode of described memristor; The input of described second transmission gate is connected with the top electrode of described memristor, and its output is connected with described current source; The hearth electrode ground connection of described memristor;
Described reset circuit comprises voltage source and the 3rd transmission gate; The input of described 3rd transmission gate is connected with described voltage source, and its output is connected with the top electrode of described memristor, and its control end is connected with the output of described comparator.
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CN106899297A (en) * | 2017-01-17 | 2017-06-27 | 华中科技大学 | A kind of A/D converter circuit based on memristor |
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US4739305A (en) * | 1985-04-29 | 1988-04-19 | Ishida Scales Mfg. Co., Ltd. | Double integral type A/D converter |
CN1653696A (en) * | 2002-05-09 | 2005-08-10 | 神经网路处理有限公司 | Digital-analog converter |
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