CN103262228B - 具有抗电迁移馈线结构的ic器件 - Google Patents

具有抗电迁移馈线结构的ic器件 Download PDF

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Publication number
CN103262228B
CN103262228B CN201180060401.0A CN201180060401A CN103262228B CN 103262228 B CN103262228 B CN 103262228B CN 201180060401 A CN201180060401 A CN 201180060401A CN 103262228 B CN103262228 B CN 103262228B
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China
Prior art keywords
sub
trajectory
welding pad
bonding welding
keying element
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Active
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CN201180060401.0A
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English (en)
Chinese (zh)
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CN103262228A (zh
Inventor
G·E·霍华德
P·汤普森
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Texas Instruments Inc
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Texas Instruments Inc
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Publication of CN103262228A publication Critical patent/CN103262228A/zh
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/225—Bumps having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/253—Materials not comprising solid metals or solid metalloids, e.g. polymers or ceramics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
CN201180060401.0A 2010-12-16 2011-12-16 具有抗电迁移馈线结构的ic器件 Active CN103262228B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/970,464 2010-12-16
US12/970,464 US8531030B2 (en) 2010-12-16 2010-12-16 IC device having electromigration resistant feed line structures
PCT/US2011/065355 WO2012083110A2 (en) 2010-12-16 2011-12-16 Ic device having electromigration resistant feed line structures

Publications (2)

Publication Number Publication Date
CN103262228A CN103262228A (zh) 2013-08-21
CN103262228B true CN103262228B (zh) 2016-04-20

Family

ID=46233313

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180060401.0A Active CN103262228B (zh) 2010-12-16 2011-12-16 具有抗电迁移馈线结构的ic器件

Country Status (4)

Country Link
US (1) US8531030B2 (enExample)
JP (1) JP6053690B2 (enExample)
CN (1) CN103262228B (enExample)
WO (1) WO2012083110A2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8575007B2 (en) * 2011-03-28 2013-11-05 International Business Machines Corporation Selective electromigration improvement for high current C4s
US9318414B2 (en) 2013-10-29 2016-04-19 Globalfoundries Inc. Integrated circuit structure with through-semiconductor via
US9318413B2 (en) 2013-10-29 2016-04-19 Globalfoundries Inc. Integrated circuit structure with metal cap and methods of fabrication
US9515035B2 (en) 2014-12-19 2016-12-06 International Business Machines Corporation Three-dimensional integrated circuit integration
US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
US10289794B2 (en) 2016-12-14 2019-05-14 Taiwan Semiconductor Manufacturing Company Ltd. Layout for semiconductor device including via pillar structure
US10833036B2 (en) 2018-12-27 2020-11-10 Texas Instruments Incorporated Interconnect for electronic device
US11362047B2 (en) * 2020-04-16 2022-06-14 Texas Instruments Incorporated Integrated system-in-package with radiation shielding

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030216023A1 (en) * 1997-03-26 2003-11-20 Wark James M. Projected contact structures for engaging bumped semiconductor devices and methods of making the same
US20050028123A1 (en) * 2003-07-28 2005-02-03 Senol Pekin Optimized bond out method for flip chip wafers
US20080026560A1 (en) * 2002-06-25 2008-01-31 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US20080042271A1 (en) * 2005-02-01 2008-02-21 Dauksher Walter J Trace Design to Minimize Electromigration Damage to Solder Bumps

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4452217B2 (ja) * 2005-07-04 2010-04-21 富士通マイクロエレクトロニクス株式会社 半導体装置
US8212357B2 (en) 2008-08-08 2012-07-03 International Business Machines Corporation Combination via and pad structure for improved solder bump electromigration characteristics
WO2010059724A2 (en) * 2008-11-20 2010-05-27 Qualcomm Incorporated Capacitor die design for small form factors
US8084858B2 (en) * 2009-04-15 2011-12-27 International Business Machines Corporation Metal wiring structures for uniform current density in C4 balls

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030216023A1 (en) * 1997-03-26 2003-11-20 Wark James M. Projected contact structures for engaging bumped semiconductor devices and methods of making the same
US20080026560A1 (en) * 2002-06-25 2008-01-31 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US20050028123A1 (en) * 2003-07-28 2005-02-03 Senol Pekin Optimized bond out method for flip chip wafers
US20080042271A1 (en) * 2005-02-01 2008-02-21 Dauksher Walter J Trace Design to Minimize Electromigration Damage to Solder Bumps

Also Published As

Publication number Publication date
WO2012083110A3 (en) 2012-09-07
WO2012083110A2 (en) 2012-06-21
JP6053690B2 (ja) 2016-12-27
US8531030B2 (en) 2013-09-10
CN103262228A (zh) 2013-08-21
JP2014501446A (ja) 2014-01-20
US20120153458A1 (en) 2012-06-21

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