CN103259422A - Power supply device - Google Patents
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Abstract
Description
技术领域 technical field
本发明涉及一种电源装置,尤其涉及一种具有缓冲电路的电源装置。 The invention relates to a power supply device, in particular to a power supply device with a buffer circuit.
背景技术 Background technique
目前的笔记本电脑、伺服器等电源装置通常包括电源供应单元(Power supply unit, PSU)以及降压电路,所述PSU用以将从外界接入的交流电转换为直流电,所述降压电路用以将PSU转换的直流电的电压降低至预设的电压值,供应至伺服器系统等受电端。现有的降压电路通常包括脉冲宽度调制芯片等控制器、依次串接于PSU以及地之间的第一开关、第二开关、相串接后并联至第二开关相对两端的输出电感以及储能电容,伺服器系统等受电端则并联至储能电容的相对两端,并通过控制器控制所述第一开关以及第二开关依次导通而将PSU输出的电压转换成预设的电压供应至受电端。然而,当所述电源装置输出至负载的电压较高时(即该降压电路处于重载状态),在所述第二开关从导通状态切换至断开状态的瞬间,该第二开关上的电压可能会因PSU供应的电压的作用而突然增大,从而烧坏所述第二开关。对此,现有的作业方式是在第二开关以及输出电感之间串接由电阻及电容组成的缓冲电路,以抑制所述第二开关断开时瞬间电压过高的现象。可见,上述缓冲电路虽然可在电源装置处于重载(输出的电压较高)时有效防止第二开关被烧坏,但是该缓冲电路在电源装置处于轻载状态下而无需保护第二开关时,则会闲置而增加该电源装置的功率损耗。 Current power supply devices such as notebook computers and servers usually include a power supply unit (Power supply unit, PSU) and a step-down circuit. The PSU is used to convert AC power from the outside into DC power. Reduce the voltage of the DC power converted by the PSU to a preset voltage value, and supply it to the power receiving end such as the server system. The existing step-down circuit usually includes a controller such as a pulse width modulation chip, a first switch serially connected between the PSU and the ground, a second switch, an output inductor connected in series and parallel to the opposite ends of the second switch, and a storage The power receiving end of the energy storage capacitor, the server system, etc. is connected in parallel to the opposite ends of the energy storage capacitor, and the controller controls the first switch and the second switch to turn on in sequence to convert the voltage output by the PSU into a preset voltage supplied to the receiving end. However, when the voltage output from the power supply device to the load is relatively high (that is, the step-down circuit is in a heavy load state), at the moment when the second switch is switched from the on state to the off state, the second switch The voltage of the PSU may suddenly increase due to the voltage supplied by the PSU, thereby burning out the second switch. In this regard, the existing operation method is to connect a snubber circuit composed of a resistor and a capacitor in series between the second switch and the output inductor, so as to suppress the instantaneous overvoltage phenomenon when the second switch is turned off. It can be seen that although the above snubber circuit can effectively prevent the second switch from being burned out when the power supply device is under heavy load (the output voltage is relatively high), the snubber circuit does not need to protect the second switch when the power supply device is under a light load state. It will be idle and increase the power loss of the power supply device.
发明内容 Contents of the invention
鉴于以上内容,有必要提供一种供电效率较高的电源中装置。 In view of the above, it is necessary to provide a power supply device with high power supply efficiency.
一种电源装置,用以对受电端供电,该电源装置包括降压电路、电源供应单元(power supply unit, PSU)、缓冲电路以及一连接至PSU以及缓冲电路的逻辑电路,所述PSU用以供应直流电至所述降压电路,该降压电路将所述直流电的电压转换成一预设的电压供应至受电端,所述缓冲电路连接至降压电路,用以防止所述降压电路处于重载供电状态下工作时受损,所述缓冲电路通过逻辑电路选择连接至降压电路,所述PSU检测降压电路是否处于重载状态,并对应降压电路处于重载状态时触发逻辑电路将缓冲电路连接至降压电路;对应降压电路处于轻载状态时,该PSU触发逻辑电路断开缓冲电路与降压电路的连接,以消除所述缓冲电路产生的损耗。 A power supply device, used to supply power to the power receiving end, the power supply device includes a step-down circuit, a power supply unit (power supply unit, PSU), a buffer circuit and a logic circuit connected to the PSU and the buffer circuit, and the PSU is used To supply direct current to the step-down circuit, the step-down circuit converts the voltage of the direct current into a preset voltage and supplies it to the power receiving terminal, and the buffer circuit is connected to the step-down circuit to prevent the step-down circuit from When it is damaged when working under the heavy-duty power supply state, the buffer circuit is selectively connected to the step-down circuit through the logic circuit, and the PSU detects whether the step-down circuit is in the heavy-load state, and triggers the logic when the step-down circuit is in the heavy-load state The circuit connects the buffer circuit to the step-down circuit; when the corresponding step-down circuit is in a light-load state, the PSU triggers the logic circuit to disconnect the connection between the buffer circuit and the step-down circuit, so as to eliminate the loss generated by the buffer circuit.
所述电源装置于所述降压电路处于重载状态而可能受损时,控制所述缓冲电路连接至降压电路,以有效保护该降压电路;而当降压电路处于轻载状态不会损坏而无需缓冲电路提供保护时,所述电源装置断开所述缓冲电路与降压电路的连接,以消除该缓冲电路产生的功率损耗,使该电源装置的供电效率更高。 When the step-down circuit is under heavy load and may be damaged, the power supply device controls the buffer circuit to be connected to the step-down circuit to effectively protect the step-down circuit; and when the step-down circuit is under light load, it will not When the buffer circuit is damaged for protection, the power supply device disconnects the buffer circuit from the step-down circuit, so as to eliminate the power loss generated by the buffer circuit, so that the power supply device has higher power supply efficiency.
附图说明 Description of drawings
图1是本发明电源装置对受电端供电的电路原理图。 Fig. 1 is a schematic circuit diagram of a power supply device of the present invention supplying power to a power receiving terminal.
主要元件符号说明 Description of main component symbols
如下具体实施方式将结合上述附图进一步说明本发明。 The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.
具体实施方式 Detailed ways
下面结合附图及较佳实施方式对本发明作进一步详细描述: Below in conjunction with accompanying drawing and preferred embodiment the present invention is described in further detail:
请参阅图1所示,本发明的电源装置100用以对伺服器系统等受电端200供电。该电源装置100包括降压电路10、电源供应单元(power supply unit, PSU)30、缓冲电路50以及逻辑电路70,所述PSU30连接至降压电路10以及逻辑电路70,所述逻辑电路70还连接至缓冲电路50,用以控制所述缓冲电路50与降压电路10之间的电性连接。所述PSU30用以提供直流电源至降压电路10,并侦测该PSU30输出至降压电路10电流值。该PSU30侦测到其输出的电流值较高时判断所述降压电路10处于重载状态,然后触发逻辑电路70将缓冲电路50连接至降压电路10,以保护该降压电路10;当该PSU30侦测到其输出的电流值较小时判断所述降压电路10处于轻载状态下而无需保护该降压电路10时,触发所述逻辑电路70断开所述缓冲电路50与降压电路10的连接,消除该缓冲电路50产生的功率损耗。 Please refer to FIG. 1 , the power supply device 100 of the present invention is used to supply power to a power receiving terminal 200 such as a server system. The power supply device 100 includes a step-down circuit 10, a power supply unit (power supply unit, PSU) 30, a buffer circuit 50 and a logic circuit 70, the PSU30 is connected to the step-down circuit 10 and the logic circuit 70, and the logic circuit 70 also Connected to the buffer circuit 50 for controlling the electrical connection between the buffer circuit 50 and the step-down circuit 10 . The PSU 30 is used to provide DC power to the step-down circuit 10 and detect the current value output from the PSU 30 to the step-down circuit 10 . When the PSU30 detects that the output current value is relatively high, it judges that the step-down circuit 10 is in a heavy load state, and then triggers the logic circuit 70 to connect the buffer circuit 50 to the step-down circuit 10 to protect the step-down circuit 10; When the PSU 30 detects that the output current value is small and judges that the step-down circuit 10 is in a light-load state and there is no need to protect the step-down circuit 10, it triggers the logic circuit 70 to disconnect the buffer circuit 50 from the step-down circuit. The connection of the circuit 10 eliminates the power loss generated by the snubber circuit 50.
所述降压电路10包括控制器11、第一开关Q1、第二开关Q2、输出电感L以及储能电容C1。 The buck circuit 10 includes a controller 11 , a first switch Q1 , a second switch Q2 , an output inductor L and an energy storage capacitor C1 .
所述控制器11连接至第一开关Q1以及第二开关Q2,用以根据该降压电路10输出至受电端200的电压值依次控制所述第一开关Q1以及第二开关Q2导通/断开。于本发明实施方式中,所述控制器11为一脉冲宽度调制芯片,并通过发送至第一开关Q1以及第二开关Q2的脉冲宽度调制信号的占空比来调节所述第一开关Q1以及第二开关Q2的导通时长,相应调节该降压电路10输出的电压值的大小。 The controller 11 is connected to the first switch Q1 and the second switch Q2, and is used to sequentially control the first switch Q1 and the second switch Q2 to turn on/off according to the voltage value output from the step-down circuit 10 to the power receiving terminal 200 disconnect. In the embodiment of the present invention, the controller 11 is a pulse width modulation chip, and adjusts the first switch Q1 and the second switch Q2 through the duty cycle of the pulse width modulation signal sent to the first switch Q1 and the second switch Q2. The conduction time of the second switch Q2 is adjusted correspondingly to the magnitude of the voltage output by the step-down circuit 10 .
所述第一开关Q1以及第二开关Q2依次串接于PSU30以及地之间,所述输出电感L以及储能电容C1相串连后,储能电容C1的另一端连接于第一开关Q1与第二开关Q2之间,输出电感L的另一端接地。所述受电端200并联至储能电容C1的相对两端。如此,当所述控制器11导通第一开关Q1、断开第二开关Q2时,PSU30端接入的电能将从第一开关Q1、输出电感L供应至受电端200以及储能电容C1,以于对受电端200供电的同时通过储能电容C1存储电能;当所述控制器11断开第一开关Q1、导通第二开关Q2时,则PSU30停止对该降压电路10供电,而由储能电容C1释放其存储的能量对受电端200供电。于本发明实施方式中,所述第一开关Q1以及第二开关Q2均为一场效应管,且所述第一开关Q1通过栅极连接至控制器11,通过漏极连接至PSU30,并通过源极连接至第二开关Q2;所述第二开关Q2通过漏极连接至第一开关Q1的源极,通过栅极连接至控制器,并通过源极接地。 The first switch Q1 and the second switch Q2 are sequentially connected in series between the PSU30 and the ground. After the output inductor L and the energy storage capacitor C1 are connected in series, the other end of the energy storage capacitor C1 is connected to the first switch Q1 and the ground. Between the second switches Q2, the other end of the output inductor L is grounded. The power receiving end 200 is connected in parallel to two opposite ends of the energy storage capacitor C1. In this way, when the controller 11 turns on the first switch Q1 and turns off the second switch Q2, the power connected to the PSU30 terminal will be supplied from the first switch Q1 and the output inductor L to the power receiving terminal 200 and the energy storage capacitor C1 , so as to store power through the energy storage capacitor C1 while supplying power to the power receiving terminal 200; when the controller 11 turns off the first switch Q1 and turns on the second switch Q2, the PSU30 stops supplying power to the step-down circuit 10 , and the stored energy is released by the energy storage capacitor C1 to supply power to the receiving terminal 200 . In the embodiment of the present invention, both the first switch Q1 and the second switch Q2 are field effect transistors, and the first switch Q1 is connected to the controller 11 through the gate, connected to the PSU30 through the drain, and connected to the PSU30 through the drain. The source is connected to the second switch Q2; the second switch Q2 is connected to the source of the first switch Q1 through the drain, connected to the controller through the gate, and grounded through the source.
所述PSU30连接至降压电路10的第一开关Q1以及逻辑电路70,用以供应直流电源至降压电路10,同时检测所述降压电路10是处于重载状态还是轻载状态。当该PSU30检测到所述降压电路10处于重载状态时,触发逻辑电路70将缓冲电路50并联至第二开关Q2;当检测到所述降压电路10处于轻载状态时,触发所述逻辑电路70断开缓冲电路50与第二开关Q2的连接。于本发明实施方式中,所述PSU30对应其输出至降压电路10的电流值设定一基准电流值,并检测该PSU30输出至降压电路10的电流值,若所输出的电流值超出预设的基准电流值,则判定所述降压电路10处于重载状态;若PSU30输出至降压电路10的电流值低于预设的基准电流值,则判定所述降压电路10处于轻载状态。于本发明实施方式中,所述PSU30通过系统控制总线(System Management Bus, Smbus)中的SDA以及SCL信号线建立与逻辑电路70的通信,从而触发所述逻辑电路70控制缓冲电路50与降压电路10的连接。 The PSU 30 is connected to the first switch Q1 of the step-down circuit 10 and the logic circuit 70 for supplying DC power to the step-down circuit 10 and detecting whether the step-down circuit 10 is in a heavy load state or a light load state. When the PSU30 detects that the step-down circuit 10 is in a heavy-load state, the trigger logic circuit 70 connects the buffer circuit 50 to the second switch Q2 in parallel; when it detects that the step-down circuit 10 is in a light-load state, triggers the The logic circuit 70 disconnects the buffer circuit 50 from the second switch Q2. In the embodiment of the present invention, the PSU30 sets a reference current value corresponding to the current value output to the step-down circuit 10, and detects the current value output by the PSU30 to the step-down circuit 10, if the output current value exceeds the predetermined If the reference current value is set, it is determined that the step-down circuit 10 is in a heavy load state; if the current value output by the PSU30 to the step-down circuit 10 is lower than the preset reference current value, it is determined that the step-down circuit 10 is in a light load state. In the embodiment of the present invention, the PSU 30 establishes communication with the logic circuit 70 through the SDA and SCL signal lines in the System Management Bus (Smbus), thereby triggering the logic circuit 70 to control the buffer circuit 50 and the step-down Circuit 10 connections.
所述缓冲电路50包括一电阻R以及一缓冲电容C2,所述电阻R以及缓冲电容C2相串联后的一端连接至第二开关Q2以及输出电感L之间,另一端通过逻辑电路70接地。如此,当所述逻辑电路70将缓冲电路50接地时,该缓冲电路50即并联至所述第二开关Q2,当所述逻辑电路70断开缓冲电路50与地的连接时,所述缓冲电路50将断开与降压电路10的电连接。 The buffer circuit 50 includes a resistor R and a buffer capacitor C2 , one end of the series connection of the resistor R and the buffer capacitor C2 is connected between the second switch Q2 and the output inductor L, and the other end is grounded through the logic circuit 70 . In this way, when the logic circuit 70 connects the buffer circuit 50 to the ground, the buffer circuit 50 is connected in parallel to the second switch Q2, and when the logic circuit 70 disconnects the buffer circuit 50 from the ground, the buffer circuit 50 will disconnect the electrical connection with the step-down circuit 10 .
所述逻辑电路70包括逻辑模块71以及逻辑开关73。所述逻辑模块71电连接至PSU30,并连接至逻辑开关73,所述逻辑开关73的一端还连接至缓冲电容C2,另一端接地。所述逻辑模块71在PSU30的触发下控制逻辑开关73的导通或者断开,相应的将所述缓冲电路50的一端接地或者断开与地的连接,对应实现将所述缓冲电路50并连接至第二开关Q2或者断开二者的连接。于本发明实施方式中,所述逻辑开关73也为一场效应管,所述逻辑模块71在PSU30的控制下发送一高电平信号至逻辑开关73而导通该逻辑开关73。 The logic circuit 70 includes a logic module 71 and a logic switch 73 . The logic module 71 is electrically connected to the PSU 30 and connected to a logic switch 73 , one end of the logic switch 73 is also connected to the buffer capacitor C2 , and the other end is grounded. The logic module 71 controls the conduction or disconnection of the logic switch 73 under the trigger of the PSU30, and correspondingly connects one end of the buffer circuit 50 to the ground or disconnects the connection with the ground, and correspondingly realizes connecting the buffer circuit 50 to the ground. to the second switch Q2 or disconnect both. In the embodiment of the present invention, the logic switch 73 is also a field effect transistor, and the logic module 71 sends a high level signal to the logic switch 73 under the control of the PSU 30 to turn on the logic switch 73 .
使用该电源装置100对受电端200供电的过程中,所述PSU30提供一直流电源至降压电路10,然后控制器11输出一具有一定占空比的脉冲宽度调制信号控制所述第一开关Q1以及第二开关Q2的导通时长,使该电源装置100保持输出一预定的电压供应至受电端200。于此过程中,所述PSU30检测其输出至降压电路10的电流,并判断输出的电流值是否超出预设的基准电流。当所述PSU30输出至降压电路10的电流超出预设的基准电流时,判定该降压电路10处于重载状态,然后触发逻辑模块71导通所述逻辑开关73,以将缓冲电路50的一端接地而并联连接至第二开关Q2上,防止第二开关Q2上的电压于断开时因PSU30供应的电压的作用突然变大而损坏该第二开关Q2。当PSU30输出至降压电路10的电流低于预设的基准电流时,则判定所述降压电路10处于轻载状态,然后触发所述逻辑模块71断开逻辑开关73,以断开缓冲电路50与第二开关Q2的连接,从而消除该缓冲电路50带来的功率损耗。 In the process of using the power supply device 100 to supply power to the power receiving terminal 200, the PSU 30 provides a DC power supply to the step-down circuit 10, and then the controller 11 outputs a pulse width modulation signal with a certain duty cycle to control the first switch The conduction duration of Q1 and the second switch Q2 enables the power supply device 100 to keep outputting a predetermined voltage to the power receiving terminal 200 . During this process, the PSU 30 detects the current output to the step-down circuit 10 , and determines whether the output current exceeds a preset reference current. When the current output by the PSU30 to the step-down circuit 10 exceeds the preset reference current, it is determined that the step-down circuit 10 is in a heavy load state, and then the logic module 71 is triggered to turn on the logic switch 73, so that the buffer circuit 50 One end is grounded and connected in parallel to the second switch Q2 to prevent the second switch Q2 from being damaged due to the sudden increase of the voltage supplied by the PSU 30 when the voltage on the second switch Q2 is turned off. When the current output by the PSU30 to the step-down circuit 10 is lower than the preset reference current, it is determined that the step-down circuit 10 is in a light-load state, and then the logic module 71 is triggered to disconnect the logic switch 73 to disconnect the buffer circuit 50 is connected to the second switch Q2, thereby eliminating the power loss caused by the snubber circuit 50.
本发明的电源装置100于所述降压电路10处于重载状态时,控制所述缓冲电路50连接至降压电路10中的第二开关Q2,以防止第二开关Q2由导通切换至断开状态的瞬间电压过大而被烧坏,有效保护该降压电路10;该降压电路10处于轻载状态时,第二开关Q2不会因为刚断开时的电压过大而受损而无需缓冲电路50提供保护时,所述电源装置100断开所述缓冲电路50与降压电路10的连接,消除该缓冲电路50产生的功率损耗,使该电源装置100的供电效率更高。 The power supply device 100 of the present invention controls the buffer circuit 50 to be connected to the second switch Q2 in the step-down circuit 10 when the step-down circuit 10 is in a heavy load state, so as to prevent the second switch Q2 from switching from on to off. The momentary voltage in the open state is too large and burns out, effectively protecting the step-down circuit 10; when the step-down circuit 10 is in a light-load state, the second switch Q2 will not be damaged due to the excessive voltage when it is just turned off. When the buffer circuit 50 is not needed to provide protection, the power supply device 100 disconnects the buffer circuit 50 from the step-down circuit 10 to eliminate the power loss generated by the buffer circuit 50 and make the power supply device 100 more efficient in power supply.
对本领域的普通技术人员来说,可以根据本发明的发明方案和发明构思结合生产的实际需要做出其他相应的改变或调整,而这些改变和调整都应属于本发明权利要求的保护范围。 For those skilled in the art, other corresponding changes or adjustments can be made according to the inventive solution and inventive concept of the present invention combined with the actual needs of production, and these changes and adjustments should all belong to the protection scope of the claims of the present invention.
Claims (7)
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CN 201210038107 Pending CN103259422A (en) | 2012-02-20 | 2012-02-20 | Power supply device |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104734503A (en) * | 2015-04-15 | 2015-06-24 | 上海斐讯数据通信技术有限公司 | Power conversion system and electronic equipment with same |
CN106953511A (en) * | 2017-04-28 | 2017-07-14 | 昆山龙腾光电有限公司 | Switching power circuit and its adjusting method |
CN109873399A (en) * | 2019-04-15 | 2019-06-11 | 苏州浪潮智能科技有限公司 | A kind of power protecting circuit and apparatus for protecting power supply |
CN112532039A (en) * | 2020-10-30 | 2021-03-19 | 苏州浪潮智能科技有限公司 | Intelligent control method and circuit for reducing electromagnetic radiation of switching power supply |
-
2012
- 2012-02-20 CN CN 201210038107 patent/CN103259422A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104734503A (en) * | 2015-04-15 | 2015-06-24 | 上海斐讯数据通信技术有限公司 | Power conversion system and electronic equipment with same |
CN104734503B (en) * | 2015-04-15 | 2018-03-06 | 上海斐讯数据通信技术有限公司 | A kind of power conversion system and the electronic equipment with this kind of power conversion system |
CN106953511A (en) * | 2017-04-28 | 2017-07-14 | 昆山龙腾光电有限公司 | Switching power circuit and its adjusting method |
CN106953511B (en) * | 2017-04-28 | 2019-06-21 | 昆山龙腾光电有限公司 | Switching power circuit and its adjusting method |
CN109873399A (en) * | 2019-04-15 | 2019-06-11 | 苏州浪潮智能科技有限公司 | A kind of power protecting circuit and apparatus for protecting power supply |
CN112532039A (en) * | 2020-10-30 | 2021-03-19 | 苏州浪潮智能科技有限公司 | Intelligent control method and circuit for reducing electromagnetic radiation of switching power supply |
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Application publication date: 20130821 |