CN103258763A - Wafer loading platform structure commonly used by wafers of different sizes - Google Patents

Wafer loading platform structure commonly used by wafers of different sizes Download PDF

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Publication number
CN103258763A
CN103258763A CN2012100346903A CN201210034690A CN103258763A CN 103258763 A CN103258763 A CN 103258763A CN 2012100346903 A CN2012100346903 A CN 2012100346903A CN 201210034690 A CN201210034690 A CN 201210034690A CN 103258763 A CN103258763 A CN 103258763A
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China
Prior art keywords
wafer
diameter
pin
wafer carrier
cylinder
Prior art date
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Pending
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CN2012100346903A
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Chinese (zh)
Inventor
凌复华
王丽丹
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Piotech Inc
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Piotech Shenyang Co Ltd
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Publication date
Application filed by Piotech Shenyang Co Ltd filed Critical Piotech Shenyang Co Ltd
Priority to CN2012100346903A priority Critical patent/CN103258763A/en
Publication of CN103258763A publication Critical patent/CN103258763A/en
Pending legal-status Critical Current

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Abstract

The invention relates to semiconductor film deposit equipment, in particular to a wafer loading platform structure commonly used by wafers of different sizes. Multiple backing pins are arranged on the wafer loading platform for confirming a position according to sizes of the wafers loaded on the platform. Two adjacent wafers are isolated by a backing pin and are not contacted. The axial section of the backing pin is T-shaped and composed of two pillars with different diameters. The pillar with a smaller diameter is inserted in the wafer loading platform. The pillar with a larger diameter is arranged on the upper surface of the wafer loading platform. The bottom face of the pillar with the larger diameter is contacted with the upper surface of the wafer loading platform. Two adjacent wafers are contacted with the rim of the pillar with the larger diameter. By inserting the backing pins in different pin holes and changing arrangement positions of the backing pins, the wafer loading platform can be commonly used by the wafers of different sizes and equipment cost is saved.

Description

The wafer carrier structure that a kind of many sizes wafer shares
Technical field
The present invention relates to the semiconductor film film deposition apparatus, the wafer carrier structure that specifically a kind of many sizes wafer shares.
Background technology
The principle of film deposition techniques is that wafer is placed vacuum environment, feeds an amount of reacting gas, utilizes physical change and the chemical reaction of gas, forms solid film at crystal column surface.
The Chinese patent relevant with wafer carrier, as openly day is on August 25th, 2010, publication number is the Chinese patent of CN201562672U, open day is on June 25th, 2003, publication number is the Chinese patent of CN2558077Y, open day is on April 28th, 1999, publication number is the Chinese patent of CN1215226A, open day is on January 6th, 2010, publication number is CN101621020A, open day is on September 16th, 2009, publication number is the Chinese patent of CN201311921Y etc., exist following weak point: be the single-wafer microscope carrier, be applicable to the batch process of large scale wafer, but be not suitable for batch process and the scientific research type equipment of small size wafer.
At present, the small size batch wafer is produced, and adopts wafer carrier as shown in Figure 1, processes several and the placement groove that the small size wafer mates in wafer carrier 1, and the small size wafer is placed in the groove respectively.No matter be large scale wafer or small size wafer, its wafer carrier can only be carried the wafer of single size, in case wafer size changes, wafer carrier just can't be used, and bad adaptability has strengthened cost.
Summary of the invention
In order to solve the problem that existing wafer carrier can't adapt to the different size wafer, the wafer carrier structure that the object of the present invention is to provide a kind of many sizes wafer to share.This wafer carrier structure can realize that the wafer of multiple size shares a wafer carrier.
The objective of the invention is to be achieved through the following technical solutions:
The wafer carrier that the present invention is used for the carrying wafer is provided with the backing pin that a plurality of sizes according to the carrying wafer are determined the position, separates, does not contact mutually by described backing pin between the two-phase vincial faces circle.
Wherein: the axial cross section of described backing pin is T-shape, formed by two cylinders that diameter does not wait, wherein the cylinder that diameter is little is plugged on the described wafer carrier, the cylinder that diameter is big is positioned on the described wafer carrier upper surface, the bottom surface of the cylinder that described diameter is big contacts with described wafer carrier upper surface, and the side edge of the cylinder that two-phase vincial faces circle and described diameter are big is touched; Described wafer carrier is provided with a plurality of pin-and-holes, and the cylinder that described diameter is little inserts in this pin-and-hole; It is matched in clearance between the cylinder that described diameter is little and the pin-and-hole; The diameter of the cylinder that described diameter is big is greater than the aperture of described pin-and-hole, and the diameter of the cylinder that this diameter is big is determined according to wafer size, guarantees not contact mutually between the two-phase vincial faces circle; Described backing pin inserts in the different pin-and-holes according to different wafer sizes; The week of each wafer upwards is provided with three backing pins at least.
Advantage of the present invention and good effect are:
1. the present invention inserts in the different pin-and-holes by backing pin, changes the putting position of backing pin, can make the wafer of multiple size share a wafer carrier, saves equipment cost.
2. the present invention can make wafer keep static in technical process, does not slide.
3. the present invention can rationally place a plurality of wafers, the output of bonding batch technology.
4. the present invention is simple in structure, and is convenient for installation and maintenance.
Description of drawings
Fig. 1 is the wafer carrier structural representation of existing processing small size wafer;
Fig. 2 processes the vertical view of small size wafer for the present invention;
Fig. 3 is the A-A cutaway view of Fig. 2;
Fig. 4 is the partial enlarged drawing at I place among Fig. 3;
Fig. 5 is the vertical view of the machining large-sized wafer of the present invention;
Fig. 6 is the profile of film deposition equipment;
Wherein: 1 is wafer carrier, and 2 is backing pin, and 3 is the small size wafer, and 4 is backing pin, and 5 is the large scale wafer, and 6 is heating plate, and 7 is spray structure, and 8 is processing chamber.
Embodiment
The invention will be further described below in conjunction with accompanying drawing.
The wafer carrier that wafer is carried in the present invention is provided with the backing pin that a plurality of sizes according to the carrying wafer are determined the position, separates, does not contact mutually by described backing pin between the two-phase vincial faces circle.Shown in Fig. 2~4, wafer carrier 1 is provided with a plurality of pin-and-holes, and backing pin 2 inserts in the different pin-and-holes according to the size of small size wafer 3; The axial cross section of backing pin 2 is T-shape, is made up of two cylinders that diameter does not wait, and wherein the cylinder that diameter is little is plugged in the pin-and-hole on the described wafer carrier 1, and the cylinder that diameter is big is positioned on the upper surface of described wafer carrier 1; The bottom surface of the cylinder that described diameter is big contacts with described wafer carrier upper surface, and the side edge of the cylinder that two adjacent small size wafers 3 and described diameter are big is touched.Be matched in clearance between the cylinder that described diameter is little and the pin-and-hole, namely the diameter of the cylinder that diameter is little is slightly less than the pin-and-hole aperture of wafer carrier 1; The diameter of the cylinder that diameter is big is greater than the aperture of described pin-and-hole, and the diameter of the cylinder that this diameter is big determines according to the size of small size wafer 3, can guarantee that two adjacent small size wafers 3 do not contact mutually to get final product; Among Fig. 2, upwards be provided with three backing pins 2 (the backing pin quantity that each wafer week makes progress can increase as required) week of each small size wafer 3, guarantee not contact mutually between the two adjacent small size wafers 3.During use, according to the size of actual small size wafer 3, a plurality of backing pins 2 are inserted in the part pin-and-hole of wafer carrier 1, so that two adjacent small size wafers 3 do not contact mutually.
The diameter of the cylinder that diameter is big in the backing pin can change according to wafer size, as shown in Figure 5, carried big wafer 5 on the wafer carrier 1, the diameter of the cylinder that diameter is big in the backing pin 4 is correspondingly adjusted, guaranteeing that adjacent large scale wafer 5 does not contact mutually on two, and the quantity of the backing pin of using 4 has been lacked some when also carrying small size wafer 3.
Operation principle of the present invention is:
As shown in Figure 6, wafer carrier 1 is circular slab, and diameter is slightly less than the diameter of processing chamber 8, and is close with the diameter of heating plate 6 in the processing chamber 8.Before carrying out technology, according to the size of wafer, determine to use which pin-and-hole on the wafer carrier 1; Then a plurality of backing pins are put into selected pin-and-hole; A plurality of wafers are placed on the wafer carrier 1, each wafer is separated by backing pin again.The wafer carrier 1 of having put wafer is put on the heating plate 6 of processing chamber 8, sprayed to crystal column surface by spray structure 7, carry out depositing operation.

Claims (7)

1. the wafer carrier structure that shares of size wafer more than a kind, it is characterized in that: the wafer carrier of carrying wafer is provided with the backing pin that a plurality of sizes according to the carrying wafer are determined the position, and the two-phase vincial faces separates, do not contact mutually by described backing pin between justifying.
2. by the shared wafer carrier structure of the described many sizes wafer of claim 1, it is characterized in that: the axial cross section of described backing pin is T-shape, formed by two cylinders that diameter does not wait, wherein the cylinder that diameter is little is plugged on the described wafer carrier, the cylinder that diameter is big is positioned on the described wafer carrier upper surface, the bottom surface of the cylinder that described diameter is big contacts with described wafer carrier upper surface, and the side edge of the cylinder that two-phase vincial faces circle and described diameter are big is touched.
3. by the shared wafer carrier structure of the described many sizes wafer of claim 2, it is characterized in that: described wafer carrier is provided with a plurality of pin-and-holes, and the cylinder that described diameter is little inserts in this pin-and-hole.
4. the wafer carrier structure that shares by the described many sizes wafer of claim 3 is characterized in that: be matched in clearance between the cylinder that described diameter is little and the pin-and-hole.
5. by the shared wafer carrier structure of the described many sizes wafer of claim 3, it is characterized in that: the diameter of the cylinder that described diameter is big is greater than the aperture of described pin-and-hole, the diameter of the cylinder that this diameter is big is determined according to wafer size, guarantees not contact mutually between the two-phase vincial faces circle.
6. by the shared wafer carrier structure of the described many sizes wafer of claim 3, it is characterized in that: described backing pin inserts in the different pin-and-holes according to different wafer sizes.
7. by the shared wafer carrier structure of the described many sizes wafer of claim 1, it is characterized in that: the week of each wafer upwards is provided with three backing pins at least.
CN2012100346903A 2012-02-15 2012-02-15 Wafer loading platform structure commonly used by wafers of different sizes Pending CN103258763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012100346903A CN103258763A (en) 2012-02-15 2012-02-15 Wafer loading platform structure commonly used by wafers of different sizes

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Application Number Priority Date Filing Date Title
CN2012100346903A CN103258763A (en) 2012-02-15 2012-02-15 Wafer loading platform structure commonly used by wafers of different sizes

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CN103258763A true CN103258763A (en) 2013-08-21

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752285A (en) * 2015-03-31 2015-07-01 中国科学院上海技术物理研究所 Inserting-plate-type quartz boat used for high-temperature annealing of chips
CN105648509A (en) * 2014-11-12 2016-06-08 中国科学院苏州纳米技术与纳米仿生研究所 Electroplating clamp compatible with single wafers of multiple sizes
DE102016115614A1 (en) * 2016-08-23 2018-03-01 Aixtron Se Susceptor for a CVD reactor
USD854506S1 (en) 2018-03-26 2019-07-23 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD858469S1 (en) 2018-03-26 2019-09-03 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD860146S1 (en) 2017-11-30 2019-09-17 Veeco Instruments Inc. Wafer carrier with a 33-pocket configuration
USD860147S1 (en) 2018-03-26 2019-09-17 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD863239S1 (en) 2018-03-26 2019-10-15 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD866491S1 (en) 2018-03-26 2019-11-12 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004231999A (en) * 2003-01-28 2004-08-19 Kyocera Corp Continuous diode parallel flat plate type plasma-enhanced cvd system
CN101681871A (en) * 2007-05-23 2010-03-24 艾克斯特朗股份公司 Device for coating a plurality of closest-packed substrates arranged on a susceptor
JP2010192720A (en) * 2009-02-19 2010-09-02 Hitachi Cable Ltd Semiconductor vapor-phase epitaxial device
JP2010272550A (en) * 2009-05-19 2010-12-02 Sumitomo Electric Ind Ltd Susceptor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004231999A (en) * 2003-01-28 2004-08-19 Kyocera Corp Continuous diode parallel flat plate type plasma-enhanced cvd system
CN101681871A (en) * 2007-05-23 2010-03-24 艾克斯特朗股份公司 Device for coating a plurality of closest-packed substrates arranged on a susceptor
JP2010192720A (en) * 2009-02-19 2010-09-02 Hitachi Cable Ltd Semiconductor vapor-phase epitaxial device
JP2010272550A (en) * 2009-05-19 2010-12-02 Sumitomo Electric Ind Ltd Susceptor

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105648509B (en) * 2014-11-12 2019-02-01 中国科学院苏州纳米技术与纳米仿生研究所 More size compatibility single-wafer electroplating clamps
CN105648509A (en) * 2014-11-12 2016-06-08 中国科学院苏州纳米技术与纳米仿生研究所 Electroplating clamp compatible with single wafers of multiple sizes
CN104752285B (en) * 2015-03-31 2017-08-25 中国科学院上海技术物理研究所 A kind of board plug type quartz boat for chip high annealing
CN104752285A (en) * 2015-03-31 2015-07-01 中国科学院上海技术物理研究所 Inserting-plate-type quartz boat used for high-temperature annealing of chips
KR20190042645A (en) * 2016-08-23 2019-04-24 아익스트론 에스이 Susceptors for CVD Reactors
WO2018037014A1 (en) 2016-08-23 2018-03-01 Aixtron Se Susceptor for a chemical vapour deposition reactor
DE102016115614A1 (en) * 2016-08-23 2018-03-01 Aixtron Se Susceptor for a CVD reactor
US11168410B2 (en) 2016-08-23 2021-11-09 Aixtron Se Susceptor for a chemical vapour deposition reactor
KR102378469B1 (en) 2016-08-23 2022-03-23 아익스트론 에스이 Susceptors for CVD Reactors
USD860146S1 (en) 2017-11-30 2019-09-17 Veeco Instruments Inc. Wafer carrier with a 33-pocket configuration
USD854506S1 (en) 2018-03-26 2019-07-23 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD858469S1 (en) 2018-03-26 2019-09-03 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD860147S1 (en) 2018-03-26 2019-09-17 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD863239S1 (en) 2018-03-26 2019-10-15 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover
USD866491S1 (en) 2018-03-26 2019-11-12 Veeco Instruments Inc. Chemical vapor deposition wafer carrier with thermal cover

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Application publication date: 20130821