CN103249559B - Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device - Google Patents

Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device Download PDF

Info

Publication number
CN103249559B
CN103249559B CN201180055158.3A CN201180055158A CN103249559B CN 103249559 B CN103249559 B CN 103249559B CN 201180055158 A CN201180055158 A CN 201180055158A CN 103249559 B CN103249559 B CN 103249559B
Authority
CN
China
Prior art keywords
resin composition
film resin
semiconductor
substrate
projection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201180055158.3A
Other languages
Chinese (zh)
Other versions
CN103249559A (en
Inventor
榎本哲也
永井朗
宫泽笑
本田一尊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Publication of CN103249559A publication Critical patent/CN103249559A/en
Application granted granted Critical
Publication of CN103249559B publication Critical patent/CN103249559B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/18Layered products comprising a layer of synthetic resin characterised by the use of special additives
    • B32B27/20Layered products comprising a layer of synthetic resin characterised by the use of special additives using fillers, pigments, thixotroping agents
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10Inorganic particles
    • B32B2264/105Metal
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/14Semiconductor wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • H01L2224/29082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Laminated Bodies (AREA)

Abstract

A kind of encapsulating semiconductor is filled and is used film resin composition, it has the 1st layer that is made up of the 1st resin combination containing thermosetting resin and filler and the 2nd layer that is made up of the 2nd resin combination containing flux, the filler in the 2nd resin combination relative to the 2nd resin combination total amount quality ratio and the filler in the 1st resin combination relative to the 1st resin combination total amount quality ratio compared with less.

Description

Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device
Technical field
The present invention relates to encapsulating semiconductor filling film resin composition, the manufacture method of semiconductor device and semiconductor device.
Background technology
In recent years, along with the miniaturization of electronic equipment, the progress of high performance, to semiconductor device require the raising of miniaturized, slimming and electrical characteristics (to high-frequency transmit should equity).Be accompanied by this, start from before semiconductor chip is mounted to mode substrate by wire-bonded and changes with the flip-chip connected mode that electrode of substrate is directly connected to forming the electric conductivity projected electrode that is called as projection on a semiconductor die.
As the projection formed on a semiconductor die, use the projection be made up of solder, gold, but in order to tackle fine connectionization in recent years, bring into use the projection being formed with solder layer or tin layers structure in the front end of copper post.
In addition, in order to high reliability, require to be connected by metal bond, not only there are the solder bonds using solder projection, the metal bond utilizing the projection being formed with solder layer or tin layers structure in the front end of copper post to carry out, when using golden projection, additionally use and form solder layer, tin layers in electrode of substrate side, carry out the method for attachment of metal bond.
Further, in flip-chip connected mode, the thermal stress likely coming from the coefficient of thermal expansion differences of semiconductor chip and substrate concentrates on connecting portion and destroys the situation of connecting portion, therefore in order to disperse this thermal stress to improve connection reliability, need the space resin seal between semiconductor chip and substrate to fill.Usually utilize the sealing of resin to fill and adopt following mode: after connecting semiconductor chip and substrate with solder etc., utilize capillarity to inject aqueous sealing resin in space.
When connecting chip and substrate, in order to reduce surface such as removing solder etc. oxide-film and easily carry out metal bond, use the flux formed by rosin, organic acid etc.Here, if the residue of flux remains, then become the reason producing and be called as the bubble of hole when injecting fluid resin, or the corrosion of distribution occurs due to sour composition, connection reliability reduces, and the operation of therefore cleaning residue is necessary.But in recent years, along with the thin space connecting spacing, the space between semiconductor chip and substrate narrows, therefore, the situation being difficult to clean flux residue is had.Further, exist to inject fluid resin in the narrow gap between semiconductor chip and substrate, need for a long time, productivity reduces such problem.
In order to solve the problem of this aqueous sealing resin, propose the method for attachment being called as first supply mode, it is: the sealing resin using the character (flux is active) of the oxide-film with surfaces such as reduction removing solders, sealing resin is supplied to after on substrate, while connection semiconductor chip and substrate, with the space between resin seal filling semiconductor chip and substrate, the cleaning (such as with reference to patent document 1 ~ 5) of flux residue can be omitted.
Prior art document
Patent document
Patent document 1: Japanese Unexamined Patent Publication 2006-143795 publication
Patent document 2: Japanese Unexamined Patent Publication 2007-107006 publication
Patent document 3: Japanese Unexamined Patent Publication 2008-294382 publication
Patent document 4: Japanese Unexamined Patent Publication 2009-239138 publication
Patent document 5: Japanese Unexamined Patent Publication 2005-28734 publication
Summary of the invention
The problem that invention will solve
But, in former first supply mode, there are the following problems: sandwich to produce between projection and electrode of substrate be called as the bad connection of subsideing (trapping) to reduce the thermal coefficient of expansion of sealing resin and the filler that coordinates, produce conduction bad, or with the filler sandwiched for starting point and crack on projection, electrode of substrate and make connection reliability reduce.
The object of the present invention is to provide a kind of encapsulating semiconductor filling film resin composition and use the semiconductor device of this encapsulating semiconductor filling film resin composition and the manufacture method of this semiconductor device, when this encapsulating semiconductor filling film resin composition being used as the sealing resin that first supply mode uses, the generation of subsideing can be suppressed fully, the semiconductor device with satisfactory electrical conductivity and connection reliability can be obtained.
The method of dealing with problems
The invention provides a kind of encapsulating semiconductor filling film resin composition, it has the 1st layer that is made up of the 1st resin combination containing thermosetting resin and filler and the 2nd layer that is made up of the 2nd resin combination containing flux, the filler in above-mentioned 2nd resin combination relative to above-mentioned 2nd resin combination total amount quality ratio and the filler in above-mentioned 1st resin combination relative to above-mentioned 1st resin combination total amount quality ratio compared with less.
According to the present invention, can prevent filler from sandwiching between projection and electrode of substrate, good connecting portion can be formed.That is, according to encapsulating semiconductor filling film resin composition of the present invention, the generation of subsideing can be suppressed fully in first supply mode, thus the semiconductor device with satisfactory electrical conductivity and connection reliability can be obtained.
In addition, according to encapsulating semiconductor filling film resin composition of the present invention, make the 1st resin composition by heating pressurization when connecting semiconductor chip and substrate, the 1st resin combination after solidification strengthens the connecting portion of projection and electrode of substrate.Thus, connecting in the cooling procedure after terminating, can suppress to result from the thermal stress of the coefficient of thermal expansion differences of semiconductor chip and substrate to concentrate on connecting portion fully and the bad connection such as crack.That is, according to this encapsulating semiconductor filling film resin composition, the semiconductor device that connection reliability is more excellent can be obtained.
Encapsulating semiconductor filling film resin composition of the present invention, preferably makes above-mentioned 2nd resin combination further containing thermoplastic resin.
Such encapsulating semiconductor filling film resin composition, the surface adhesion force step-down of the 2nd layer that is made up of the 2nd resin combination.Therefore, such as, in method for making semiconductor described later, there is the effect preventing the cutting swarf produced when the semiconductor wafer monolithic being pasted with encapsulating semiconductor filling film resin composition is turned to semiconductor chip to be attached to the surface of the 2nd layer.
The present invention also provides a kind of manufacture method of semiconductor device, it is the manufacture method of the semiconductor device possessing semiconductor chip and substrate, this semiconductor chip has the projection forming surface being formed with multiple projection, this substrate has the electrode surface being provided with multiple electrode, the manufacture method of this semiconductor device has following operation: the 1st operation, is pasted onto on the above-mentioned electrode surface of aforesaid substrate according to the mode above-mentioned 2nd layer being configured in aforesaid substrate side relative to above-mentioned 1st layer by the encapsulating semiconductor filling film resin composition of the invention described above; And the 2nd operation, across above-mentioned encapsulating semiconductor filling film resin composition, configure substrate through above-mentioned 1st operation and above-mentioned semiconductor chip according to the mode that above-mentioned electrode surface is relative with above-mentioned projection forming surface, carry out heating pressurization and the projection of the electrode of aforesaid substrate and above-mentioned semiconductor chip is electrically connected; There is tin or solder in the surface of at least one party in the above-mentioned electrode connected by above-mentioned 2nd operation and above-mentioned projection.By configuring film resin composition of the present invention at substrate surface like this, the projection of semiconductor chip and the electrode of substrate contact in less the 2nd layer of the quality ratio of filler, sandwiching of filler can be suppressed, simultaneously by the flux in the 2nd layer, the oxide-film of projection front end is reduced removing, makes the metal bond of itself and electrode of substrate become easy.
The present invention also provides a kind of manufacture method of semiconductor device, it is the manufacture method of the semiconductor device possessing semiconductor chip and substrate, this semiconductor chip has the projection forming surface being formed with multiple projection, this substrate has the electrode surface being provided with multiple electrode, the manufacture method of this semiconductor device has following operation: the 1st operation, in this projection forming surface of semiconductor wafer with the projection forming surface being formed with multiple projection, the encapsulating semiconductor filling film resin composition of the invention described above is pasted according to the mode relative to above-mentioned 2nd layer, above-mentioned 1st layer being configured in above-mentioned semiconductor wafer side, 2nd operation, carries out singualtion to the above-mentioned semiconductor wafer through above-mentioned 1st operation, obtains the semiconductor chip being pasted with above-mentioned encapsulating semiconductor filling film resin composition, and the 3rd operation, across above-mentioned encapsulating semiconductor filling film resin composition, configure the above-mentioned semiconductor chip and aforesaid substrate that are obtained by above-mentioned 2nd operation according to the mode that above-mentioned projection forming surface is relative with above-mentioned electrode surface, carry out heating pressurization and make the projection of above-mentioned semiconductor chip and the electrode electrical connection of aforesaid substrate, there is tin or solder in the surface of at least one party in the above-mentioned electrode connected by above-mentioned 3rd operation and above-mentioned projection.By configuring film resin composition of the present invention like this in semiconductor chip surface, the projection of semiconductor chip and the electrode of substrate contact in less the 2nd layer of the quality ratio of filler, sandwiching of filler can be suppressed, simultaneously by the flux in the 2nd layer, the oxide-film of projection front end is reduced removing, makes the metal bond of itself and electrode of substrate become easy.
According to the manufacture method of semiconductor device of the present invention, owing to employing the encapsulating semiconductor filling film resin composition of the invention described above, therefore can suppress the generation of subsideing fully, thus the semiconductor device with satisfactory electrical conductivity and connection reliability can be manufactured.
The present invention further provides the semiconductor device manufactured by the manufacture method of the semiconductor device of the invention described above.Such semiconductor device owing to having utilized the encapsulating semiconductor filling film resin composition of the invention described above to carry out, fill by sealing, therefore the bad connection caused due to the generation of subsideing, the generation of crackle are inhibited, thus have good electric conductivity and connection reliability.
The effect of invention
According to the present invention, a kind of encapsulating semiconductor filling film resin composition can be provided and use the semiconductor device of this encapsulating semiconductor filling film resin composition and the manufacture method of this semiconductor device, when this encapsulating semiconductor filling film resin composition being used as the sealing resin that first supply mode uses, the generation of subsideing can be suppressed fully, the semiconductor device with satisfactory electrical conductivity and connection reliability can be obtained.
Accompanying drawing explanation
Fig. 1 is the constructed profile of the embodiment representing semiconductor device of the present invention.
Fig. 2 is the observation image obtained by the porosity status of the semiconductor device of ultrasonic flaw detecting device observation embodiment 3.
Fig. 3 is that the section of the connecting portion of the semiconductor device of embodiment 3 observes photo.
Fig. 4 is that the section of the connecting portion of the semiconductor device of embodiment 6 observes photo.
Fig. 5 is that the section of the connecting portion of the semiconductor device of comparative example 1 observes photo.
Fig. 6 is that the section of the connecting portion of the semiconductor device of comparative example 2 observes photo.
Fig. 7 is the observation image obtained by the porosity status of the semiconductor device of ultrasonic flaw detecting device observation and comparison example 3.
Fig. 8 is pasted with the projection forming surface of the semiconductor wafer of the encapsulating semiconductor filling film resin composition of embodiment 8 and the observation photo obtained with sem observation.
Fig. 9 observes the projection forming surface being pasted with the semiconductor wafer of the encapsulating semiconductor filling film resin composition of embodiment 8 and the observation photo obtained with the camera of flip-chip bond machine.
Figure 10 is that the section of the connecting portion of the semiconductor device of embodiment 8 observes photo.
Figure 11 observes the projection forming surface being pasted with the semiconductor wafer of the film resin composition of comparative example 4 and the observation photo obtained with the camera of flip-chip bond machine.
Detailed description of the invention
Below the preferred embodiment of the present invention is described.
The encapsulating semiconductor filling film resin composition of present embodiment has by the 1st layer that forms containing Packed 1st resin combination and the 2nd layer that is made up of the 2nd resin combination containing flux, the filler in the 2nd resin combination relative to the 2nd resin combination total amount quality ratio and the filler in the 1st resin combination relative to the 1st resin combination total amount quality ratio compared with less.
Here, the 2nd resin combination also can not contain filler containing filler.That is, " filler in the 2nd resin combination is relative to the quality ratio of the 2nd resin combination total amount " can be 0 quality %.
Encapsulating semiconductor is according to the present embodiment filled and is used film resin composition, and in first supply mode, the generation of subsideing can be adequately suppressed.Therefore, by using the encapsulating semiconductor filling film resin composition of present embodiment, the semiconductor device with satisfactory electrical conductivity and connection reliability can be obtained.
(the 1st layer)
1st layer is by the layer formed containing Packed 1st resin combination.
As filler, preferably use inorganic filler.When using inorganic filler, the thermal coefficient of expansion of the 1st resin combination (or its solidfied material) reduces further, therefore utilizes encapsulating semiconductor filling film resin composition and to have carried out sealing the connection reliability of the semiconductor device of filling better.
As inorganic filler, glass, silica (silica), aluminium oxide (alumina), titanium oxide (titania), magnesia (magnesia), carbon black, mica, barium sulfate etc. can be enumerated.These materials can be used alone or two or more is used in combination.
In addition, as inorganic filler, also the composite oxides (be not the material simply mixed by metal oxide of more than two kinds, but metal oxide carries out chemical bond each other and becomes the material of indissociable state) comprising two or more metal can be used.As such inorganic filler, include, for example the composite oxides of at least 2 kinds of elements selected in the group comprising and be made up of silicon, titanium, aluminium, boron and magnesium.More particularly, include, for example the composite oxides of silica and titanium oxide, the composite oxides be made up of silica and aluminium oxide, the composite oxides be made up of boron oxide and aluminium oxide, the composite oxides etc. that are made up of silica and aluminium oxide and magnesia.These composite oxides can be used alone or two or more is used in combination, also can be used in combination with above-mentioned inorganic filler.
In addition, in the present embodiment, for the purpose of hole inhibition, stress relax, also hole inorganic filler can be combined and organic filler uses as filler.
As organic filler, include, for example the filler be made up of resinous principles such as acrylic resin, organic siliconresin, butadiene rubber, polyester, polyurethane, polyvinyl butyral resin, polyarylate, polymethyl methacrylate, acrylic rubber, polystyrene, NBR, SBR, organic-silicon-modified resins.
As organic filler, preferably comprise organic fine particles that molecular weight is the resin of more than 1,000,000 or there is the organic fine particles of three-dimensional crosslinking structure.The dispersiveness of such organic fine particles in resin combination is high.In addition, comprise the film resin composition of such organic fine particles cementability and solidification after stress retentivity more excellent.In addition, here so-called " there is three-dimensional crosslinking structure ", represent that the polymer chain of the resin forming organic fine particles has three dimensional network structure, there is the resin of this structure, such as, obtain by the polymeric devices with multiple reflecting point is had the crosslinking agent process of more than 2 functional groups that can be combined with this reflecting point.Comprising organic fine particles that molecular weight is the resin of more than 1,000,000 and have the organic fine particles dissolubility in a solvent of three-dimensional crosslinking structure all low, is preferred from this point.The organic fine particles that these dissolubilities are in a solvent low can obtain above-mentioned effect more significantly.From the viewpoint of obtaining above-mentioned effect more significantly, the organic fine particles that above-mentioned organic fine particles is preferably made up of (methyl) alkyl acrylate-Organosiliconcopolymere, organosilicon-(methyl) acrylic copolymer or their compound.
As organic filler, also can use and there is coreshell type structure and form different organic fine particles in stratum nucleare and shell.As hud typed organic fine particles, specifically, can enumerate and the grafting particle of acrylic resin, be core with butadiene rubber and the particle etc. of grafting acrylic resin, styrene resin with organosilicon-acrylic rubber for core.
When using the organic fine particles that comprises organic fine particles that molecular weight is the resin of more than 1,000,000 or have a three-dimensional crosslinking structure as organic filler; because dissolubility is in organic solvent low, therefore can easily under the state maintaining shape of particle, it be made to be included in film resin composition.Thus, organic fine particles can be made in film resin composition to be dispersed into island, the intensity of the film resin composition after solidification can be improved further.
The shape of filler has no particular limits, and can enumerate broken shape, needle-like, flakey, spherical etc.Wherein the shape of filler is preferably spherical.Due to the favorable dispersibility of spherical filler in resin combination, therefore can prevent filler from concentrating on the privileged site of resin combination and being easily sandwiched between projection and electrode of substrate, the semiconductor device that connection reliability is more excellent can be obtained.In addition, if filler is spherical, then there is the tendency easily controlling resin combination viscosity.In addition, so-called spherical there is no need must be spheroid here, as long as roughly spherical.
Semiconductor chip when if the size of filler connects than flip-chip and the space between substrate less.From the viewpoint of improving, packed density, the easily viscosity of control resin combination are such, and the average grain diameter of filler is preferably less than 10 μm, is more preferably less than 5 μm, more preferably less than 3 μm.In addition, the lower limit of the average grain diameter of filler has no particular limits, and such as, average grain diameter can be used to be the filler of more than 0.01 μm.In addition, from the view point of the effect (good electric conductivity and connection reliability) of encapsulating semiconductor filling film resin composition obtaining present embodiment further significantly, the average grain diameter of filler can be set to 0.05 ~ 0.9 μm, also can be set to 0.1 ~ 0.8 μm.
In addition, so-called average grain diameter here, by make use of the particle size distribution device of laser diffractometry, obtains as meso-position radius.So-called meso-position radius, the cumulative percentage representing in the size distribution of number benchmark is the value of the particle diameter (D50) of 50%.
Filler in 1st resin combination is relative to the quality ratio of the 1st resin combination total amount, reduce further from the viewpoint of making the thermal coefficient of expansion of the 1st resin combination (or its solidfied material), be preferably more than 20 quality %, improve further from the viewpoint of making the mechanical strength of the 1st resin combination (or its solidfied material), be more preferably more than 30 quality %, from the viewpoint of making the water absorption rate of the 1st resin combination (or its solidfied material) reduce further, more preferably more than 40 quality %.
Filler in 1st resin combination has no particular limits relative to the higher limit of the quality ratio of the 1st resin combination total amount, such as, can be set to below 70 quality %, also can be set to below 60 quality %.When more than 70 quality %, the 1st resin combination becomes fragile, and has the situation that operability reduces.
When also with organic filler and inorganic filler, the quality ratio of organic filler is preferably 1 ~ 10 quality % relative to the 1st resin combination total amount.When being more than 1 quality %, the hole inhibition that organic filler brings, stress alleviation effects can significantly obtain, when being below 10 quality %, the thickening of resin combination can be suppressed, reduce the concavo-convex of film resin composition surface, suppress the generation of hole further, cementability improves further.
1st resin combination is preferably containing thermosetting resin.
Thus, make the 1st resin composition by heating pressurization when connecting semiconductor chip and substrate, the 1st resin combination after solidification can strengthen the connecting portion of projection and electrode of substrate.Therefore, connecting in the cooling procedure after terminating, fully can suppress to result from the thermal stress of the coefficient of thermal expansion differences of semiconductor chip and substrate to concentrate on connecting portion and the bad connection such as crack.That is, by making the 1st resin combination contain thermosetting resin, the connection reliability of the semiconductor device obtained is more excellent.
As thermosetting resin, phenolic resins, cyanate ester resin, benzocyclobutane olefine resin, acrylate, methacrylate resin, epoxy resin etc. can be enumerated.Well consider from excellent heat resistance and operability, the 1st resin combination preferably contains epoxy resin as thermosetting resin.
As epoxy resin, such as, can use 2 officials can above epoxy resin (having the epoxy resin of more than 2 epoxy radicals in molecule).As such epoxy resin, such as bisphenol A type epoxy resin can be used, bisphenol f type epoxy resin, bisphenol-s epoxy resin, phenol novolak type epoxy resin, cresol novolak type epoxy resin, biphenyl type epoxy resin, hydroquinone type epoxy resin, containing the epoxy resin of diphenyl sulfide skeleton, phenol aralkyl type polyfunctional epoxy resin, containing the polyfunctional epoxy resin of naphthalene skeleton, containing the polyfunctional epoxy resin of dicyclopentadiene skeleton, containing the polyfunctional epoxy resin of triphenyl methane skeleton, aminobenzene phenol-type epoxy resin, diaminodiphenyl-methane type epoxy resin, other various polyfunctional epoxy resins etc.
In these epoxy resin, from easily can realizing the lowering viscousity of resin combination, the water absorption rate of resin combination (or its solidfied material) reduces thus is difficult to the viewpoints such as generation causes change in size etc., the heat resistance of resin combination (or its solidfied material) improves further further and consider, preferably uses bisphenol A type epoxy resin, bisphenol f type epoxy resin, the polyfunctional epoxy resin containing naphthalene skeleton, the polyfunctional epoxy resin containing dicyclopentadiene skeleton, polyfunctional epoxy resin etc. containing triphenyl methane skeleton.
As the proterties of epoxy resin, be that all it doesn't matter for liquid or solid at 25 DEG C.In addition, these epoxy resin can be used alone or mix two or more to use.
1st resin combination also can contain curing agent further.Curing agent suitably can be selected according to the kind of thermosetting resin.Such as, when the 1st resin combination contains epoxy resin as thermosetting resin, imidazoles, anhydrides, amine, phenols, hydrazides class, polymercaptan class, lewis acid-amine complex etc. can be used as curing agent.In these curing agent, from can easily realize the lowering viscousity of resin combination, excellent storage stability, resin combination the heat resistance of solidfied material the viewpoint such as to improve further and consider, preferably use imidazoles, anhydrides, amine, phenols.In addition, as curing agent, the polymer substance etc. preferably by polyurethane series, Polyester is coated to and carries out the material of microencapsulation gained, because the up time extends.
As above-mentioned imidazoles, glyoxal ethyline can be enumerated, 2-undecyl imidazole, 2-phenylimidazole, 2-ethyl-4-methylimidazole, 2-phenyl-4-methylimidazole, 1 benzyl 2 methyl imidazole, 1-benzyl-2-phenylimidazole, 1-1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-undecyl imidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-undecyl imidazole trimellitate, 1-cyanoethyl-2-phenylimidazole trimellitate, 2,4-diaminourea-6-[2 '-methylimidazolyl-(1 ')]-ethyl-s-triazine, 2,4-diaminourea-6-[2 '-undecyl imidazole base-(1 ')]-ethyl-s-triazine, 2,4-diaminourea-6-[2 '-ethyl-4 '-methylimidazolyl-(1 ')]-ethyl-s-triazine, 2,4-diaminourea-6-[2 '-methylimidazolyl-(1 ')]-ethyl-s-triazine isocyanuric acid adduct, 2,4-diaminourea-6-[2 '-methylimidazolyl-(1 ')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-bishydroxymethyl imidazoles, 2-phenyl-4-methyl-5-hydroxymethylimidazole etc.In addition, also can be used in addition in these imidazoles and have the compound of epoxy resin.
As these imidazoles, such as, 2MZ, C11Z, 2PZ, 2E4MZ, 2P4MZ, 1B2MZ, 1B2PZ, 2MZ-CN, 2E4MZ-CN, 2PZ-CN, C11Z-CN, 2PZ-CNS, C11Z-CNS, 2MZ-A, C11Z-A, 2E4MZ-A, 2P4MHZ, 2PHZ, 2MA-OK, 2PZ-OK(can be used to be all Shikoku Chem's system, ProductName) etc.In addition, above-mentioned imidazoles can be used alone or two or more is used in combination.
The use level of the imidazoles in the 1st resin combination, relative to total amount 100 mass parts of the epoxy resin in the 1st resin combination, is preferably 0.1 ~ 10 mass parts, is more preferably 0.5 ~ 10 mass parts, more preferably 1 ~ 10 mass parts.When use level is more than 0.1 mass parts, the solidification of epoxy resin is carried out fully, more positively can realize above-mentioned effect (connection reliability is more excellent).In addition, by use level is set to below 10 mass parts, storage stability is better.
As above-mentioned anhydrides, such as maleic anhydride can be used, succinyl oxide, dodecenylsuccinic anhydride, phthalic anhydride, tetrabydrophthalic anhydride, methyl tetrahydrophthalic anhydride, hexahydrophthalic anhydride, methylhexahydrophthalic anhydride, endo-methylene group tetrahydrophthalic acid, methylendomethylene tetrahydrophthalic acid, methylnadic anhydride (methyl himic anhydride), pyromellitic acid dianhydride, benzophenone tetracarboxylic dianhydride, poly-azelaic acid acid anhydride, ring-alkylated styrenes-copolymer-maleic anhydride, 3, 4-dimethyl-6-(2-methyl-1-propylene base)-4-cyclohexene-1, 2-dicarboxylic anhydride, pungent-5-the alkene-2 of 1-isopropyl-4-methyl-dicyclo [2.2.2], 3-dicarboxylic anhydride, ethylene glycol bisthioglycolate trimellitate, glycerine three dewaters trimellitate etc.
Among these, from the viewpoint of the heat resistance of resin combination (or its solidfied material) and moisture-proof more well such, preferred use methyl tetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, endo-methylene group tetrahydrophthalic acid, methylendomethylene tetrahydrophthalic acid, 3,4-dimethyl-6-(2-methyl-1-propylene base)-4-cyclohexene-1,2-dicarboxylic anhydride, 1-isopropyl-4-methyl-dicyclo [2.2.2] pungent-5-alkene-2,3-dicarboxylic anhydride, ethylene glycol bisthioglycolate trimellitate, glycerine three dewater trimellitate etc.These materials may be used singly or as a mixture of two or more.
The use level of anhydrides in 1st resin combination, the quantity N of the epoxy radicals preferably making the 1st resin combination epoxy resin have 1with the quantity N by the producible carboxyl of acid anhydrides coordinated in the 1st resin combination 2ratio (N 1/ N 2) be 0.5 ~ 1.5 use level.Above-mentioned than (N 1/ N 2) be more preferably 0.7 ~ 1.2.If than (N 1/ N 2) being less than 0.5, then carboxyl excessively remains in the solidfied material of resin combination, the situation that the moisture-proof reliability having the solidfied material of resin combination reduces.That is, if than (N 1/ N 2) be more than 0.5, then the moisture-proof reliability of the solidfied material of resin combination is better.In addition, if than (N 1/ N 2) be less than 1.5, then the solidification of epoxy resin is carried out fully, more positively can realize above-mentioned effect (connection reliability is more excellent).
As above-mentioned amine, can be set forth in molecule and there is the primary amino radical of more than at least 1 or the compound of secondary amino group.As amine, better etc. from the viewpoint of the heat resistance of the solidfied material of excellent storage stability, resin combination, preferably use aromatic amine.
As aromatic amine, such as MDA can be used, DADPS, diaminodiphenyl sulfide, m-xylene diamine, 3, 3 '-diethyl-4, 4 '-MDA, 3, 3 ', 5, 5 '-tetraethyl-4, 4,-MDA, 4, 4 '-DADPS, 4, 4 '-diaminodiphenyl sulfide, 2, 2-pair-[4-(4-amino-benzene oxygen) phenyl]-HFC-236fa, 2, two (4-the aminophenyl)-HFC-236fa of 2-, 2, 4-diaminotoluene, 1, 4-diaminobenzene, 1, 3-diaminobenzene, diethyl toluene diamine, dimethyltoluenediamine, phenyl amines, alkylated benzenes amine, N-alkylated benzenes amine etc.These materials can be used alone or two or more is used in combination.
The use level of amine in 1st resin combination, the quantity N of the epoxy radicals preferably making the 1st resin combination epoxy resin have 1the quantity N of the reactive hydrogen on the amino of the amine coordinated with the 1st resin combination 3ratio (N 1/ N 3) be 0.5 ~ 1.5 use level.Above-mentioned than (N 1/ N 3) be more preferably 0.7 ~ 1.2.If than (N 1/ N 3) being less than 0.5, then the reactive hydrogen on amino excessively remains in the solidfied material of resin combination, the situation that the moisture-proof having the solidfied material of resin combination reduces.That is, if than (N 1/ N 3) be more than 0.5, then the moisture-proof reliability of the solidfied material of resin combination is better.In addition, if than (N 1/ N 3) be less than 1.5, then the solidification of epoxy resin is carried out fully, more positively can realize above-mentioned effect (connection reliability is more excellent).
As above-mentioned phenols, bisphenol resin, phenol resol resins, naphthol novolac varnish gum, allylation phenol resol resins, xenol resin, cresol novolac resin, phenol aralkyl resin, cresol naphthol formaldehyde condensation products, the multifunctional phenolic resins of triphenyl methane type, xyxylene modified phenol novolac resin, xyxylene modification naphthol novolac varnish gum, various multifunctional phenolic resins etc. can be used.These materials can be used alone a kind or use as mixture of more than two kinds.
The use level of phenols in 1st resin combination, the quantity N of the epoxy radicals preferably making the 1st resin combination epoxy resin have 1the quantity N of the phenolic hydroxyl group had with the phenols coordinated in the 1st resin combination 4ratio (N 1/ N 4) be 0.5 ~ 1.5 use level.Above-mentioned than (N 1/ N 4) be more preferably 0.7 ~ 1.2.If than (N 1/ N 4) being less than 0.5, then phenolic hydroxyl group excessively remains in the solidfied material of resin combination, the situation that the moisture-proof having the solidfied material of resin combination reduces.That is, if than (N 1/ N 4) be more than 0.5, then the moisture-proof reliability of the solidfied material of resin combination is better.In addition, if than (N 1/ N 4) be less than 1.5, then the solidification of epoxy resin is carried out fully, more positively can realize above-mentioned effect (connection reliability is more excellent).
In addition, and with in the situation of more than two kinds in anhydrides, amine and phenols, preferably according to than [N 1/ (N 2+ N 3+ N 4)] be 0.5 ~ 1.5 mode coordinate, more preferably coordinate according to the mode of 0.7 ~ 1.2.
When using anhydrides, amine, phenols as curing agent, also can further and use curing accelerator.Such as above-mentioned imidazoles can use as curing accelerator and anhydrides, amine, phenols simultaneously.In addition, as curing accelerator, tertiary amines can be used; 1,8-diazabicyclo (5.4.0) endecatylene-7, cyclic amine such as 1,5-diazabicyclo (4.3.0) nonene-5 grade; The tetraphenyl borate salts of tertiary amines, cyclic amine; The trialkyl phosphine classes such as tributylphosphine; The triaryl phosphine classes such as triphenylphosphine; The microcosmic salts etc. such as tetrabutyl phosphorus tetraphenyl borate salts, tetraphenylphosphonium tetraphenyl borate salts.The use level of curing accelerator can consider gelation time, storage stability and suitably setting.
1st resin combination also can contain thermoplastic resin.By containing thermoplastic resin, film forming improves.
As thermoplastic resin, phenoxy resin, polyimide resin, polyamide, polycarbodiimide resin, acrylic resin, mylar, polyvinyl resin, polyethersulfone resin, polyetherimide resin, imide-urethane resin, polyvinyl acetal resin, polyvinyl butyral resin, carbamate resins, acrylic rubber etc. can be enumerated.In these materials, consider from heat resistance and film forming excellence, preferred phenoxy resin, polyimide resin, polycarbodiimide resin, imide-urethane resin etc., more preferably phenoxy resin, polyimide resin.
The weight average molecular weight of thermoplastic resin is preferably more than 5000, is more preferably more than 10000, and more preferably more than 20000.If weight average molecular weight is more than 5000, then can obtains film forming fully and improve such effect.In addition, weight average molecular weight uses GPC(gel permeation chromatography, GelPermeation Chromatography here), the value obtained is measured with polystyrene conversion.In addition, these thermoplastic resins can be used alone or use as mixture of more than two kinds, copolymer.
When 1st resin combination contains thermoplastic resin, its content is preferably 1 ~ 50 quality % in the total amount benchmark of the 1st resin combination, is more preferably 1 ~ 40 quality %, more preferably 5 ~ 30 quality %.If content is more than 50 quality %, then the situation that the heat resistance having the solidfied material of resin combination reduces.
In the 1st resin combination, as composition than that described above, also the additives such as silane coupler, titanium coupling agent, antioxidant, levelling agent, ion capturing agent can be coordinated.These additives may be used singly or in combination of two or more.As long as the use level of additive is adjusted to the effect that can show each additive.In addition, the 1st resin combination also can comprise flux described later.
(the 2nd layer)
2nd layer is the layer be made up of the 2nd resin combination containing flux.In the 2nd resin combination, in order to reduce the removing metallic surface oxide-film such as solder thus form good connecting portion by metal bond, coordinate flux as required composition.
In addition, the filler in the 2nd resin combination relative to the 2nd resin combination total amount quality ratio and the filler in the 1st resin combination relative to the 1st resin combination total amount quality ratio compared with less.By having such formation, in first supply mode, the generation of subsideing can be suppressed fully.In addition, the 2nd resin combination also can not contain filler containing filler.
2nd resin combination, also can containing the composition same with the 1st resin combination except the quality ratio of filler is little, and the use level of each composition also can be same with use level preferred in above-mentioned 1st resin combination.
Filler in 2nd resin combination is preferably more than 0 quality % relative to the quality ratio of the 2nd resin combination total amount and less than 20 quality %, is more preferably 0 ~ 15 quality %, more preferably 0 ~ 10 quality %.Because the content of filler is few, therefore the photopermeability of the 2nd resin combination and the 2nd layer improves.Thus, in the manufacture method of semiconductor device described later sticky on the semiconductor wafer time, projection leading section can be confirmed across the 2nd layer, location when can easily cut, when connecting and the effect of the location of substrate.In addition, in order to carry out the confirmation of this projection leading section, the light transmission rate of the 2nd layer is preferably more than 10% for the visible ray of 555nm, is more preferably more than 20%, and more preferably more than 40%.In addition, light transmission rate can be less than 95% for the visible ray of 555nm, also can be less than 90%.
2nd resin combination is preferably containing thermoplastic resin.When 2nd resin combination contains thermoplastic resin, the surface adhesion force of the 2nd layer has the tendency of reduction.Therefore, such as, in semiconductor making method described later, can realize preventing the cutting swarf produced when the semiconductor wafer monolithic being pasted with encapsulating semiconductor filling film resin composition is changed into semiconductor chip to be attached to the such effect in the surface of the 2nd layer.
From the viewpoint of obtaining this effect significantly further, the content of the thermoplastic resin in the 2nd resin combination, in the total amount benchmark of the 2nd resin combination, is preferably 5 ~ 99.9 quality %, is more preferably 10 ~ 95 quality %.
In addition, from the same viewpoint, the thermoplastic resin in the 2nd resin combination and the total content of flux, in the total amount benchmark of the 2nd resin combination, are preferably more than 5 quality %, are more preferably more than 10 quality %.In addition, the 2nd resin combination also can be only made up of thermoplastic resin and flux.
The use level of the flux in the 2nd resin combination with the total amount of the 2nd resin combination for benchmark, be preferably 0.1 ~ 10 quality %, improve further from the viewpoint of photopermeability, be more preferably 0.5 ~ 7 quality %, improve further from the viewpoint of storage stability, more preferably 1 ~ 5 quality %.If use level is more than 0.1 quality %, then can realize the oxide-film removing effect that flux brings more significantly, therefore connection reliability improves further.In addition, the situation that the insulating properties having resin combination when flux excessively exists reduces, and by use level being set to below 10 quality %, can prevent such insulating properties from reducing, obtain the resin combination of insulating reliability excellence.
As flux, from the viewpoint of the excellent dispersion in resin combination, preferably use the compound of at least a kind selected in the group be made up of alcohols, phenols and carboxylic acids.
As above-mentioned alcohols, the compound with more than 2 alcoholic extract hydroxyl groups can be set forth in molecule.As such alcohols, can 1 be used, 3-dioxane-5, 5-dimethanol, 1, 5-pentanediol, 2, 5-furyl dimethyl carbinol, diethylene glycol, TEG, five ethylene glycol, six ethylene glycol, 1, 2, 3-hexanetriol, 1, 2, 4-butantriol, 1, 2, 6-hexanetriol, 3-methylpentane-1, 3, 5-triol, glycerine, trimethylolethane, trimethylolpropane, erythrite, pentaerythrite, ribitol, D-sorbite, 2, 4-diethyl-1, 5-pentanediol, propylene glycol monomethyl ether, propylene glycol monoethyl, 1, 3-butanediol, 2-ethyl-1, 3-hexylene glycol, N butyl diethanol amine, N-ethyldiethanolamine, diethanol amine, triethanolamine, N, two (2-hydroxyethyl) isopropanolamine of N-, two (2-hydroxymethyl) imino group three (hydroxymethyl) methane, N, N, N ', N '-four (2-hydroxyethyl) ethylenediamine, 1, 1 ', 1 ' ', 1 ' ' '-(ethene dintrile) four (2-propyl alcohol) etc.
In these alcohols, there is the compound of tertiary N atom, such as N butyl diethanol amine, N-ethyldiethanolamine, triethanolamine, N, N-two (2-hydroxyethyl) isopropanolamine, two (2-hydroxymethyl) imino group three (hydroxymethyl) methane, N, N, N ', N '-four (2-hydroxyethyl) ethylenediamine, 1,1 ', 1 ' ', 1 ' ' '-(ethene dintrile) four (2-propyl alcohol) etc., with other Compound Phase ratios, demonstrate good flux active, therefore preferably.The detailed reason demonstrating good flux activity is not very clear, but infer due to alcoholic extract hydroxyl group oxide-film reducing power and come from causing to playing a role together with electro reducing power of the unpaired electron on tertiary N atom.In addition, these alcohols can be used alone, and also can combine two or more and use.
As above-mentioned phenols, the compound with more than 2 phenolic hydroxyl groups can be set forth in molecule.As such phenols, catechol, resorcinol, quinhydrones, xenol, dihydroxy naphthlene, hydroxy-hydroquinone, pyrogallol, methylene-di-phenol (also referred to as " Bisphenol F "), isopropylidene xenol (also referred to as " bisphenol-A "), ethylidene xenol (also referred to as " bisphenol-A D "), 1 can be enumerated, 1,1-tri-(4-hydroxyphenyl) ethane, trihydroxybenzophenone, trihydroxy-acetophenone, poly-4-Vinyl phenol etc.
In addition, as the compound of phenolic hydroxyl group in molecule with more than 2, also can use in molecule the compd A with phenolic hydroxyl group with can with the condensation polymer of the compd B of this compd A polycondensation.Here as compd B, divinylbenzene can be enumerated; Aldehydes; There is in molecule the aromatic compound etc. of more than 2 halogenated methyls, alkoxy methyl or hydroxymethyls.In addition, these phenols can be used alone, and also can combine two or more to use.
As above-claimed cpd A, include, for example phenol, alkylphenol, naphthols, cresols, catechol, resorcinol, quinhydrones, xenol, dihydroxy naphthlene, hydroxy-hydroquinone, pyrogallol, methylene-di-phenol (" Bisphenol F "), isopropylidene xenol (" bisphenol-A "), ethylidene xenol (" bisphenol-A D "), 1,1,1-tri-(4-hydroxyphenyl) ethane, trihydroxybenzophenone, trihydroxy-acetophenone, poly-4-Vinyl phenol etc.
As above-mentioned aldehydes, formaldehyde (its aqueous solution is formalin), paraformaldehyde, trioxane, hexa etc. can be enumerated.
As the aromatic compound in molecule with more than 2 halogenated methyls, alkoxy methyl, hydroxymethyl, include, for example 1, two (chloromethyl) benzene, 1 of 2-, two (chloromethyl) benzene, 1 of 3-, two (chloromethyl) benzene, 1 of 4-, two (methoxy) benzene, 1 of 2-, two (methoxy) benzene, 1 of 3-, two (methoxy) benzene, 1 of 4-, two (hydroxymethyl) benzene, 1 of 2-, 3-two (hydroxymethyl) benzene, Isosorbide-5-Nitrae-bis-(hydroxymethyl) benzene, two (chloromethyl) biphenyl, two (methoxy) biphenyl etc.
Namely as above-mentioned condensation polymer, include, for example the phenol resol resins of the condensation polymer as phenol and formaldehyde, as the cresol novolac resin of the condensation polymer of cresols and formaldehyde, as the naphthol novolac varnish gum of the condensation polymer of aphthols and formaldehyde, as phenol and 1, the phenol aralkyl resin of the condensation polymer of two (methoxy) benzene of 4-, the condensation polymer of bisphenol-A and formaldehyde, the condensation polymer of phenol and divinylbenzene, the condensation polymer etc. of cresols and naphthols and formaldehyde, also can be material modified rubber being carried out to these condensation polymers and obtains, amino triazine skeleton is imported with in molecular skeleton, the material of dicyclopentadiene skeleton.
Further, as flux, as by these phenols allylations are defined aqueous material, allylation phenol resol resins, diallyl bisphenol, diallyl Bisphenol F, diallyl xenol etc. also can be used.These compounds can be used alone, and also can combine two or more to use.
As above-mentioned carboxylic acids, can be any one in aliphatic carboxylic acid, aromatic carboxylic acid, be preferably the carboxylic acid of solid shape at 25 DEG C.
As aliphatic carboxylic acid, include, for example malonic acid, methylmalonic acid, dimethyl malonic acid, ethyl malonic acid, allyl malonic acid, 2,2 '-thiodiglycolic acid, 3,3 '-thio-2 acid, 2,2 '-(ethylene sulfo-) oxalic acid, 3,3 '-dithiodipropionic acid, 2-ethyl-2-hydroxybutyric acid, dithiodiglycol acid, diglycolic acid, acetylenedicarboxylic acid, maleic acid, malic acid, 2-isopropylmolic acid, tartaric acid, itaconic acid, 1,3-acetone dicarboxylic acid, tricarballylic acid, muconic acid, β-hydrogen muconic acid, butanedioic acid, methylsuccinic acid, dimethyl succinate, glutaric acid, KG, 2-methylglutaric acid, 3-methylglutaric acid, 2,2-dimethylated pentanedioic acid, 3,3-dimethylated pentanedioic acid, two (hydroxymethyl) propionic acid of 2,2-, citric acid, adipic acid, 3-tert-butyl group adipic acid, pimelic acid, phenyl oxalic acid, phenylacetic acid, nitro phenyl acetic acid, phenoxyacetic acid, nitrophenoxyacetic acid, phenyl acetic acid, hydroxyphenyl acetic acid, dihydroxyphenyl acetic acid, mandelic acid, hydroxymandelic acid, dihydroxy mandelic acid, 1,2,3,4-BTCA, suberic acid, 4,4 '-two sulfo-two butyric acid, cinnamic acid, nitro cinnamic acid, hydroxyl cinnamic acid, caffeic acid, coumaric acid, phenylpyruvic acid, medical midbodies of para (ortho)-hydroxybenzoic acetone acid, caffeic acid, homophthalic acid, tolyl-acetic acid, phenoxy propionic acid, hydroxy-phenylpropionic acid, benzyloxy acetic acid, phenyl-lactic acid, tropic acid, 3-(phenyl sulfonyl) propionic acid, 3,3-tetramethylene glutaric acid, 5-oxo azelaic acid, azelaic acid, phenylsuccinic acid, 1,2-phenylenediacetic acid, 1,3-phenylenediacetic acid, Isosorbide-5-Nitrae-phenylenediacetic acid, benzyl malonic acid, decanedioic acid, dodecanedioic acid, heneicosanedioic acid, diphenyl acetic acid, diphenylglycollic acid (benzilic acid), dicyclohexyl acetic acid, tetracosandioic acid, 2,2-diphenyl-propionic acid, 3,3-diphenyl-propionic acid, two (4-hydroxy phenyl) valeric acid of 4,4-, pimaric acid, palustric acid, isodextropimaric acid, rosin acid, dehydroabietic acid, neoabietic acid, agathic acid (agathic acid) etc.
As aromatic carboxylic acid, include, for example benzoic acid, 2-Para Hydroxy Benzoic Acid, 3-Para Hydroxy Benzoic Acid, 4-Para Hydroxy Benzoic Acid, 2, 3-dihydroxy benzoic acid, 2, 4-dihydroxy benzoic acid, 2, 5-dihydroxy benzoic acid, 2, 6-dihydroxy benzoic acid, 3, 4-dihydroxy benzoic acid, 2, 3, 4-trihydroxy benzoic acid, 2, 4, 6-trihydroxy benzoic acid, 3, 4, 5-trihydroxy benzoic acid, 1, 2, 3-benzene tricarbonic acid, 1, 2, 4-benzene tricarbonic acid, 1, 3, 5-benzene tricarbonic acid, 2-[two (4-hydroxy phenyl) methyl] benzoic acid, 1-naphthoic acid, 2-naphthoic acid, 1-hydroxy-2-naphthoic acid, 2-hydroxyl-1-naphthoic acid, 3-hydroxy-2-naphthoic acid, 6-Hydroxy-2-naphthoic acid, 1, 4-dihydroxy-2-naphthoic acid, 3, 5-dihydroxy-2-naphthoic acid, 3, 7-dihydroxy-2-naphthoic acid, 2, 3-naphthalene dicarboxylic acids, 2, 6-naphthalene dicarboxylic acids, 2-phenoxy group benzoic acid, biphenyl-4-carboxylic acid, diphenyl-2-carboxylic acid, 2-benzoyl benzoic acid etc.
In these carboxylic acids, from excellent storage stability, the viewpoint of easily buying is considered, preferred use butanedioic acid, malic acid, itaconic acid, 2, two (hydroxymethyl) propionic acid of 2-, adipic acid, 3, 3 '-thio-2 acid, 3, 3 '-dithiodipropionic acid, 1, 2, 3, 4-BTCA, suberic acid, decanedioic acid, phenylsuccinic acid, dodecanedioic acid, diphenyl acetic acid, diphenylglycollic acid, 4, two (4-hydroxy phenyl) valeric acid of 4-, rosin acid, 2, 5-dihydroxy benzoic acid, 3, 4, 5-trihydroxy benzoic acid, 1, 2, 4-benzene tricarbonic acid, 1, 3, 5-benzene tricarbonic acid, 2-[two (4-hydroxy phenyl) methyl] benzoic acid etc.In addition, these carboxylic acids can be used alone, and also can combine two or more to use.
Flux can be aqueous under room temperature (such as 25 DEG C) also can be solid shape, but when the 2nd resin combination contains epoxy resin, is the flux of solid shape under being preferably used in room temperature.Because the phenolic hydroxyl group existed in phenols, the carboxylic acid group existed in carboxylic acids can react with epoxy resin, if therefore use aqueous flux and form the state that epoxy resin and flux evenly mixes, then storage stability may reduce.
2nd resin combination also can containing conducting particles such as metallics, but excellent connection reliability is obtained from the viewpoint of the metal bond by projection and electrode of substrate, the content of conducting particles with the total amount of the 2nd resin combination for benchmark is preferably 0 ~ 10 quality %, be more preferably 0 ~ 5 quality %, more preferably 0 quality %(is not namely containing conducting particles).
(encapsulating semiconductor is filled and is used film resin composition)
The encapsulating semiconductor of present embodiment is filled and is used film resin composition, such as can be manufactured by following method: use planetary-type mixer, ball mill, the composition of the composition of formation the 1st layer and formation the 2nd layer is mixed in organic solvent respectively, thus making varnish, use knife type coater, roll coater, this varnish is coated on after on the resin molding base material implementing demoulding process, dry removing organic solvent, thus make the film resin composition as the 1st layer and the film resin composition as the 2nd layer respectively, use laminating machine they to be fitted.Also can be manufactured by following method in addition: the composition comprising formation the 1st layer and the varnish of the composition of either party of composition that forms the 2nd layer to be coated on the resin molding base material implementing demoulding process and after drying, coating comprises the varnish of the composition of the opposing party and dry again.
As above-mentioned organic solvent, ethyl acetate, methyl ethyl ketone, cyclohexanone, 1-METHYLPYRROLIDONE etc. can be enumerated.In addition as above-mentioned resin molding base material, PETG, polyurethane, polyvinyl chloride, polyvinyl acetate, polyvinyl butyral resin, polyolefin etc. can be enumerated.
In the encapsulating semiconductor filling of present embodiment with in film resin composition, preferably make the thickness of the Thickness Ratio the 1st layer of the 2nd layer less.The thermal coefficient of expansion of such encapsulating semiconductor filling film resin composition diminishes, and connection reliability improves further.The thickness of the 2nd layer is preferably less than 0.8 times of the 1st layer thickness, is preferably less than 0.7 times.The lower limit of the thickness of the 2nd layer has no particular limits, and can be set to more than 0.05 times of the 1st layer thickness, also can be set to more than 0.1 times of the 1st layer thickness.
The thickness of encapsulating semiconductor filling film resin composition suitably can set according to the amount of resin for the space between filling semiconductor chip and substrate.Such as encapsulating semiconductor fills 0.5 ~ 1.5 times of the bump height before preferably connecting with the thickness of film resin composition, is more preferably 0.6 ~ 1.3 times, more preferably 0.7 ~ 1.2 times.If thickness is more than 0.5 times of bump height, then can suppress fully to produce hole due to not filling of resin, connection reliability is more excellent.In addition, if thickness is more than 1.5 times, then a large amount of resin combinations from chip attach areas when connecting can be extruded, and resin combination may be attached to unwanted part.
When using encapsulating semiconductor filling film resin composition in the manufacture method with aftermentioned preparatory process A, such as, the thickness of ground floor can be set to 5 ~ 25 μm, the thickness of the second layer is set to 1 ~ 20 μm (being more preferably 5 ~ 15 μm).According to such encapsulating semiconductor filling film resin composition, in the manufacture method with preparatory process A, the generation of subsideing can be prevented further, thus can obtain that there is more excellent electric conductivity and the semiconductor device of connection reliability.In addition, when the thickness of ground floor and the second layer is in above-mentioned scope, by the average grain diameter of filler is set to 0.1 ~ 0.8 μm, the above-mentioned effect of the manufacture method with preparatory process A can be obtained more significantly.In addition, when the thickness of ground floor and the second layer is in above-mentioned scope, encapsulating semiconductor filling is suitable for connecting the chip that bump height is about 40 μm with film resin composition.
In addition, when using encapsulating semiconductor filling film resin composition in the manufacture method with aftermentioned preparatory process B, such as, the thickness of ground floor can be set to 20 ~ 90 μm (being more preferably 30 ~ 80 μm), the thickness of the second layer is set to 1 ~ 20 μm (being more preferably 5 ~ 15 μm).According to this encapsulating semiconductor filling film resin composition, in the manufacture method with preparatory process B, the generation of subsideing can be suppressed further, thus can obtain that there is more excellent electric conductivity and the semiconductor device of connection reliability.In addition, when the thickness of ground floor and the second layer is in above-mentioned scope, by the average grain diameter of filler is set to 0.1 ~ 0.8 μm, the above-mentioned effect of the manufacture method with preparatory process B can be obtained more significantly.In addition, when the thickness of ground floor and the second layer is in above-mentioned scope, encapsulating semiconductor filling is suitable for connecting the chip that bump height is about 70 μm with film resin composition.
The gelation time of encapsulating semiconductor filling film resin composition 250 DEG C time is preferably 3 ~ 30 seconds, is more preferably 3 ~ 20 seconds, more preferably 3 ~ 15 seconds.When gelation time is above-mentioned scope, while productivity excellence, connection reliability is also more excellent.In addition, so-called gelation time 250 DEG C time, refers on the hot plate that to be placed on by encapsulating semiconductor filling film resin composition and to be set as 250 DEG C, stirs, until the time that can not stir with spatula (spatula) etc.
Encapsulating semiconductor filling film resin composition above can supply by being pasted onto the semiconductor chip, semiconductor wafer, substrate etc. that are cut into prescribed level.
(manufacture method of semiconductor device)
The manufacture method of the semiconductor device of present embodiment has following operation: prepare have electrode substrate, be formed with the semiconductor chip of projection, the preparatory process of the encapsulating semiconductor filling film resin composition be pasted onto on substrate or semiconductor chip; And the connection operation of the electrical connection electrode of substrate and the projection of semiconductor chip.
Here, there is solder or tin in the surface of at least one party in the electrode of substrate and the projection of semiconductor chip.Therefore, as the method described in patent document 5, in order to prevent between projection and electrode of substrate subside and projection front portion is exposed from resin combination time, the solder exposed or tin form oxide-film and may cause bad connection.On the other hand, the manufacture method of semiconductor device according to the present embodiment, because the junction of electrode of substrate and projection is in the 2nd layer, therefore can prevents the bad connection caused by the oxide-film of solder or tin, and can suppress fully to subside.
In addition, the surface due at least one party in the electrode of substrate and the projection of semiconductor chip exists solder or tin, therefore the electrical connection of the electrode of substrate and the projection of semiconductor chip is formed by utilizing the metal bond of solder or tin usually.That is, solder or tin melting by heating during connection, the electrode of substrate and the projection of semiconductor chip are engaged by solder or tin thus.By carrying out such metal bond, excellent electric conductivity and connection reliability can be obtained.
As semiconductor chip, but use the semiconductor chip being formed with multiple projection on a plurality of electrodes.As the material of semiconductor chip, be not particularly limited, the elemental semiconductor of silicon, germanium etc. can be used; The various semiconductor such as the compound semiconductor of GaAs, indium phosphide etc.
As the projection formed on a semiconductor die, include, for example copper bump, golden projection, solder projection, be formed with the projection etc. of solder or tin layers structure in the front end of copper post.
As solder, Sn-37Pb(fusing point 183 DEG C can be used), but consider the impact on environment, preferably use Sn-3.5Ag(fusing point 221 DEG C), Sn-2.5Ag-0.5Cu-1Bi(fusing point 214 DEG C), Sn-0.7Cu(fusing point 227 DEG C), Sn-3Ag-0.5Cu(fusing point 217 DEG C), Sn-92Zn(fusing point 198 DEG C) etc. lead-free solder.In addition, from the viewpoint of such to the reply of fine connectionization, be preferably formed with the projection of solder or tin layers structure in copper post front end.
Substrate has the electrode surface being provided with multiple electrode.As substrate, common circuit substrate can be used, also can use the semiconductor chip without projection.
As circuit substrate, the not partially-etched removing insulated substrates such as glass epoxide, polyimides, polyester, pottery being formed with on the surface the metal levels such as copper and the substrate being formed with the wiring graph comprising electrode can be used; Be formed with the substrate of the wiring graph comprising electrode on the surface at insulated substrate by copper facing etc.; Print conductive material on the surface at insulated substrate and be formed with the substrate etc. of the wiring graph comprising electrode.
The surface of electrode of substrate is preferably formed with from layer gold, solder layer, tin layers and antirust by rete at least a kind of surface-treated layer selecting.Layer gold and tin layers can be formed by electroless plating or plating.In addition, solder layer can be formed by plating, also can by utilize printing be coated with solder paste and carry out heating and melting method, on wiring graph, configure fine semiconductor particles and carry out the method for heating and melting and formed.
Antirustly can be arranged by the following method by rete: in the special liquid being also referred to as pre-flux, flood substrate, thus the oxide-film removing on wiring graph surface will formed by copper etc., comprise the antirust tunicle of organic principle in the formation of this surface simultaneously.Like this antirust by rete, due to the good wetability for solder, tin can be guaranteed, and easy to the reply of fine connectionization, be therefore suitable.
In order to carry out above-mentioned metal bond, when the projection of semiconductor chip be copper bump, golden projection etc. not there is on surface the projection of solder or tin, as the electrode of substrate, the electrode being formed with solder layer or tin layers on the surface can be selected.In addition, the electrode surface of substrate does not exist the situation of solder or tin, as the projection of semiconductor chip, solder projection can be selected, be formed with the projection etc. of solder or tin layers structure in the front end of copper post.
As preparatory process, include, for example: prepared substrate, stickup encapsulating semiconductor filling film resin composition on the substrate and the preparatory process A of semiconductor chip; Prepare semiconductor chip, be pasted onto the preparatory process B of encapsulating semiconductor filling film resin composition on this semiconductor chip and substrate; Deng.
(preparatory process A)
In preparatory process A, according to the mode the 2nd layer being configured in substrate-side, encapsulating semiconductor filling film resin composition is pasted onto on the electrode surface of substrate.
As the method for pasting encapsulating semiconductor filling film resin composition on the electrode surface of substrate, include, for example the method using warm-up mill laminating machine, vacuum laminator.
(preparatory process B)
In preparatory process, be implemented as follows operation: in this projection forming surface of semiconductor wafer with the projection forming surface being formed with multiple projection, paste the adhering processes of encapsulating semiconductor filling film resin composition according to the mode relative to the 2nd layer, the 1st layer being configured in semiconductor wafer side; And singualtion is carried out to the semiconductor wafer through the 1st operation, obtain the singualtion operation of the semiconductor chip being pasted with encapsulating semiconductor filling film resin composition.
Preparatory process B is due to can the multiple semiconductor chip being pasted with encapsulating semiconductor filling film resin composition of disposable making, and therefore productivity is excellent.
As the method for pasting encapsulating semiconductor filling film resin composition in the projection forming surface of semiconductor wafer, include, for example the method using warm-up mill laminating machine, vacuum laminator.
Here, because the photopermeability of the filler in the 2nd resin combination described above few relative to the quality ratio of the 2nd resin combination total amount (such as less than 20 quality %) and the 2nd layer is excellent, therefore, it is possible to confirm projection front end across the 2nd layer.Therefore, in singualtion operation, connection operation described later, the front end of projection can be positioned as benchmark, operability improves.
The singualtion of semiconductor wafer, such as, can be undertaken by blade cuts, laser cutting, stealthy cutting etc.At this moment, semiconductor wafer can by semiconductor wafer with the face of projection forming surface opposition side on to fit dicing tape and be fixed on cutter sweep, also can by fitting dicing tape and being fixed on cutter sweep on the encapsulating semiconductor filling film resin composition being pasted on semiconductor wafer.
In preparatory process B, also can be machined to by thinning on the semiconductor wafer of prespecified thickness being processed by grinding back surface and paste encapsulating semiconductor filling film resin composition.In addition, also can apply grinding back surface processing before semiconductor wafer on paste encapsulating semiconductor filling film resin composition after, to fit grinding back surface adhesive tape according to the mode contacted with encapsulating semiconductor filling film resin composition, grinding back surface processing is carried out to the face with projection forming surface opposition side and thinning is machined to the thickness of regulation.
In addition, in preparatory process B, also for the semiconductor wafer implemented before grinding back surface processing, after being partly processed to form groove along line of cut by cutter sweep, projection forming surface can be pasted encapsulating semiconductor filling film resin composition.In this case, can to fit according to the mode contacted with encapsulating semiconductor filling film resin composition grinding back surface adhesive tape, by grinding back surface make above-mentioned groove from the showing out of projection forming surface opposition side, thus thinning semiconductor wafer, and monolithic turns to semiconductor chip.
In connection operation, the electrical connection electrode of substrate and the projection of semiconductor chip.Connect operation, such as can across encapsulating semiconductor filling film resin composition by semiconductor chip and substrate relative configuration, heating at the temperature more than the fusing point of solder or tin is while pressurize and carry out.Thus, removed the surface film oxide of solder or tin by the flux contained by the 2nd layer (or the 2nd layer and the 1st layer), solder or tin promptly dissolve simultaneously, and the projection of semiconductor chip and the electrode of substrate carry out metal bond.
Here, semiconductor film side, the 2nd layer of mode configuring semiconductor sealing filling film resin composition being positioned at substrate-side is positioned at according to the 1st layer.Thus, the generation of subsideing can be suppressed fully, thus can the semiconductor device with satisfactory electrical conductivity and connection reliability be manufactured.
Heating is preferably 0.1 ~ 20 second pressing time, is more preferably 0.1 ~ 15 second, more preferably 0.1 ~ 10 second.By heating is set to 0.1 second pressing time, can get rid of resin combination fully between projection and electrode, the surface film oxide of solder or tin can remove equably simultaneously, and therefore connection reliability has the tendency improved further.In addition, if the connect hours was more than 20 seconds, then productivity may reduce.
Connect operation and also can comprise following operation: the 1st heating process heating pressurization at the temperature more than the active temperature of flux contained by the 2nd layer, below the fusing point of solder or tin, and heating pressurization and the 2nd heating process that the electrode metal of the projection of semiconductor chip and substrate is engaged at temperature more than the fusing point of solder or tin.
In the 1st heating process, by heating from the resin combination getting rid of lowering viscousity between projection and electrode of substrate, removed the surface film oxide of solder or tin by flux simultaneously.Solder after 1st heating process or tin, owing to being overlayed on resin combination, therefore can prevent from reoxidizing.In addition, in the 1st heating process, the low molecular weight compositions volatilization in resin combination or producing high-molecular.
According to the 1st heating process, due to resin combination can be got rid of fully between projection and electrode of substrate, the generation of subsideing therefore can be suppressed further.In addition, owing to being made the low molecular weight compositions in resin combination volatilize or producing high-molecular by the 1st heating process, therefore, low molecular weight compositions can be suppressed under the high temperature conjunction condition of the 2nd heating process to volatilize and produce hole.
The heat time of the 1st heating process is preferably 0.1 ~ 20 second usually, is more preferably 0.5 ~ 15 second, more preferably 1.0 ~ 15 seconds.If the heat time is more than 0.1 second, then the surface film oxide of solder or tin is removed equably, and the resin that simultaneously can carry out fully between projection and electrode of substrate is got rid of, and therefore connection reliability has the tendency improved further.In addition, if the heat time was more than 20 seconds, then productivity may reduce.
But, if encapsulating semiconductor filling film resin composition gels can be made by the 1st heating process, then in the 2nd heating process, due to the resin combination of gelation, the solder of melting or the flowing of tin can be hindered, possibly cannot play sufficient wetability.Therefore, the heat time preferably according to use encapsulating semiconductor filling film resin composition gelation time and suitably set.
In the 2nd heating process, make solder or tin melting and by projection and electrode of substrate metal bond.Therefore heating-up temperature is set in more than the fusing point of solder or tin.Due in the 1st heating process, complete the removing of the surface film oxide of solder or tin and the resin eliminating between projection and electrode of substrate, therefore, in the 2nd heating process, solder or the rapid melting of tin, can show good wetability on the surface of projection and electrode of substrate.
The heat time of the 2nd heating process is preferably 0.1 ~ 20 second usually, is more preferably 0.5 ~ 15 second, more preferably 1.0 ~ 15 seconds.By being set to more than 0.1 second the heat time, solder or tin will soak the surface of projection and electrode of substrate fully, therefore can suppress the generation of bad connection further.In addition, if the heat time was more than 20 seconds, then productivity may reduce.
But, in the 2nd heating process, by making encapsulating semiconductor filling film resin composition gels, the connecting portion carrying out metal bond can be strengthened.Thus, following effect can be expected: suppress to result from the thermal stress of coefficient of thermal expansion differences of semiconductor chip and substrate and concentrate on connecting portion and the bad connection such as to crack connecting in the cooling procedure after terminating.Therefore, the heat time of the 2nd heating process, preferably suitably set according to gelation time, to make the abundant gelation of encapsulating semiconductor filling film resin composition.
1st heating process can be connected by single jockey with the 2nd heating process, but to heat up to jockey due to needs or cool, and therefore has the situation that the operating time extends, productivity reduces.
On the other hand, by the 1st heating process is separated with the 2nd heating process, carried out respectively by different jockeys, can operate the design temperature of jockey being maintained under certain state, can high productivity be realized.In addition, due to can by there is the jockey of mechanism's (constant heating arrangements) that can be heated to uniform temperature instead of there is intensification, the jockey of cooling body (PULSE HEATING mechanism) carries out, therefore, it is possible to simplified apparatus.
In addition, can before carrying out the 1st heating process, carry out temporary fixed operation, namely the location of semiconductor chip and substrate is carried out, and lower at the active temperature than flux, show the higher temperature of adhesive temperature than encapsulating semiconductor filling with film resin composition under, temporary fixed semiconductor chip and substrate.By arranging so temporary fixed operation, the 1st heating process and the 2nd heating process can be carried out to multiple semiconductor chip and substrate unification, can high productivity be realized.
Further, in order to improve connection reliability further, after connection semiconductor chip and substrate, can be heated by heated oven etc., carry out the solidification of encapsulating semiconductor filling film resin composition further.
Then the semiconductor device manufactured the manufacture method by present embodiment is described.
Fig. 1 is the constructed profile of the embodiment representing semiconductor device of the present invention.Semiconductor device 10 has circuit substrate 7, semiconductor chip 5, is configured in sealing resin 6 between circuit substrate 7 and semiconductor chip 5.Sealing resin 6 is formed with the solidfied material of film resin composition by the encapsulating semiconductor filling of present embodiment, seals the space between circuit substrate 7 and semiconductor chip 5.Circuit substrate 7 has the substrates such as built-in inserted plate and is arranged on the distribution 4 in the one side of this substrate.Distribution 4 and the semiconductor chip 5 of circuit substrate are electrically connected by projection 3.In addition, circuit substrate 7 be provided with distribution 4 opposition side, face face on there is electrode pad 2 and be located at the solder ball 1 on electrode pad 2, can be connected with other circuit blocks.
As semiconductor device of the present invention, can enumerate as shown in Figure 1, the substrate being called built-in inserted plate is equipped with semiconductor chip, and carry out the device of resin seal.Specifically, CSP(chip size packages can be enumerated), BGA(BGA).In addition, as other semiconductor device of the present invention, the CoC(Chip-on-Chip being equipped with different semiconductor chip structures on a semiconductor die can be enumerated, laminated chips), by silicon through electrode, 3 dimensions are laminated with the 3D packaging body etc. of multiple semiconductor chip structure.
In addition, the encapsulating semiconductor of present embodiment is used to fill the manufacture method of the semiconductor device with film resin composition, be not limited to above-mentioned manufacture method, such as also can manufacture semiconductor device as follows: the mode semiconductor supply contacted with the projection forming surface of semiconductor chip according to the 1st layer seals filling film resin composition, by the textural association of 2 as above gained, projection is connected to each other, manufactures semiconductor device.
Above, the preferred embodiment of the present invention is illustrated, but the present invention is not limited to above-mentioned embodiment.
Embodiment
Below, further illustrate the present invention by embodiment, but the present invention is not limited to embodiment.
(embodiment 1 ~ 10, comparative example 1 ~ 6)
According to the formation shown in table 1 ~ 3, use the layer of rolls press being heated to 50 DEG C fit the film resin composition A ~ K made by method shown below, thus membranaceous composition is used in the encapsulating semiconductor filling having manufactured embodiment 1 ~ 10 and comparative example 1 ~ 6.
(film resin composition A)
By phenoxy resin " PKCP80 " (Inchem Corporation system, ProductName) 45g, polyfunctional epoxy resin " EP1032H60 " (japan epoxy resin Co., Ltd. system, ProductName) 30g, aqueous acid anhydrides " YH307 " (japan epoxy resin Co., Ltd. system, ProductName) 20g, silica filler " SE2050 " (Co., Ltd. Admatechs system, ProductName, average grain diameter 0.4 ~ 0.6 μm) 100g, adipic acid (Sigma-Aldrich system) 3g, solid promoter " TPP-K " (Hokko Chemical Industry Co., Ltd.'s system, ProductName) 1g dispersion, be dissolved in methyl acetate and make varnish, knife type coater is used to be coated on by this varnish after on barrier film (PET film), drying 10 minutes in the baking oven of 70 DEG C, thus make the film resin composition A of specific thickness.
(film resin composition B)
Except not coordinating except adipic acid, make the film resin composition of specific thickness in the same manner as film resin composition A.
(film resin composition C)
Except being set to except 10g by the use level of silica filler " SE2050 " (Co., Ltd. Admatechs system, ProductName, average grain diameter 0.4 ~ 0.6 μm), make the film resin composition C of specific thickness in the same manner as film resin composition A.
(film resin composition D)
Except not coordinating except silica filler, make the film resin composition D of specific thickness in the same manner as film resin composition A.
(film resin composition E)
Phenoxy resin " PKCP80 " (Inchem Corporation system, ProductName) 50g, adipic acid (Sigma-Aldrich system) 3g are disperseed, are dissolved in methyl acetate and make varnish, knife type coater is used to be coated on by this varnish after on barrier film (PET film), drying 10 minutes in the baking oven of 70 DEG C, thus make the film resin composition E of specific thickness.
(film resin composition F)
Except not coordinating silica filler and adipic acid, make the film resin composition F of specific thickness in the same manner as film resin composition A.
(film resin composition G)
Phenoxy resin " PKCP80 " (Inchem Corporation system, ProductName) 50g, silica filler " SE2050 " (Co., Ltd. Admatechs system, ProductName, average grain diameter 0.4 ~ 0.6 μm) 50g are disperseed, are dissolved in methyl acetate and make varnish, knife type coater is used to be coated on by this varnish after on barrier film (PET film), drying 10 minutes in the baking oven of 70 DEG C, thus make the film resin composition G of specific thickness.
(film resin composition H)
By phenoxy resin " ZX1356-2 " (Toto Kasei KK's system, ProductName) 30g, polyfunctional epoxy resin " EP1032H60 " (japan epoxy resin Co., Ltd. system, ProductName) 45g, two F type liquid epoxy resin " YL983U " (japan epoxy resin Co., Ltd. system, ProductName) 10g, flexibility epoxy resin " YL7175-1000 " (japan epoxy resin Co., Ltd. system, ProductName) 5g, 2,4-diaminourea-6-[2 '-methylimidazolyl-(1 ')]-ethyl-s-triazine isocyanuric acid adduct " 2MA-OK " (Shikoku Chem's system, ProductName) 2g, silica filler " SE2050 " (Co., Ltd. Admatechs system, ProductName, average grain diameter 0.4 ~ 0.6 μm) 75g, hud typed organic filler " EXL-2655 " (ROHM AND HAAS Amada Co., Ltd. system, ProductName) 10g, adipic acid (Sigma-Aldrich system) 2g disperses, be dissolved in methyl acetate and make varnish, use knife type coater to be coated on by this varnish after on barrier film (PET film), drying 10 minutes in the baking oven of 70 DEG C, thus make the film resin composition H of specific thickness.
(film resin composition I)
Except not coordinating except adipic acid, make the film resin composition I of specific thickness in the same manner as film resin composition H.
(film resin composition J)
Except not coordinating silica filler and organic filler, make the film resin composition J of specific thickness in the same manner as film resin composition H.
(film resin composition K)
Except not coordinating silica filler, organic filler and adipic acid, make the film resin composition K of specific thickness in the same manner as film resin composition H.
(mensuration of photopermeability)
The photopermeability of film resin composition A ~ K is measured by following method.
(light transmission rate assay method)
The mode preparing to be respectively 25 μm according to thickness on dividing plate is formed with material and the dividing plate monomer of film resin composition A ~ K, after cutting out the size of 30mm × 30mm respectively, the membranaceous compositions of thermosetting resin be formed on dividing plate is arranged on the sample installation portion of Inc. of Hitachi Ltd. spectrophotometer U-3310, dividing plate monomer is arranged on reference to installation portion, in the wavelength region of 400 ~ 800nm, divide mensuration light transmission rate with sweep speed 300nm/, read light transmission rate during 555nm.
[table 1]
[table 2]
[table 3]
(connection of semiconductor chip and substrate)
Use the encapsulating semiconductor of embodiment 1 ~ 10 and comparative example 1 ~ 6 to fill and use film resin composition, carried out the connection of semiconductor chip and substrate by following method of attachment 1 or method of attachment 2, thus manufacture semiconductor device.Semiconductor device to manufacturing as described below carries out conduction inspection, hole evaluation, connection status evaluation.Show the result in table 4 and table 5.
(method of attachment 1)
As being formed with the semiconductor chip with copper post and the projection at the Pb-free coating bed of material (Sn-3.5Ag, fusing point 221 DEG C) of the front end of this copper post setting, preparing Hitachi and surpassing LSI system system " JTEG PHASE11_80 " (size 7.3mm × 7.3mm, thickness 0.55mm, bump pitch 80 μm, number of lugs 328(periphery configure), bump height 40 μm, trade name).In addition, as substrate, prepare that be there is on surface the glass epoxy substrate being defined the copper wiring figure of antirust tunicle by pre-flux process.
Encapsulating semiconductor filling film resin composition is cut out 9mm × 9mm, under the condition of 80 DEG C/0.5MPa/5 second according to the 2nd layer of mode contacted with substrate surface be pasted onto on substrate be equipped with the region of semiconductor chip after, peel off barrier film.
The substrate adsorption being pasted with encapsulating semiconductor filling film resin composition is fixed on flip-chip bond machine FCB3(Panasonic produce science and technology system, ProductName) the platform being set as 40 DEG C on, after itself and semiconductor chip are located, carry out temporary fixed operation, namely at load 25N, die head temperature 100 DEG C, carry out crimping (reaching 90 DEG C) in 5 seconds, semiconductor chip is temporarily fixed on substrate.Then, by the die temperature of flip-chip bond machine at 290 DEG C, crimping (reaching 250 DEG C) in 10 seconds is carried out with load 25N.
(method of attachment 2)
As the semiconductor wafer being formed with lead free solder bumps (Sn-3.0Ag-0.5Cu, fusing point 221 DEG C), prepare Co., Ltd. Walts system " WALTS-TEG FC200JY " (wafer thickness 725 μm, wafer size 8 inches, bump height 80 μm, bump pitch 200 μm (configuration of face battle array), the size 10mm × 10mm of each chip, the number of lugs 2116 of each chip).
The mode contacted with the projection forming surface of this semiconductor wafer according to the 1st layer, is fitted in encapsulating semiconductor filling film resin composition on this semiconductor wafer with the warm-up mill laminating machine being heated to 80 DEG C.Then, dicing tape of fitting in the face contrary with projection forming surface of semiconductor wafer, is fixed on semiconductor wafer on wafer ring.After the barrier film of stripping semiconductor sealing filling with film resin composition, use blade cutter, monolithic turns to the semiconductor chip of 10mm × 10mm, thus is produced on semiconductor chip projection forming surface being pasted with encapsulating semiconductor filling film resin composition.
Then, carry out plating the plating Au process of Ni process/fast and the substrate of Cu wiring graph that obtains, preparation Co., Ltd. Walts system " WALTS-KIT01A200P-10 " as having.This substrate is configured in flip-chip bond machine FCB3(Panasonic produce science and technology system, ProductName) the platform being set as 40 DEG C on, after itself and the semiconductor chip being pasted with encapsulating semiconductor filling film resin composition are positioned, carry out temporary fixed operation, namely at load 25N, die head temperature 100 DEG C, carry out crimping (reaching 90 DEG C) in 5 seconds, semiconductor chip is temporarily fixed on substrate.Then, by the die temperature of flip-chip bond machine at 220 DEG C, after carrying out crimping (reaching 190 DEG C) in 10 seconds with load 20N, under the state keeping die head height, make die head temperature rise to 290 DEG C, carry out crimping (reaching 250 DEG C) in 10 seconds further.
(checking)
The situation that can confirm daisy chain connection is designated as A, and the situation that can not confirm daisy chain connection is designated as B.
(hole evaluation)
With ultrasonic flaw detecting device (Hitachi builds mechanism " FineSAT "), the semiconductor device manufactured is observed, will relative to chip area, hole area occupied be less than 1% situation be designated as A, the situation more than 1% is designated as B.
(connection status evaluation)
By section grinding, the connecting portion of the semiconductor device of manufacture is exposed, observe with light microscope.Subside not see at connecting portion, the fully wetting distribution of solder be designated as A.In addition, with see at connecting portion subside or the fully wetting distribution of solder be designated as B.
[table 4]
Embodiment 1 Embodiment 2 Embodiment 3 Embodiment 4 Embodiment 5 Embodiment 6
Method of attachment 1 1 1 1 1 1
Checking A A A A A A
Hole is evaluated A A A A A A
Connection status A A A A A A
[table 5]
Embodiment 7 Embodiment 8 Embodiment 9 Embodiment 10 Comparative example 1 Comparative example 2
Method of attachment 2 2 1 1 1 1
Checking A A A A B A
Hole is evaluated A A A A A A
Connection status A A A A B B
[table 6]
Comparative example 3 Comparative example 4 Comparative example 5 Comparative example 6
Method of attachment 1 2 1 1
Checking B - B B
Hole is evaluated B - A A
Connection status B - B B
When using the encapsulating semiconductor filling of embodiment 1 ~ 6,9 and 10 with film resin composition, achieving good porosity status and good connecting portion, obtaining the semiconductor device of electric conductivity and connection reliability excellence.
Fig. 2 represents the observation image obtained by the porosity status of the semiconductor device of ultrasonic flaw detecting device observation embodiment 3.In addition, Fig. 3 represents that the section of the connecting portion of the semiconductor device of embodiment 3 observes photo.In addition, Fig. 4 represents that the section of the connecting portion of the semiconductor device of embodiment 6 observes photo.In figs. 3 and 4, the copper post 13 of semiconductor chip 12 and the electrode 15 of substrate 11 have carried out metal bond by solder 14.In addition, by as the sealing resin 16 of encapsulating semiconductor filling with the solidfied material of film resin composition, the space of substrate 11 and semiconductor chip 12 is sealed filling.
On the other hand, when using the film resin composition of comparative example 1 and 5, solder does not soak distribution (electrode of substrate) fully, can not form good connecting portion.Fig. 5 represents that the section of the connecting portion of the semiconductor device of comparative example 1 observes photo.In Figure 5, create between the copper post 13 and the electrode 15 of substrate 11 of semiconductor chip 12 and subside 17.In addition, solder 14 does not have the electrode 15 of wetting substrate 11, does not carry out sufficient metal bond.
In addition, in comparative example 2 and 6, create at connecting portion and subside.Fig. 6 represents that the section of the connecting portion of the semiconductor device of comparative example 2 observes photo.In figure 6, create between the copper post 13 and the electrode 15 of substrate 11 of semiconductor chip 12 and subside 17.
Fig. 7 represents the observation image obtained by the porosity status of the semiconductor device of ultrasonic flaw detecting device observation and comparison example 3.From Fig. 7 and Fig. 2 relatively, in comparative example 3, create many holes (18 of Fig. 7).
When carrying out method of attachment 2, when using the encapsulating semiconductor filling of embodiment 7 and 8 with film resin composition, although be the state that projection front end does not penetrate resin combination and do not expose, but projection front end can be confirmed fully.Therefore, the location of semiconductor chip and substrate can easily be carried out.Fig. 8 expression sem observation is pasted with the projection forming surface of the semiconductor wafer of the encapsulating semiconductor filling film resin composition of embodiment 8 and the observation photo obtained.In addition, the camera of Fig. 9 expression flip-chip bond machine observes the projection forming surface and the observation photo that obtains that are pasted with the semiconductor wafer of the encapsulating semiconductor filling film resin composition of embodiment 8.
In addition, as shown in table 4, when using the encapsulating semiconductor filling of embodiment 7 and 8 with film resin composition, achieving good porosity status and good connecting portion, obtaining the semiconductor device of electric conductivity and connection reliability excellence.Figure 10 represents that the section of the connecting portion of the semiconductor device of embodiment 8 observes photo.In Fig. 10, the solder projection 23 of semiconductor chip 22 and the electrode 25 of substrate 21 have carried out metal bond by the melting of solder.And by as the sealing resin 26 of encapsulating semiconductor filling with the solidfied material of film resin composition, the space of substrate 21 and semiconductor chip 22 is sealed filling.
On the other hand, when using the film resin composition of comparative example 4, not penetrating resin combination in projection front end and under the state do not exposed, projection front end cannot be confirmed, can not position.Therefore, semiconductor device can not be manufactured.The camera of Figure 11 expression flip-chip bond machine observes the projection forming surface being pasted with the semiconductor wafer of the film resin composition of comparative example 4 and the observation photo obtained.
Symbol description
1: solder ball, 2: electrode pad, 3: solder projection, 4: distribution, 5: semiconductor chip, 6: sealing resin, 7: circuit substrate, 10: semiconductor device, 11: substrate, 12: semiconductor chip, 13: copper post, 14: solder, 15: electrode of substrate, 16: sealing resin, 17: to subside, 18: hole, 21: substrate, 22: semiconductor chip, 23: solder projection, 25: electrode of substrate, 26: sealing resin.

Claims (12)

1. encapsulating semiconductor is filled and is used a film resin composition, and it has the 1st layer that is made up of the 1st film resin composition containing thermosetting resin and filler and the 2nd layer that is made up of the 2nd film resin composition containing flux,
Filler in described 2nd film resin composition relative to described 2nd film resin total composition quality ratio and the filler in described 1st film resin composition relative to described 1st film resin total composition quality ratio compared with less.
2. encapsulating semiconductor filling film resin composition according to claim 1, described 2nd film resin composition is further containing thermoplastic resin.
3. encapsulating semiconductor filling film resin composition according to claim 1, the thickness that the thickness of described 2nd layer is less than described 1st layer.
4. encapsulating semiconductor filling film resin composition according to claim 1, described 2nd film resin composition is further containing thermosetting resin.
5. encapsulating semiconductor filling film resin composition according to claim 1, described 1st film resin composition is further containing flux.
6. encapsulating semiconductor filling film resin composition according to claim 1, described 2nd film resin composition is further containing filler.
7. encapsulating semiconductor filling film resin composition according to claim 1, described 1st film resin composition is further containing thermoplastic resin.
8. encapsulating semiconductor filling film resin composition according to claim 1, described 1st film resin composition and described 2nd film resin composition except the quality ratio of filler, containing same composition.
9. the encapsulating semiconductor filling film resin composition according to any one of claim 1 ~ 8, by obtaining the 1st film resin composition as described 1st layer and the 2nd film resin composition laminating as described 2nd layer.
10. the manufacture method of a semiconductor device, it is the manufacture method of the semiconductor device possessing semiconductor chip and substrate, described semiconductor chip has the projection forming surface being formed with multiple projection, described substrate has the electrode surface being provided with multiple electrode, and the manufacture method of this semiconductor device has following operation:
1st operation, according to the mode relative to described 1st layer, described 2nd layer being configured in described substrate-side, is pasted onto on the described electrode surface of described substrate by the encapsulating semiconductor filling film resin composition according to any one of claim 1 ~ 9; And
2nd operation, across described encapsulating semiconductor filling film resin composition, described substrate through described 1st operation and described semiconductor chip is configured according to the mode that described electrode surface is relative with described projection forming surface, carrying out heating pressurization makes the projection of the electrode of described substrate and described semiconductor chip be electrically connected
There is tin or solder in the surface of at least one party in the described electrode connected by described 2nd operation and described projection.
The manufacture method of 11. 1 kinds of semiconductor devices, it is the manufacture method of the semiconductor device possessing semiconductor chip and substrate, described semiconductor chip has the projection forming surface being formed with multiple projection, described substrate has the electrode surface being provided with multiple electrode, and the manufacture method of this semiconductor device has following operation:
1st operation, in this projection forming surface of semiconductor wafer with the projection forming surface being formed with multiple projection, according to the mode relative to described 2nd layer, described 1st layer being configured in described semiconductor wafer side, the encapsulating semiconductor pasted according to any one of claim 1 ~ 9 is filled and is used film resin composition;
2nd operation, carries out singualtion to the described semiconductor wafer through described 1st operation, thus obtains the semiconductor chip being pasted with described encapsulating semiconductor filling film resin composition; And
3rd operation, across described encapsulating semiconductor filling film resin composition, the described semiconductor chip and described substrate that are obtained by described 2nd operation is configured according to the mode that described projection forming surface is relative with described electrode surface, carrying out heating pressurization makes the electrode of the projection of described semiconductor chip and described substrate be electrically connected
There is tin or solder in the surface of at least one party in the described electrode connected by described 3rd operation and described projection.
12. 1 kinds of semiconductor devices, are manufactured by the manufacture method of the semiconductor device described in claim 10 or 11.
CN201180055158.3A 2010-11-18 2011-11-16 Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device Expired - Fee Related CN103249559B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010-257799 2010-11-18
JP2010257799 2010-11-18
PCT/JP2011/076437 WO2012067158A1 (en) 2010-11-18 2011-11-16 Film-like resin composition for sealing and filling semiconductor, method for manufacturing semiconductor device, and semiconductor device

Publications (2)

Publication Number Publication Date
CN103249559A CN103249559A (en) 2013-08-14
CN103249559B true CN103249559B (en) 2015-08-05

Family

ID=46084081

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180055158.3A Expired - Fee Related CN103249559B (en) 2010-11-18 2011-11-16 Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device

Country Status (4)

Country Link
JP (1) JP5344097B2 (en)
CN (1) CN103249559B (en)
TW (1) TWI462959B (en)
WO (1) WO2012067158A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6102112B2 (en) * 2012-07-30 2017-03-29 日立化成株式会社 Epoxy resin composition and electronic component device
KR102528123B1 (en) * 2015-10-09 2023-05-03 주식회사 다이셀 glue
US10734350B2 (en) * 2016-05-09 2020-08-04 Hitachi Chemical Company, Ltd. Method for manufacturing semiconductor device
JP6958615B2 (en) * 2017-06-07 2021-11-02 昭和電工マテリアルズ株式会社 Film-like adhesives for semiconductors, manufacturing methods for semiconductor devices, and semiconductor devices
WO2019220540A1 (en) * 2018-05-15 2019-11-21 日立化成株式会社 Semiconductor device, thermosetting resin composition used for production thereof, and dicing die bonding integrated tape
WO2021065517A1 (en) * 2019-09-30 2021-04-08 昭和電工マテリアルズ株式会社 Adhesive for semiconductors, adhesive sheet for semiconductors, and method for manufacturing semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1400993A (en) * 2000-02-15 2003-03-05 日立化成工业株式会社 Adhesive composition, process for producing the same, adhesive film made with the same, substrate for semiconductor mounting, and semiconductor device
CN101461070A (en) * 2006-06-02 2009-06-17 日立化成工业株式会社 Package for mounting optical semiconductor element and optical semiconductor device employing the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001223227A (en) * 2000-02-08 2001-08-17 Nitto Denko Corp Resin composition for sealing semiconductor material and semiconductor device
CN1331218A (en) * 2000-06-30 2002-01-16 上海博德基因开发有限公司 Polypeptide-human zinc finger protein 12.98 and polynucleotide for coding it
JP3683179B2 (en) * 2000-12-26 2005-08-17 松下電器産業株式会社 Semiconductor device and manufacturing method thereof
JP5484706B2 (en) * 2007-10-16 2014-05-07 日立化成株式会社 COF semiconductor sealing film adhesive, semiconductor device manufacturing method using the adhesive, and semiconductor device
JP5083070B2 (en) * 2007-11-19 2012-11-28 日立化成工業株式会社 Sealing film
JP2009139153A (en) * 2007-12-04 2009-06-25 Tokai Univ Method and device for controlling nuclear fusion power generation plant of dt magnetic confinement type
JP5098851B2 (en) * 2007-12-25 2012-12-12 日立化成工業株式会社 Laminated sealing film
KR20110010718A (en) * 2008-05-16 2011-02-07 스미토모 베이클리트 컴퍼니 리미티드 Semiconductor component fabrication method and semiconductor component
JP5320844B2 (en) * 2008-06-20 2013-10-23 富士通株式会社 Pre-underfill bonding type semiconductor device and manufacturing method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1400993A (en) * 2000-02-15 2003-03-05 日立化成工业株式会社 Adhesive composition, process for producing the same, adhesive film made with the same, substrate for semiconductor mounting, and semiconductor device
CN101461070A (en) * 2006-06-02 2009-06-17 日立化成工业株式会社 Package for mounting optical semiconductor element and optical semiconductor device employing the same

Also Published As

Publication number Publication date
JPWO2012067158A1 (en) 2014-05-12
JP5344097B2 (en) 2013-11-20
TWI462959B (en) 2014-12-01
WO2012067158A1 (en) 2012-05-24
TW201235395A (en) 2012-09-01
CN103249559A (en) 2013-08-14

Similar Documents

Publication Publication Date Title
CN102453340B (en) Encapsulating semiconductor filling compositions of thermosetting resin and semiconductor device
CN103249559B (en) Encapsulating semiconductor fills the manufacture method and semiconductor device of using film resin composition, semiconductor device
JP6045774B2 (en) Epoxy resin composition for semiconductor sealing filling, semiconductor device, and manufacturing method thereof
CN109075088B (en) Method for manufacturing semiconductor device
JPWO2013125684A1 (en) Semiconductor device and manufacturing method thereof
JP7380926B2 (en) Film adhesive for semiconductors, method for manufacturing semiconductor devices, and semiconductor devices
JP6229528B2 (en) Semiconductor device manufacturing method, semiconductor device, and adhesive composition
JP2012158719A (en) Epoxy resin composition for sealing and filling semiconductor, semiconductor device using the same, and method for manufacturing semiconductor device
JP2015131969A (en) Epoxy resin composition for seal-filling semiconductor
JP7363798B2 (en) Semiconductor adhesive, semiconductor device manufacturing method, and semiconductor device
JP2021024963A (en) Semiconductor bonding agent, semiconductor bonding agent film producing method, and semiconductor device producing method
KR20210084432A (en) Semiconductor device and method for manufacturing the same
JP2019175898A (en) Method for manufacturing semiconductor
JP6690308B2 (en) Method for manufacturing semiconductor device
WO2022024648A1 (en) Method for producing semiconductor device and film adhesive
WO2019167460A1 (en) Adhesive for semiconductor and method for manufacturing semiconductor device using same
JP2022078574A (en) Manufacturing method for semiconductor device and adhesive used for the same
JP2013071941A (en) Epoxy resin composition for sealing and filling semiconductor, method for manufacturing semiconductor device, and semiconductor device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150805

Termination date: 20161116

CF01 Termination of patent right due to non-payment of annual fee