CN103236780B - PWM (pulse-width modulation) module capable of alternatively generating interruption mode and critical mode in flyback topology - Google Patents

PWM (pulse-width modulation) module capable of alternatively generating interruption mode and critical mode in flyback topology Download PDF

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CN103236780B
CN103236780B CN201310160499.8A CN201310160499A CN103236780B CN 103236780 B CN103236780 B CN 103236780B CN 201310160499 A CN201310160499 A CN 201310160499A CN 103236780 B CN103236780 B CN 103236780B
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resistance
pwm
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sawtooth waveforms
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CN103236780A (en
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罗晓光
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Abstract

The invention discloses a PWM (pulse-width modulation) module which is applied to a flyback type switching power supply topology, can cause reverse voltage of D-S two ends of the topology to be lower and can always alternatively generate an interruption mode and a critical mode. The PWM module comprises a PWM control circuit and a sawtooth generator, and further comprises a zero current detection and start synchronizing circuit and a load weight sawtooth wave frequency conversion circuit, wherein the PWM control circuit is used for switching off fixed clock start peak current; the zero current detection and start synchronizing circuit can generate phase coherent waves; after the coherent waves and sawtooth waves are iterated, the PWM control circuit can start another alternative PWM signal output; and when a flyback circuit works in a current continuous mode, the sawtooth waves work under different frequencies by the load weight sawtooth wave frequency conversion circuit. According to the PWM module disclosed by the invention, the flyback circuit always works in a current interruption mode and critical mode alternatively generating state; the reverse voltage generated by the D-S two ends of a switching tube is reduced to 1.2-1.5 times of power source voltage; and the PWM module has a simple structure, the controlled flyback topology switching on-off loss is small, the service life is long and a few of ultraharmonics are generated.

Description

Interrupted and the critical conduction mode of flyback topologies interlocks the PWM module occurred
Technical field
The present invention relates to a kind of pwm control circuit for Switching Power Supply, particularly relate to a kind of PWM control module making reverse exciting topological circuit always be in soft conducting.
Background technology
Reverse excitation circuit topological structure as shown in Figure 4, T1 is high-frequency isolation transformer, Q1 is switching tube, D2 is secondary side rectifier pipe, at switching tube conduction period (hereinafter referred to as Ton), input voltage is added on primary coil two ends, now the voltage of primary coil is upper just lower negative, the voltage of inductive secondary be upper negative under just, because D2 oppositely ends, noenergy is to secondary transmission, magnetic field intensity starts to increase gradually, electric energy is stored in transformer in the mode of magnetic energy, and now, the size of exciting current equals primary current size; Close at switching tube and have no progeny (hereinafter referred to as Toff), due to the characteristic that inductive current can not suddenly change, negative lower positive induced voltage on primary coil produces, simultaneously, also respond to just lower negative induced voltage in generation at secondary coil, rectifying tube D2 conducting, the magnetic energy stored in primary coil is to secondary coil transmission and at output loop generation output current, according to the situation of secondary coil output current, continuous mode, discontinuous mode and critical conduction mode can be divided into.
Continuous mode: be stored in the magnetic energy in primary coil during Ton, after Toff terminates (before namely next Ton starts), still have portion of energy to remain in primary coil, namely at the end of Toff, described electric current does not make zero.
Under discontinuous mode: the whole magnetic energy being stored in primary coil during Ton, just also exported to secondary coil by whole energy trasfer before Toff terminates, namely described electric current terminates to be classified as zero for the previous period at Toff.
Critical conduction mode: be stored in the magnetic energy in primary coil during Ton, be all transferred to secondary coil at the end of Toff, and at this moment, described electric current just in time makes zero.
In recent years, extensively all kinds of harmonic technology and synchronous rectification is adopted in power generation project, and quasi-resonance technology is also applied in the power supply of high efficiency, low cost more and more, this technology is by combining hard switching transducer and resonance manner, and around power tube MOSFET, add curtage type resonant network, make Switching Power Supply achieve zero current or no-voltage working method.
Quasi-resonance technological synthesis Current adjustment pattern and degaussing measuring ability, make power supply under any output loading, any linear input voltage condition, by the delay switch turn-off time, switching tube drain source voltage is down to minimum, to ensure that it carries out switch motion with minimum drain voltage under critical conduction mode, reduce spine interference, reduce switch conduction loss, finally reach the object of raising the efficiency, it can thus be appreciated that, change along with load and input voltage condition changes, to realize the working method of zero voltage switch conducting by the resonant operational frequency of power supply.
At present, the critical conduction mode quasi-resonance pwm chip that Switching Power Supply industry uses (is opened also known as zero current detection, the pwm control circuit that peak current turns off), the BOOST topology be used for not with isolation makes PFC boost circuit, and be rarely used in the reverse excitation circuit topology of band isolating transformer, reason is exactly under the condition having isolating transformer, the reverse voltage at switching tube drain-source pole (hereinafter referred to as D-S) two ends can exceed the 4-5 of input voltage doubly, such as during input voltage 264V, switching tube shutdown moment, the reverse voltage produced at MOS switching tube D-S two ends can up to more than 1300V, this very easily causes the breakdown damage of switching tube (moreover the resistance to reverse voltage of the usual institute of MOS switching tube is in the market at below 1000V), so just limit the range of application of described critical conduction mode quasi-resonance pwm chip.
The reason producing above-mentioned phenomenon is: circuit of reversed excitation is during Ton, the primary leakage inductance of transformer is also in energy storage, add the clamping action by secondary side rectifier diode, during Toff, the energy of primary inductance can not all discharge complete, it creates ringing waveform by the resonance of the drain node electric capacity with switching tube, the essence that this ringing waveform produces is exactly that primary inductance and primary leakage inductance are releasing energy, if and the pwm signal that described critical conduction mode quasi-resonance pwm chip exports is all the words of critical conduction mode all the time, the so time of energy with regard to not discharging of primary inductance and primary leakage inductance, after the accumulation in several cycles, in the moment that switching tube turns off, will produce at D-S two ends and exceed supply voltage 4-5 reverse voltage doubly.
Summary of the invention
The technical problem to be solved in the present invention is to provide and a kind ofly its D-S two ends reverse voltage can be made lower for inverse-excitation type switch power-supply topology and be always interrupted and critical conduction mode interlocks the PWM control module occurred.
In order to solve the problems of the technologies described above, the technical solution used in the present invention is:
Interrupted and the critical conduction mode of flyback topologies of the present invention interlocks the PWM module occurred, comprise fixed clock and open the pwm control circuit that peak current turns off and the saw-toothed wave generator producing sawtooth waveforms, when its current value being also included in reverse exciting topological circuit secondary side is zero, the zero current detection producing the coherent wave signal synchronous with described sawtooth waveforms opens synchronous circuit, this coherent wave and sawtooth waveforms can make described pwm control circuit open another pwm signal replaced to export after superposition, described coherent wave is square wave, trapezoidal wave or triangular wave, it also comprises when reverse exciting topological circuit working is at continuous current mode, described sawtooth waveforms adopts the load weight sawtooth waveforms frequency switching circuit of different frequency work, wherein,
Described saw-toothed wave generator is made up of the first resistance, the 3rd resistance and the 3rd electric capacity, wherein, one termination reference voltage terminal of the first resistance, the other end be connected to " 4 " pin of the pulse width modulating chip in described pwm control circuit and connected with the output of the first comparator in described frequency switching circuit by the 14 resistance, one end of the emitter and the 3rd resistance of also opening triode in synchronous circuit by the 3rd electric capacity and described zero current detection connects; The other end ground connection of the 3rd resistance;
Described zero current detection is opened synchronous circuit and is formed primarily of the second comparator and triode, and wherein, the input in the same way of the second comparator is access to reference voltage terminal, also by the earth of the 12 resistance and the 6th electric capacity by the 11 resistance; Its reverse input end, by the ZCD end of the flyback winding of the 8th resistance, the external power transformer of the second diode, also connects " 6 " pin of described pulse width modulating chip, again by the 15 grounding through resistance by the 9th resistance, the 3rd diode; Its output is leaded up to the tenth resistance and is access to reference voltage terminal, and the 4th electric capacity of separately leading up to is connected to the base stage of triode; The collector electrode of triode connects reference voltage terminal.
Described load weight sawtooth waveforms frequency switching circuit is formed primarily of the first comparator, its in the same way input lead up to the 5th resistance and be connected to reference voltage terminal, separately lead up to the 6th grounding through resistance, also leading up to the 7th resistance and the first diode is connected to its output; Its reverse input end is access to " 1 " pin of described pulse width modulating chip by the 13 resistance.
Described load weight sawtooth waveforms frequency switching circuit, according to load weight, can make described sawtooth waveforms be operated in 80kHZ-100kHZ frequency range, 40kHZ-60kHZ frequency range respectively.
The model of described pulse width modulating chip is UC3842.
The model of described first comparator and the second comparator is LM393.
Described triode model is MMBT3904LT1.
Compared with prior art, the present invention is on the basis of existing pwm control circuit, add the zero current detection that can produce square wave and open synchronous circuit and the load weight sawtooth waveforms frequency switching circuit according to the convertible sawtooth waveforms operating frequency of load weight, and use it for switch flyback switch circuit.Due to the existence of described synchronous circuit, the pwm pulse signal that the present invention is exported results from and to work independently with sawtooth waveforms and with under square wave and sawtooth waveforms superposition working condition, the former makes circuit working at discontinuous conduct mode, the latter makes circuit working at electric current critical conduction mode, and hocket, to make in the primary inductance of primary coil and primary leakage inductance stored energy be close to when every two PWM end cycles thus discharge complete, thus the reverse voltage that switching tube D-S two ends are produced is down to 1.2-1.5 times of supply voltage.
When the flyback topologies being opened the pwm control circuit control that peak current turns off by fixed clock is operated under continuous current mode, synchronous circuit of the present invention can not produce square wave because zero current signal being detected, under the work of described frequency switching circuit, sawtooth waveforms frequency can be arranged respectively by load weight, thus the flyback topologies that the present invention is controlled under any circumstance all is operated in discontinuous current and critical conduction mode interlocks the state of carrying out.Structure of the present invention flyback topologies switching loss that is simple, that control is little, long service life and the high order harmonic component produced is few.
Accompanying drawing explanation
Fig. 1 is circuit block diagram of the present invention.
Fig. 2 is circuit theory diagrams of the present invention.
Fig. 3 is that the present invention is applied to coherent signal oscillogram in inverse-excitation type switch power-supply topology.
Fig. 4 is inverse-excitation type switch power-supply topology (the passive PFC of pump adding type) schematic diagram.
Fig. 5 is the voltage oscillogram of flyback topologies switching tube D-S two ends Three models.
Embodiment
Below in conjunction with drawings and embodiments, the invention will be further described.
Reference numeral is as follows:
The pwm control circuit 1 that fixed clock unlatching peak current turns off, saw-toothed wave generator 2, zero current detection open synchronous circuit 3, load weight sawtooth waveforms frequency switching circuit 4, pulse width modulating chip U1, the first voltage comparator U2, the second voltage comparator U3, triode Q1, accessory power supply VCC ,+5v reference voltage V REF, pulse width modulating signal PWM, zero current detection start signal ZCD, error amplifier signal EA, peak current detection cut-off signals IS.
As Fig. 1, shown in 2, interrupted and the critical conduction mode of flyback topologies of the present invention interlocks the PWM module occurred, comprise in prior art and there is the pwm control circuit 1 that fixed clock unlatching peak current turns off and the saw-toothed wave generator 2 producing sawtooth waveforms, it also comprises can detect reverse exciting topological circuit secondary coil current value and the zero current detection unlatching synchronous circuit 3 exporting coherent wave when this current value is zero, this coherent wave and sawtooth waveforms can make described pwm control circuit 1 open another pwm signal replaced to export after superposition, described coherent wave can be square wave, trapezoidal wave or triangular wave, it also comprises when reverse exciting topological circuit working is at continuous current mode, described sawtooth waveforms adopts the load weight sawtooth waveforms frequency switching circuit 4 of different frequency work.
The model that the described pwm control circuit 1 with the shutoff of fixed clock unlatching peak current is mainly turned off by fixed clock unlatching peak current is that the pulse width modulating chip U1 of UC3842 is formed, " 1 " pin of this pulse width modulating chip U1, second resistance R2 of leading up to is connected to " 8 " pin that this chip exports+5V reference voltage V REF, another road connects the photoelectrical coupler in reverse excitation circuit topology, its " 2 " pin and " 5 " pin ground connection, the source resistance of its " 3 " pin outside connected switch pipe is held as IS, the first resistance R1 in " 4 " pin and saw-toothed wave generator, 3rd electric capacity C3 and load weight sawtooth waveforms frequency switching circuit 4 the 14 resistance R14 connects, " 6 " pin is output, it exports PWM modulation signal by the 4th resistance R4, " 7 " pin meets accessory power supply VCC, " 8 " pin is+5V reference voltage V REF output, first electric capacity C1, second electric capacity C2 is the filter capacitor of accessory power supply VCC, 5th electric capacity C5 is the filter capacitor of+5V reference voltage V REF.
Described saw-toothed wave generator 2 is made up of the first resistance R1, the 3rd resistance R3 and the 3rd electric capacity C3, wherein, the one termination reference voltage V REF of the first resistance R1 holds, the other end be connected to " 4 " pin of the pulse width modulating chip in described pwm control circuit 1 and connected with the output of the first comparator U2 in described frequency switching circuit 4 by the 14 resistance R14, one end of the emitter and the 3rd resistance R3 of also opening triode Q1 in synchronous circuit 3 with described zero current detection by the 3rd electric capacity C3 connects; The other end ground connection of the 3rd resistance R3.
Described zero current detection is opened synchronous circuit 3 and is formed primarily of the triode Q1 of model to be the second comparator U3 of LM393 and model be MMBT3904LT1, wherein, the input in the same way of the second comparator U3 is access to reference voltage V REF end, also by the earth of the 12 resistance R12 and the 6th electric capacity C6 by the 11 resistance R11; Its reverse input end is the ZCD end of the flyback winding of the external power transformer of the second diode D2 of 1N4148 by the 8th resistance R8, model, the 3rd diode D3 being also 1N4148 by the 9th resistance R9, model connects " 6 " pin of described pulse width modulating chip U1, again by the 15 resistance R15 ground connection; Its output lead up to the tenth resistance R10 be access to reference voltage V REF end, the 4th electric capacity C4 of separately leading up to is connected to the base stage of triode Q1; The collector electrode of triode Q1 connects reference voltage V REF end, is also connected to the 4th diode D4 that a model is 1N4148 between the base stage and ground of triode Q1.
Described load weight sawtooth waveforms frequency switching circuit 4 is formed primarily of the first comparator U2 that model is LM393, its in the same way input lead up to the 5th resistance R5 be connected to reference voltage V REF end, separately lead up to the 6th resistance R6 ground connection, also leading up to the 7th resistance R7 and model is that the first diode D1 of 1N4148 is connected to its output; Its reverse input end is access to " 1 " pin of described pulse width modulating chip U1 by the 13 resistance R13.Described load weight sawtooth waveforms frequency switching circuit 4, according to load weight, can make described sawtooth waveforms be operated in 80kHZ-100kHZ frequency range and 40kHZ-60KHZ frequency range respectively.
Explanation of nouns:
PWM:(Pulse Width Modulation) pulse width modulation;
ZCD:(Zero Current Detection) zero current detection start signal;
EA:(Error Amplifier) error amplifier signal;
IS:(I-electric current S-Switch) peak current detection cut-off signals;
VREF:(V-voltage REF--Reference)+5v reference voltage;
VCC: accessory power supply;
SAW:(Sawtooth) sawtooth signal;
SY:(Synchro) synchronizing signal.
PFC:(Power Factor Correction) Active PFC.
Theoretical foundation of the present invention and operation principle
One, according to the superposition principle of ripple: if there is a few train wave to meet in space, so every train wave will keep oneself original characteristic (frequency, wavelength, direction of vibration and the direction of propagation) independently, can't change because of the existence of other ripples, this is called the independence of wave traveling; And the vibration of any point is each train wave causes the conjunction of vibration to vibrate at this point separately, this rule is just called the superposition principle of ripple.
It is as follows that two train waves put the expression formula of meeting at certain:
Y S1=A S1*cos(ωt+Φ 1);Y S2=A S2*cos(ωt+Φ 2)
Point vibration engagement point causes:
Y 1=A 1*cos(ωt+Φ 1-2πγ 11);Y 2=A 2*cos(ωt+Φ 2-2πγ 22)
γ in formula 1, γ 2be the wave-path of two wave sources to interference point; λ 1, λ 2it is the wavelength of two train waves;
A 1, A 2be two row wave amplitudes; Φ 1, Φ 2it is the initial phase of two train waves;
Conjunction vibration engagement point causes:
Y=Y 1+Y 2=A*cos(ωt+Φ)A=√(A 1 2+A 2 2+2A 1A 2cosΔΦ)
ΔΦ=Φ 2-Φ 1-2π(γ 21)/λ
Described two train waves are sawtooth signal SAW and square-wave synchronous signal SY respectively, and this is the start signal of two PWM; The independence circulation way of adding ripple under the effect of an IS peak current detection cut-off signals and two PWM start signal be generation two PWM waveforms root by, the necessary and sufficient condition producing coherent wave is that ΔΦ is constant, and the constant necessary and sufficient condition of ΔΦ must to be that input voltage is constant, load is constant (i.e. Ton) constant, convenient in order to describe, analysis below and derivation are all that supposition ΔΦ is constant.
Occur that the root of two pwm signals is by as follows:
The first step, circuit start pulse width modulating chip U1 exports first PWM, after a period of time, first IS peak current detection signal can turn off first PWM, the D-S waveform of first discontinuous mode occurs, now, synchronous circuit produces square wave after catching first valley point of bell signal, second step, pulse width modulating chip U1 is acted on after this square wave and sawtooth waveforms superposition, force pulse width modulating chip U1 after Dead Time, export second pwm signal, equally also be that after a period of time, second IS peak current detection signal can turn off second PWM, the D-S waveform of second critical conduction mode occurs, here crucial is a bit just occurred superposition phenomenon after first synchronizing signal produces, and only creates the existence that superposition just has coherent wave, and according to the characteristic that the independence of ripple is propagated, they just can start respectively to walk each path since then.
Sawtooth waveforms is controlled oneself the cycle will covered and control oneself, namely when it will be charged to 2.8V, (certainly yet will through Dead Time) be exactly the beginning that the 3rd PWM exports, because this example has the existence of load weight sawtooth waveforms frequency switching circuit, it can ensure that PWM that each under which kind of state of load is controlled by sawtooth waveforms is that the D-S waveform of discontinuous mode (that is leaves time enough to it complete by the fault offset of primary inductance and leakage inductance, also need the waveform of this discontinuous mode that circuit could be helped to discharge the energy of primary inductance and leakage inductance storage just, reduce the reverse voltage at D-S two ends), the same PWM controlled by synchronizing signal and sawtooth waveforms superposition also there will be the D-S waveform of critical conduction mode by the path of controlling oneself, so go round and begin again.
Two, according to the manual data of pulse width modulating chip U1: the upper and lower threshold values of the sawtooth waveforms that the external timing capacitor of its " 4 " pin produces is set as 2.8v and 1.2v respectively; When the amplitude of sawtooth waveforms charging is greater than 2.8v, the discharge tube conducting of pulse width modulating chip U1 inside, for described timing capacitor provides discharge loop; When on it, voltage is less than 1.2v, described discharge tube disconnects, and now ,+5v reference voltage V REF is the charging of described timing capacitor again, and its switching frequency is: F sW=1.44/R tc t.
Three, according to RC transient process principle and formula I=dq/dt=Ve/R*e -t/RCv c=q/c=Ve* (1-e -t/RC) convert:
T fillthe voltage that in=-RC*ln (1-Vc/Ve) formula, Vc-timing capacitor is filled, Ve-be supply voltage;
T put=RC*lnVc ,/Vc " V in formula c,-timing capacitor electric discharge before amplitude, Vc "-timing capacitor electric discharge after amplitude.
The switching frequency F of correspondence of four, deriving according to circuit structure of the present invention sW:
For preventing flyback topologies circuit from entering continuous current mode state, the present invention is provided with load weight sawtooth waveforms frequency switching circuit 4, therefore by sawtooth waveforms frequency F sAWwith square-wave synchronous signal frequency F sYarrange by following two kinds of situations, be respectively:
When load is underloading: sawtooth waveforms frequency is F sAW1, square-wave synchronous signal frequency is F sY1.
When load is for heavy duty: sawtooth waveforms frequency is F sAW2, square-wave synchronous signal frequency is F sY2.
1, sawtooth waveforms SAW:
F sAW1=1.44/(t fill 1+ t put 1)
F sAW2=1.44/(t fill 2+ t put 2)
As shown in Figure 2, choose reasonable the 5th resistance R5, the 6th resistance R6 and the 7th resistance R7 resistance, can calculate the potential value of middle P point of publishing picture, M point and N point, as follows respectively:
V p=1.8v(+5v reference voltage V REF is after dividing potential drop)
V mthe junction voltage 0.7v-V of=1.8v-D1 r7≈ 1.1v
V nlower threshold values=1.2vV m< V nlower threshold values 1.2v
1) when load is underloading, EA terminal potential is less than 1.8v, and output " 1 " pin of the first comparator U2 exports high level, and due to the isolation of the first diode D1, therefore the 14 resistance R14 branch road belongs to off-state.
Have: t fill 1=-(R1+R3) * C3*ln (1-2.8v/5v) (1)
T put 1=[(R3+R s) // (R1+R3)] * C3*ln2.8v/1.2v (2)
Rs is the internal resistance of pulse width modulating chip U1 internal discharge pipe
2), when load is heavy duty, EA terminal potential is greater than 1.8v, the drop-down triode ON of its inside of output " 1 " pin output low level of the first comparator U2, therefore the 14 resistance R14 branch road plays shunting action.
A: N point is had by node current law: I r1=I r14+ rC-E+ I (R3+1/ ω C3)(3)
(ignoring the input of " 4 " pin comparator of pulse width modulating chip U1)
I (R3+1/ωC3)=[5v/(R1+R3)]*e -t/ττ=(R1+R3)*C3
I (R14+RC-E)=V C3/(R14+R C-E)*e -t/τ1.2v≤V C3≤2.8vτ=(R1+R3)*C3
R c-Ebe the resistance that the inner drop-down triode C-E of the first comparator U2 ties;
B: due to V c3=V n=5v*R14/(R14+R1) 1.2v≤V n≤ 2.8v
Wherein the value of the 14 resistance R14 need allow V nupper threshold values be about greater than 2.8V,
Solution above formula obtains: R14 >=1.27R1 (4)
C: conveniently ignore R3, R to write c-E, (3) formula correspondence is rewritten as I1=I2+I3 then has simultaneously: I1=(5V/R1) * e -t/ τ+ (V c3/ R14) * e -t/ τ
Separate above formula can obtain: t fill 2=-R1*C3*ln [(I1*R1*R14)/(5V*R14+V c3* R1)] (5)
D: in order to prove t fill 2> t fill 1contrast (1) formula and (5) known need to prove:
|ln[(I1*R1*R14)/(5V*R14+V C3*R1)]|>|ln(1-2.8v/5v)| (6)
Now suppose that electric capacity C3 is charged to 2.8V and V c3during=2.8V (7)
Then have: I1=(5V-2.8V)/R1 (8)
(4), (7), (8) formula are substituted into (6) and can obtain:
|ln(2.2/7.2)|>|ln(1-2.8v/5v)|
|-1.186| > |-0.82| i.e. t fill 2> t fill 1obtain card.
E:t put 2={ [(R3+Rs) // (R3+R14+R c-E)] // (R1+R3) } * C3*ln2.8v/1.2v (9)
R c-Ethe resistance that the inner drop-down triode C-E of the first comparator U2 ties;
2, square-wave synchronous signal SY:
In (2), (9) formula, due to R1 > > R3+Rs; R14 > > R3+Rs therefore can ignore, has: t put 1≈ t put 2=(R3+Rs) * C3*ln2.8v/1.2v (10)
(10) formula illustrates that the Dead Time of pulse width modulating chip U1 is substantially equal under the light and heavy two states of load.
F sY1=1/(t fill 3+ t put 3+ t put 1)
F sY2=1/(t fill 3+ t put 3+ t put 2)
T in above-mentioned two formulas fill 3and t put 3for RC transient process, t put 1, t put 2dead Time for pulse width modulating chip U1 inside is also the steady state time of square-wave synchronous signal SY, i.e. t put 1, t put 2determine the width of square-wave synchronous signal SY; Due to t put 1≈ t put 2, so F sY1≈ F sY2
This example is by the voltage magnitude V of square-wave synchronous signal SY sYbe set in 1.5v.
Have: t fill 3=-(R10+R3+R be1) * C4*ln (1-V c4/ V rEF) (11)
V wherein in (11) c4=V rEF-V q1B-E-V sY=5v-0.7v-1.5v=2.8v
(11) V in formula c4for magnitude of voltage, V that the 4th electric capacity C4 fills rEFfor reference voltage value, V q1B-Efor triode B-E junction voltage, R be1it is the B-E junction resistance of triode Q1.
T put 3=(R d4+ R u3//R10) * C4*ln2.8v/1v (12)
(12) R in formula u3c-E junction resistance, the R of the inner drop-down triode of the second comparator U3 d4be the resistance of the 4th diode D4.
(12) the C-E junction voltage 0.3v of the pressure drop 0.7v+Q1 of the 1v=D4 in formula
As shown in Figure 2, the charge path of the 4th electric capacity C4: the B-E of the right-hand member-triode Q1 of+5V reference voltage V REF-the 4th electric capacity C4 ties the upper end-ground of the-the three resistance R3; The discharge path of the 4th electric capacity C4: the left end of anode-the 4th electric capacity C4 of C-E knot-ground-the 4th diode D4 of trombone slide under the right-hand member-the second comparator U3 inside of the 4th electric capacity C4.
The C-E junction voltage 0.3V of trombone slide under the PN junction voltage 0.7V and the second comparator U3 having the 4th diode D4 in its discharge path can be seen, so the voltage minimum at the 4th its two ends of electric capacity C4 discharge off is 1V by the discharge path of the 4th electric capacity C4.
Five: operation principle
As Fig. 2, shown in 3 and Fig. 5, when " 7 " pin of pulse width modulating chip U1 adds VCC, after+5v reference voltage V REF sets up, its " 6 " pin will export PWM, when the source resistance of switching tube produces IS peak current detection cut-off signals, switching tube turns off, flyback starts power output, primary coil transmits energy to secondary coil, now, secondary coil output current, when described zero current detection unlatching synchronous circuit 3 detects that flyback converter is zero, namely when ZCD zero current detection start signal occurs, output " 7 " pin of the second comparator U3 just can export a rising edge signal (i.e. the rising edge of square-wave synchronous signal SY), + 5v reference voltage V REF is by the tenth resistance R10, 4th electric capacity C4, the B-E knot of triode Q1 is added on the 3rd resistance R3, although (the synchronous end of a pulse width modulating chip U1 but small resistor the 3rd resistance R3 that goes here and there over the ground in the lower end of electric capacity the 3rd electric capacity C3 just can add synchronizing signal, the frequency F of certainly additional square-wave synchronous signal SY sYf need be greater than sAWmore than 10%).
The present invention has individual characteristic to be exactly that circuit of reversed excitation can not enter continuous mode, once enter continuous mode would not there is coherent wave, studying carefully its reason is exactly that the time (namely sawtooth waveforms SAW is charged to the time of 2.8v) that the time lag of trailing edge occurs in the upper threshold values of " 4 " pin of pulse width modulating chip U1 appears in zero current detection reverse input end " 6 " pin of opening synchronous circuit 3 li of second comparator U3, that is, the discharge tube of pulse width modulating chip U1 inside is tried to be the first conducting, start to export PWM after Dead Time, and the start signal of this PWM is controlled to open by sawtooth waveforms SAW, instead of square-wave synchronous signal SY unlatching, no longer there is trailing edge in reverse input end " 6 " pin of zero current detection unlatching synchronous circuit 3 li of second comparator U3 thus, that is output " 7 " pin of the second comparator U3 there will not be the rising edge of square-wave synchronous signal SY, circuit opens the hard switching of peak current shutoff by entering the fixed clock dominated by pulse width modulating chip U1, continuous mode state.In order to overcome this phenomenon, sawtooth wave frequency F must be allowed sAWchange along with the state of load.
The present invention is that the change by detecting EA terminal voltage completes F sAWswitch, allow when load is lighter sawtooth waveforms be operated in F sAW1, during heavier loads, be operated in F sAW2, such as: when load lighten EA terminal voltage lower than 1.8v time, output " 1 " pin of the first comparator U2 just can export high level, and the operating frequency of coherent wave is F sAW1, F sY1, can 80KHZ-100KHZ be set in; After EA terminal voltage is greater than 1.8v, output " 1 " the pin then output low level of the first comparator U2, the operating frequency of coherent wave is F sAW2, F sY2, can be set between 40KHZ--60KHZ; Choose reasonable t put 2value can each by F when heavy duty sY2first valley point of bell signal all can be captured in the PWM cycle controlled.
When input voltage is minimum, pack heaviest be exactly we said PWM maximum time, general Ton is about 1/3*T, T=25us during 40KHZ, ON time is about 8us, and Toff then also has 17us, also has time enough complete in Toff release by the energy of primary inductance thus, circuit would not enter continuous mode, can not enter continuous current mode for institute of the present invention control circuit, once enter continuous current mode, we just can't detect synchronizing signal, also just do not have two described waveforms; Therefore, circuit sawtooth waveforms is arranged at respectively the frequency range of 80KHZ-100KHZ and 40KHZ-60KHZ by load weight, under just can be made to run on discontinuous conduct mode by continuous current mode.
The present invention turns off this two functions, so its performance is more perfect owing to remaining pulse width modulating chip U1 by all peak current detection and by week maximum PWM; It, except exporting except rated power in the input range exchanging 90v-264v, also can stablize transition when load weight sawtooth waveforms frequency error factor simultaneously.
Technique effect of the present invention:
1, the PWM produced due to its occurs with the form of coherent wave, by sawtooth waveforms SAW control be discontinuous mode waveform, be then the harmonic wave of critical conduction mode by square wave synchronizing signal SY control; So system is all be operated in the state that discontinuous mode and critical conduction mode alternately occur all the time; Just because of there is the appearance of discontinuous mode had the time released energy by just to be allowed primary inductance and primary leakage inductance, the reverse voltage at switching tube D-S two ends is made to be down to the 1.2-1.5 of supply voltage doubly, just because of there is the appearance of critical conduction mode just to make the efficiency of whole power-supply system exceed the 4-5% being opened the pwm pattern power supply that peak current turns off by fixed clock.
2, be particularly suitable for doing the passive PFC+PWM topology of pump type, complete PFC+PWM two kinds of functions by single tube, its PF value is more than 0.94, and its circuit of power supply than active PFC+PWM topology is simple, with low cost.
3, be widely used in and be less than in the consumer power supply of 200W, be particularly suitable for PC power source and LED streetlamp power source.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention; make some equivalent alternative or obvious modification without departing from the inventive concept of the premise; and performance or purposes identical, all should be considered as belonging to the scope of patent protection that the present invention is determined by submitted to claims.

Claims (4)

1. the interrupted and critical conduction mode of a flyback topologies interlocks the PWM module occurred, comprise fixed clock and open the pwm control circuit (1) that peak current turns off and the saw-toothed wave generator (2) producing sawtooth waveforms, it is characterized in that: when its current value being also included in reverse exciting topological circuit secondary side is zero, the zero current detection producing the coherent wave signal synchronous with described sawtooth waveforms opens synchronous circuit (3), this coherent wave and sawtooth waveforms can make described pwm control circuit (1) open another pwm signal replaced to export after superposition, described coherent wave is square wave, trapezoidal wave or triangular wave, it also comprises when reverse exciting topological circuit working is at continuous current mode, described sawtooth waveforms adopts load weight sawtooth waveforms frequency switching circuit (4) of different frequency work, wherein,
Described saw-toothed wave generator (2) is by the first resistance (R1), 3rd resistance (R3) and the 3rd electric capacity (C3) composition, wherein, one termination reference voltage (VREF) end of the first resistance (R1), the other end is connected to " 4 " pin of the pulse width modulating chip (U1) in described pwm control circuit (1) and is connected by the output of the 14 resistance (R14) with the first comparator (U2) in described frequency switching circuit (4), also open the emitter of triode (Q1) and one end of the 3rd resistance (R3) in synchronous circuit (3) by the 3rd electric capacity (C3) and described zero current detection to connect, the other end ground connection of the 3rd resistance (R3),
Described zero current detection is opened synchronous circuit (3) and is formed primarily of the second comparator (U3) and triode (Q1), wherein, the input in the same way of the second comparator (U3) is access to reference voltage (VREF) end, also by the earth of the 12 resistance (R12) with the 6th electric capacity (C6) by the 11 resistance (R11); Its reverse input end is by the ZCD end of the flyback winding of the 8th resistance (R8), the second diode (D2) external power transformer, also connect " 6 " pin of described pulse width modulating chip (U1) by the 9th resistance (R9), the 3rd diode (D3), again by the 15 resistance (R15) ground connection; Its output lead up to the tenth resistance (R10) be access to reference voltage (VREF) end, the 4th electric capacity (C4) of separately leading up to is connected to the base stage of triode (Q1); The collector electrode of triode (Q1) connects reference voltage (VREF) end;
Described load weight sawtooth waveforms frequency switching circuit (4) is formed primarily of the first comparator (U2), its in the same way input lead up to the 5th resistance (R5) be connected to reference voltage (VREF) end, separately lead up to the 6th resistance (R6) ground connection, also leading up to the 7th resistance (R7) and the first diode (D1) is connected to its output; Its reverse input end is access to " 1 " pin of described pulse width modulating chip (U1) by the 13 resistance (R13);
The model of described pulse width modulating chip (U1) is UC3842.
2. the interrupted and critical conduction mode of flyback topologies according to claim 1 interlocks the PWM module occurred, it is characterized in that: described load weight sawtooth waveforms frequency switching circuit (4), according to load weight, can make described sawtooth waveforms be operated in 80kHZ-100kHZ frequency range, 40kHZ-60kHZ frequency range respectively.
3. the interrupted and critical conduction mode of flyback topologies according to claim 1 and 2 interlocks the PWM module occurred, it is characterized in that: the model of described first comparator (U2) and the second comparator (U3) is LM393.
4. the interrupted and critical conduction mode of flyback topologies according to claim 1 and 2 interlocks the PWM module occurred, it is characterized in that: described triode (Q1) model is MMBT3904LT1.
CN201310160499.8A 2013-05-03 2013-05-03 PWM (pulse-width modulation) module capable of alternatively generating interruption mode and critical mode in flyback topology Expired - Fee Related CN103236780B (en)

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