CN103236475A - Method for bridging electrodes of LED light-emitting units isolated by deep trenches - Google Patents
Method for bridging electrodes of LED light-emitting units isolated by deep trenches Download PDFInfo
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- CN103236475A CN103236475A CN2013101311662A CN201310131166A CN103236475A CN 103236475 A CN103236475 A CN 103236475A CN 2013101311662 A CN2013101311662 A CN 2013101311662A CN 201310131166 A CN201310131166 A CN 201310131166A CN 103236475 A CN103236475 A CN 103236475A
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Abstract
The invention provides a method for bridging electrodes of LED light-emitting units isolated by deep trenches. The method is specifically implemented for large LED chips with a plurality of light-emitting units isolated by deep trenches. The method includes steps of depositing first passivation layers; performing spin-coating for liquid insulating materials to fill the liquid insulating materials in the isolation trenches among the light-emitting units and forming a flat film on the surface of a chip; curing the liquid insulating materials at a high temperature; etching the film formed by the insulating materials so as to expose the passivation layers on surfaces of the light-emitting units and enabling surfaces, which are positioned at the isolation trenches, of the insulating materials to be flush with surfaces of the passivation layers; depositing second passivation layers to seal parts, which are positioned at the isolation trenches, of the insulating materials in the passivation layers; and etching the passivation layers and manufacturing electrode grooves; depositing metal, manufacturing the electrodes by a lift-off technology and manufacturing connecting bridges of the electrodes on upper surfaces of the passivation layers. The method has the advantages the electrode bridging yield is increased, and the method is applicable to light-emitting unit structures with rectangular, regularly trapezoidal or reversely trapezoidal cross sections, and is particularly applicable to isolation trenches with high depth-to-width ratios.
Description
Technical field
The present invention relates to have the large scale led chip field of a plurality of luminescence units of deep trench isolation, be specifically related to the electrode bridging method of the LED luminescence unit of deep trench isolation.
Background technology
Along with the development of semiconductor lighting industry, high-power LED chip becomes the main flow of technical research.Current density for fear of the high-power LED chip luminescent layer is excessive, and can adopt increases the long-pending way of chip light emitting aspect, that is uses the large scale led chip.But the size of single led chip is more big, and the luminescent layer current density just more is difficult to even distribution, and this makes that the efficient lighting area of the large scale led chip of optimal design does not diminish, and has reduced the electric current injection efficiency of chip.In addition, the size of single led chip is more big, and the escape path of light during from the chip internal outgoing is more long, because the absorption of semi-conducting material, loss is also just more big, has reduced the light extraction efficiency of chip.For improving the luminous efficiency of large scale led chip, comprise electric current injection efficiency and light extraction efficiency, an effective way is divided into large-sized led chip a plurality of undersized luminescence units exactly.
For the large scale led chip that possesses a plurality of luminescence units, be the deep trench that is etched to substrate between luminescence unit and the luminescence unit, to realize the insulation on the electricity.The degree of depth of groove is the thickness of whole epitaxial loayer, generally is 5 μ m ~ 8 μ m.Form single high-power LED chip by the electrode bridge joint with series connection or form in parallel between each luminescence unit.Be luminescence unit series connection or a kind of traditional electrode bridging structure in parallel of large scale led chip as shown in figures 1 and 3, electrode connects bridge will cross over darker isolated groove.Because the metal electrode in the led chip technology adopts electron beam evaporation technique to deposit usually, the covering power of step sidewall is relatively poor, so the metal electrode of dark isolated groove sidewall ruptures easily, make series connection or luminescence unit in parallel open circuit, cause the product yield lower.
For improving the yield that electrode connects the more dark isolated groove of spanning, the solution of existing bibliographical information mainly contains two kinds.A kind of scheme is that the preparation cross section is the luminescence unit structure of trapezoid, and the gradient of isolated groove sidewall is comparatively mild, and metallic film can be realized good covering, thereby improves stability and reliability that electrode connects bridge.This scheme will reduce the luminescent layer area of large scale led chip.Another kind of scheme is to adopt chemico-mechanical polishing (CMP) technology.At first using plasma strengthens chemical vapour deposition technique (PECVD) deposition SiO
2, thicker SiO
2Layer covers the entire chip surface isolated groove is filled up, but depression occurs on isolated groove.Adopt the CMP technology to rough SiO then
2Polish on the surface, makes the semi-conducting material on luminescence unit surface expose, and the SiO at isolated groove place
2The surface and the flush of luminescence unit.Because CMP causes physical damnification to the semi-conducting material on luminescence unit surface inevitably, the electric property of led chip and optical property have decline to a certain degree.
Summary of the invention
The present invention is directed to the large scale led chip of a plurality of luminescence units with deep trench isolation, the electrode bridging method of the LED luminescence unit of open deep trench isolation.
For achieving the above object, the technical solution adopted in the present invention is:
The electrode bridging method of the LED luminescence unit of deep trench isolation is applicable to the large scale led chip of a plurality of luminescence units with deep trench isolation, and it comprises the steps:
(A) at the upper surface of luminescence unit, sidewall and the bottom deposition ground floor passivation layer of isolated groove;
(B) spin coating liquid insulating material, the isolated groove between the luminescence unit is filled up by liquid insulating material, and forms smooth insulating material film on the entire chip surface;
(C) at high temperature, liquid insulating material changes into solid-state;
(D) dry etching or wet etching insulating material film make the ground floor passivation layer of luminescence unit surface expose, and the flush of the ground floor passivation layer of the surface of isolated groove place insulating material and luminescence unit surface;
(E) deposition second layer passivation layer is enclosed in the insulating material at isolated groove place between ground floor passivation layer and the second layer passivation layer;
(F) for the insulated type substrate large scale led chip of a plurality of luminescence unit serial or parallel connections, above the position at p-type electrode and n type electrode place, adopt photoetching process and dry etching or wet etching ground floor passivation layer and second layer passivation layer, the slot electrode of p-type electrode and n type electrode is held in preparation; For the conductivity type substrate large scale led chip of a plurality of luminescence unit parallel connections, above the position at p-type electrode place, adopt photoetching process and dry etching or wet etching ground floor passivation layer and second layer passivation layer, the slot electrode of p-type electrode is held in preparation;
(G) plated metal, and adopt lift-off technology, in slot electrode, prepare electrode, prepare electrode at second layer passivation layer upper surface simultaneously and connect bridge.
Further optimize, described preparation process (A) and (E) in the ground floor passivation layer and the thin-film material of second layer passivation layer be SiO
2, a kind of among SiN, the SiON, the preparation method is a kind of in plasma enhanced CVD (PECVD), high-density plasma chemical vapor deposition (HP-PECVD), low-pressure chemical vapor deposition (LPCVD) and the ald (ALD), and the preparation raw material comprise SiH
4, N
2O, Si (OC
2H
5)
4, O
2, O
3, SiH
2Cl
2, NH
3, N
2, Ar more than one.
Further optimize, the thickness of ground floor passivation layer is 200nm-700nm, and the thickness of second layer passivation layer is 500nm-1000nm.
Further optimize, the liquid insulating material in the described preparation process (B) satisfies following feature: have viscosity, in the surfacing of non-planar surface spin coating rear film; Change in volume before and after solidifying is less than 30%; The curing back is higher than 70% to the transmitance of the emission wavelength of led chip.This fluid-like state insulating material includes but not limited to polyimides, BCB(benzocyclobutene), the SOG(spin-coating glass).
Further optimize, described preparation process (C) specifically comprises: the chip of spin coating liquid insulating material film places air, oxygen, inert gas or vacuum environment baking, and baking temperature is room temperature to 1000 ℃, and the time is 1 minute to 3 hours; The baking one or many, the temperature and time of each baking is identical or inequality.
Further optimize, in the dry etching or wet etching course of described preparation process (D), the thickness of insulating material film reduces equably.
Further optimize, the metal material that deposits in the described preparation process (G) is more than one among Cr, Pt, Ni, Ti, Al, Au, the Ag, and the preparation method is more than one in electron-beam evaporation, magnetron sputtering, change plating, the plating.
Compared with prior art, the invention has the beneficial effects as follows:
1, the present invention uses the dark isolated groove between the filling insulating material luminescence unit, electrode is connected the deep trench (thickness of whole epitaxial loayer that spanning is got over, about 5 μ m ~ 8 μ m) be converted into the shallow trench (degree of depth of platform structure, that is n type electrode daylight opening DLO is from the degree of depth of p-type electrode table top, about 1 μ m ~ 1.5 μ m), perhaps even curface has improved the yield of electrode bridge joint.
2, spin coating liquid insulating material of the present invention is filled the isolated groove between the luminescence unit, is applicable to that cross section is rectangle, trapezoid or the trapezoidal luminescence unit structure of falling, and is specially adapted to the isolated groove of high-aspect-ratio.
3, the insulating material behind the hot setting has been reduced the requirement of insulating material to moisture pick-up properties, insulation property by ground floor passivation layer and the sealing of second layer passivation layer among the present invention.
4, the preparation technology who is connected bridge with traditional electrode compares, and the present invention only need increase spin coating, curing and the etching technics of insulating material, and step is simple, and with existing led chip preparation technology compatibility.
Description of drawings
Fig. 1 has in the insulated type substrate large scale led chip of a plurality of luminescence units series connection of deep trench isolation, the cross sectional representation of traditional electrode bridging structure.
Fig. 2 a ~ Fig. 2 g has in the electrode bridge termination process of insulated type substrate large scale led chip of a plurality of luminescence units series connection of deep trench isolation, the chip cross sectional representation of each step correspondence, wherein:
Fig. 2 a is the cross sectional representation of deposition ground floor passivation layer;
Fig. 2 b is the cross sectional representation of spin coating liquid insulating material;
Fig. 2 c is the cross sectional representation that insulating material solidifies;
Fig. 2 d is the cross sectional representation of etching insulating material film;
Fig. 2 e is the cross sectional representation of deposition second layer passivation layer;
Fig. 2 f be the preparation slot electrode cross sectional representation;
Fig. 2 g is the preparation electrode is connected bridge with electrode cross sectional representation.
Fig. 3 has in the conductivity type substrate large scale led chip of a plurality of luminescence unit parallel connections of deep trench isolation, the cross sectional representation of traditional electrode bridging structure.
Fig. 4 a ~ Fig. 4 g has in the electrode bridge termination process of conductivity type substrate large scale led chip of a plurality of luminescence unit parallel connections of deep trench isolation, the chip cross sectional representation of each step correspondence, wherein:
Fig. 4 a is the cross sectional representation of deposition ground floor passivation layer;
Fig. 4 b is the cross sectional representation of spin coating liquid insulating material;
Fig. 4 c is the cross sectional representation that insulating material solidifies;
Fig. 4 d is the cross sectional representation of etching insulating material film;
Fig. 4 e for deposition second layer passivation layer cross sectional representation;
Fig. 4 f is the cross sectional representation of preparation slot electrode;
Fig. 4 g for the preparation electrode be connected with electrode bridge cross sectional representation.
Among the figure, 1, substrate, 2, resilient coating, 3, n type semi-conducting material, 4, the multiple quantum well light emitting layer, 5, the p-type semi-conducting material, 6, current extending, 7, passivation layer, 8, the p-type electrode, 9, n type electrode, 10, electrode connects bridge, 11, luminescence unit, 12, isolated groove, 13, the ground floor passivation layer, 14, insulating material, 15, second layer passivation layer, 16, slot electrode.
Embodiment
Below in conjunction with accompanying drawing concrete enforcement of the present invention is described further, but enforcement of the present invention and protection range are not limited thereto.
For the insulated type substrate large scale led chip of a plurality of luminescence unit series connection with deep trench isolation, traditional electrode bridging structure as shown in Figure 1.Substrate 1 is sapphire insulation section bar material, and epitaxial loayer is made up of resilient coating 2, n type semi-conducting material 3, multiple quantum well light emitting layer 4, p-type semi-conducting material 5, current extending 6, and the surface coverage of epitaxial loayer has passivation layer 7.When a plurality of luminescence units were connected mutually, the n type electrode 9 of previous luminescence unit was connected bridge 10 series connection with the p-type electrode 8 of a back unit by electrode.For realizing the insulation on the electricity, the isolated groove 12 between the luminescence unit 11 needs etching until substrate.The degree of depth of isolated groove 12 is the thickness of whole epitaxial loayer, generally is 5 μ m ~ 8 μ m.Because metal electrode adopts electron beam evaporation technique to deposit usually, the covering power of step sidewall is relatively poor, so the metal electrode of isolated groove 12 sidewalls ruptures easily, makes the luminescence unit of series connection open circuit.
Use electrode bridging method disclosed by the invention, electrode can be connected gash depth that spanning gets over is reduced to platform structure from the thickness (about 5 μ m ~ 8 μ m) of epitaxial loayer the degree of depth (that is n type electrode daylight opening DLO from the degree of depth of p-type electrode table top, about 1 μ m ~ 1.5 μ m).Example is shown in Fig. 2 a to Fig. 2 g, and the sidewall inclination angle of the isolated groove between the luminescence unit is less than 90
oThis structure can be corroded isolated groove by hot acid and be obtained, and wherein hot acid is that temperature is 100 ℃ ~ 400 ℃ dense H
2SO
4With dense H
3PO
4Mixed solution.After the preparation of platform structure and isolated groove was finished, the preparation process that electrode and electrode connect bridge was as follows.(A) adopt PECVD to deposit the SiO of 400nm on the surface of epitaxial loayer
2Ground floor passivation layer 13 is shown in Fig. 2 a.(B) use spin coating equipment with liquid insulating material 14 BCB(Benzocyclobutene, benzocyclobutene) is coated in chip surface, and on 60 ℃ ~ 100 ℃ hot plate soft roasting (temperature and time depends on film thickness), shown in Fig. 2 b, isolated groove between the luminescence unit is filled up by BCB, and forms flat film on the entire chip surface.(C) the nitrogen alloying furnace that fills of chip being put into 250 ℃ toasted 1 hour, and shown in Fig. 2 c, the thickness after BCB solidifies slightly reduces.(D) use plasma clean machine engraving erosion BCB, process gas O
2/ CF
4Flow-rate ratio be 4:1 ~ 10:1, shown in Fig. 2 d, the SiO of luminescence unit upper surface
2Passivation layer exposes, and causes thickness to reduce because being subjected to etching; And O
2/ CF
4Plasma to the etch rate of BCB much larger than to SiO
2Etch rate, so SiO of the surface of the BCB of isolated groove place and n type electrode place table top
2The flush of passivation layer.(E) adopt PECVD to deposit the SiO of 600nm
2Second layer passivation layer 15, shown in Fig. 2 e, BCB is closed in SiO fully
2Passivation layer inside.(F) adopt photoetching process, prepare the photoresist mask at chip surface, and use BOE(HF/NH
4The F mixed solution) corrosion SiO
2Layer, the slot electrode 16 of p-type electrode and n type electrode is held in preparation, shown in Fig. 2 f; (G) adopt electron-beam evaporation Cr/Pt/Au metal electrode, and the employing lift-off technology, prepare p-type electrode 8, n type electrode 9 and electrode simultaneously and connect bridge 10, shown in Fig. 2 g, electrode connects the platform structure that bridge only need be crossed over about 1 μ m ~ 1.5 μ m, has improved the yield of electrode bridge joint.
For the conductivity type substrate large scale led chip of a plurality of luminescence unit parallel connections with deep trench isolation, traditional electrode bridging structure as shown in Figure 3.Substrate 1 is conductivity type material such as carborundum, gallium nitride, and epitaxial loayer is made up of resilient coating 2, n type semi-conducting material 3, multiple quantum well light emitting layer 4, p-type semi-conducting material 5, current extending 6, and the surface coverage of epitaxial loayer has passivation layer 7.8 preparations of p-type electrode are at the upper surface of current extending 6, and 9 preparations of n type electrode are at the lower surface of substrate 1.The p-type electrode 8 of luminescence unit 11 connects bridge 10 parallel connections by electrode, and the degree of depth of isolated groove 12 is the thickness of whole epitaxial loayer, generally is 5 μ m ~ 8 μ m.The metal electrode of isolated groove 12 sidewalls ruptures easily, makes luminescence unit in parallel open circuit.Entire chip has only a n type electrode, does not exist electrode to connect the problem that spanning is got over isolated groove.
Use electrode bridging method disclosed by the invention, electrode can be connected the gash depth that spanning gets over and be down to flat surface from the thickness (about 5 μ m ~ 8 μ m) of epitaxial loayer.Example is shown in Fig. 4 a to Fig. 4 g, and the isolated groove between the luminescence unit adopts inductively coupled plasma (ICP) etching, and the inclination angle of trenched side-wall is about 90
oAfter the isolated groove preparation was finished, the preparation process that p-type electrode and electrode connect bridge was as follows.(A) adopt PECVD to deposit the SiO of 400nm on the surface of epitaxial loayer
2Ground floor passivation layer 13 is shown in Fig. 4 a.(B) use spin coating equipment with liquid insulating material 14 SOG(Spin-On-Glass, spin-coating glass) be coated in chip surface, shown in Fig. 4 b, the isolated groove between the luminescence unit is filled up by SOG, and forms flat film on the entire chip surface.(C) chip is successively placed on the hot plate baking 1 minute of 80 ℃, 150 ℃ and 250 ℃, puts into 425 ℃ oxygenation alloying furnace annealing 2 hours again, liquid SOG is converted into solid-state SiO
2, it is about 10% that film thickness reduces, shown in Fig. 4 c.(D) use BOE(HF/NH
4The F mixed solution) corrosion SiO
2Film, shown in Fig. 4 d, the SiO of luminescence unit upper surface
2Ground floor passivation layer 13 exposes, and causes thickness slightly to reduce because being subjected to corrosion; SiO on the surface of the SOG of isolated groove place and the luminescence unit
2The flush of ground floor passivation layer 13.(E) adopt PECVD to deposit the SiO of 600nm
2Second layer passivation layer 15, shown in Fig. 4 e, SOG is closed in SiO fully
2Passivation layer inside.(F) adopt photoetching process, prepare the photoresist mask at chip surface, and use BOE(HF/NH
4The F mixed solution) corrosion SiO
2Layer, the slot electrode 16 of p-type electrode is held in preparation, shown in Fig. 4 f; (G) adopt electron-beam evaporation Cr/Pt/Au metal electrode, and adopt lift-off technology, prepare p-type electrode 8 and electrode simultaneously and connect bridge 10, shown in Fig. 4 g, electrode connects the bridge preparation at smooth SiO
2The upper surface of passivation layer has improved the yield of electrode bridge joint.
Claims (7)
1. the electrode bridging method of the LED luminescence unit of deep trench isolation is applicable to it is characterized in that the large scale led chip of a plurality of luminescence units with deep trench isolation comprising the steps:
(A) at the upper surface of luminescence unit, sidewall and the bottom deposition ground floor passivation layer of isolated groove;
(B) spin coating liquid insulating material, the isolated groove between the luminescence unit is filled up by liquid insulating material, and forms smooth insulating material film on the entire chip surface;
(C) at high temperature, liquid insulating material changes into solid-state;
(D) dry etching or wet etching insulating material film make the ground floor passivation layer of luminescence unit surface expose, and the flush of the ground floor passivation layer of the surface of isolated groove place insulating material and luminescence unit surface;
(E) deposition second layer passivation layer is enclosed in the insulating material at isolated groove place between ground floor passivation layer and the second layer passivation layer;
(F) for the insulated type substrate large scale led chip of a plurality of luminescence unit serial or parallel connections, above the position at p-type electrode and n type electrode place, adopt photoetching process and dry etching or wet etching ground floor passivation layer and second layer passivation layer, the slot electrode of p-type electrode and n type electrode is held in preparation; For the conductivity type substrate large scale led chip of a plurality of luminescence unit parallel connections, above the position at p-type electrode place, adopt photoetching process and dry etching or wet etching ground floor passivation layer and second layer passivation layer, the slot electrode of p-type electrode is held in preparation;
(G) plated metal, and adopt lift-off technology, in slot electrode, prepare electrode, prepare electrode at second layer passivation layer upper surface simultaneously and connect bridge.
2. electrode bridging method as claimed in claim 1, it is characterized in that described preparation process (A) and (E) in the ground floor passivation layer and the thin-film material of second layer passivation layer be SiO
2, a kind of among SiN, the SiON, the preparation method is a kind of in plasma enhanced CVD (PECVD), high-density plasma chemical vapor deposition (HP-PECVD), low-pressure chemical vapor deposition (LPCVD) and the ald (ALD), and the preparation raw material comprise SiH
4, N
2O, Si (OC
2H
5)
4, O
2, O
3, SiH
2Cl
2, NH
3, N
2, Ar more than one.
3. electrode bridging method as claimed in claim 1, the thickness that it is characterized in that the ground floor passivation layer is 200nm-700nm, the thickness of second layer passivation layer is 500nm-1000nm.
4. electrode bridging method as claimed in claim 1 is characterized in that the liquid insulating material in the described preparation process (B), satisfies following feature: have viscosity, in the surfacing of non-planar surface spin coating rear film; Change in volume before and after solidifying is less than 30%; The curing back is higher than 70% to the transmitance of the emission wavelength of led chip.
5. electrode bridging method as claimed in claim 1, it is characterized in that described preparation process (C) specifically comprises: the chip of spin coating liquid insulating material film places air, oxygen, inert gas or vacuum environment baking, baking temperature is room temperature to 1000 ℃, and the time is 1 minute to 3 hours; The baking one or many, the temperature and time of each baking is identical or inequality.
6. electrode bridging method as claimed in claim 1 is characterized in that the thickness of insulating material film reduces equably in the dry etching or wet etching course of described preparation process (D).
7. as each described electrode bridging method of claim 1 ~ 6, it is characterized in that the metal material that deposits in the described preparation process (G) is more than one among Cr, Pt, Ni, Ti, Al, Au, the Ag, the preparation method is more than one in electron-beam evaporation, magnetron sputtering, change plating, the plating.
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