CN103218206B - The pre-jump method of instruction branches and system - Google Patents
The pre-jump method of instruction branches and system Download PDFInfo
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- CN103218206B CN103218206B CN201210015287.6A CN201210015287A CN103218206B CN 103218206 B CN103218206 B CN 103218206B CN 201210015287 A CN201210015287 A CN 201210015287A CN 103218206 B CN103218206 B CN 103218206B
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Abstract
The pre-jump method of instruction branches and a system, the method comprises: when judging according to present instruction to comprise jump instruction in subsequent instructions, according to the result of present instruction, judges whether described jump instruction performs redirect; If judged result for performing redirect, then determines jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after performing by original order; When the jump location in described stack top portion is consistent with pending instruction address, then eject jump location and the redirect destination in described stack top portion, using the described redirect destination of ejecting as the address of next instruction, when the jump location in described stack top portion and pending instruction address inconsistent time, then using pending instruction address as the address of next instruction; Perform according to the address reading command of next instruction described.
Description
Technical field
The present invention relates to a kind of pre-jump method and system of instruction branches, particularly a kind of pre-jump method based on mode stack and system.
Background technology
In the operational process of microprocessor, the appearance of jump instruction is very frequent, therefore the processing mode of jump instruction is affected significantly to the performance of the microprocessor worked in a pipeline fashion.The general utility functions of jump instruction are: if meet a certain condition, then jump to a certain destination, and this condition is normally produced by condition generation instruction (such as comparison order CMP) for the condition generating redirect generation before this jump instruction.Because the working method of streamline is: in the starting point reading command of streamline, the result of instruction is produced at the terminal of streamline, therefore, if perform instruction successively according to the natural order of instruction, just there will be such problem: when condition generates the afterbody S of instruction at streamline
nwhen bearing results, jump instruction is in penultimate stage S
n-1, being also read out by each bar instruction of natural order arrangement and being in the S of streamline successively after jump instruction
1-S
n-2level, now, if the result that jump instruction generates instruction according to condition judges that redirect condition meets, need redirect occurs, that is no longer perform instruction according to natural order, but the instruction of the redirect destination of jump instruction will be performed, so, the each bar instruction before read just must cancel, and causes the waste of pipeline resource.
At present, solution to this problem mainly comprises and postpones groove technology and jump forecasting technology.
The principle postponing groove technology is, jump instruction is shifted to an earlier date, some irrelevant with redirect before jump instruction (is namely postponed slot length, be generally the regular length of 2 or 3) instruction be placed on jump instruction after, like this, regardless of the result that jump instruction judges, the instruction irrelevant with redirect after being transferred to jump instruction can sequentially perform.The subject matter postponing groove technology is, make instruction reorder not nature, and, it is very inflexible that this fixed length postpones groove, when lacking suitable interconvertible instruction near jump instruction, delay slot length can only be met by inserting blank operation NOP, in fact, can only form delay groove by NOP time most of, this causes the waste of pipeline resource equally.
The principle of jump forecasting technology is, should perform which bar instruction, and according to the result reading command guessed, if conjecture mistake, then the false command of having read all cancelled according to after a lot of historical record conjecture jump instruction.The problem of this jump forecasting technology is that its logic is very complicated, and hardware cost is remarkable, and some to have read the instruction even performed be very difficult clean cancellation, can only be forced to postpone performing, therefore greatly have impact on the performance of microprocessor.
Summary of the invention
The present invention proposes a kind of pre-jump method and system of instruction branches, which overcome the problems referred to above of the prior art, do not postpone the restriction of groove by fixed length, also cancelling without the need to introducing, improve compiling dirigibility and pipeline efficiency, reducing design complexities.Method and system according to the present invention, based on mode stack, is particularly conducive to the optimization of loop nesting statement.
According to an aspect of the present invention, propose a kind of pre-jump method of instruction branches, the method comprises:
Step S11: when judging according to present instruction to comprise jump instruction in subsequent instructions, according to the result of present instruction, judges whether described jump instruction performs redirect;
Step S12: if judged result is for performing redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after performing by original order;
Step S13: when the jump location in described stack top portion is consistent with pending instruction address, then eject jump location and the redirect destination in described stack top portion, using the described redirect destination of ejecting as the address of next instruction, when the jump location in described stack top portion and pending instruction address inconsistent time, then using pending instruction address as the address of next instruction;
Step S14, performs according to the address reading command of next instruction described.
Preferably, step S12 is realized by pre-jump instruction, the result that this pre-jump instruction generates instruction based on condition operates, if the result that condition generates instruction is designated as execution redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after order execution.
Preferably, describedly condition field, jump location field and redirect destination field is comprised with jump instruction.
Preferably, the address of pending instruction is indicated by programmable counter.
According to a further aspect in the invention, propose a kind of pre-jump system of instruction branches, this system comprises:
For storing the stack of pre-redirect data;
Pre-redirect module, the output of its input end link order processing module, its input end connects the input of described stack, when the Output rusults instruction jump instruction below of command process module will perform redirect, the jump location of described jump instruction and redirect destination will be pressed into described stack as redirect data;
Instruction address comparison module, the jump location at the top of its more described stack and pending instruction address, when the jump location in described stack top portion is consistent with pending instruction address, then eject the output as instruction address comparison module of the jump location in described stack top portion and redirect destination, when the jump location in described stack top portion and pending instruction address inconsistent time, then using described pending instruction address as the output of instruction address comparison module;
Instruction fetch module, according to the output reading command of instruction address comparison module;
Command process module, processes the instruction that instruction fetch module reads, Output rusults.
Preferably, described pending instruction address is indicated by programmable counter.
Preferably, instruction processing unit module carries out Instruction decoding, read operation number, arithmetic operation.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of the pre-jump method of a kind of instruction branches according to an embodiment of the invention;
Fig. 2 is the schematic diagram of a pre-jump instruction;
Fig. 3 is the structural drawing of the pre-jump system of a kind of instruction branches according to an embodiment of the invention;
Fig. 4 is a preferred embodiment of pre-jump system of the present invention.
Embodiment
The present invention proposes a kind of pre-jump method and system of instruction branches, its ultimate principle is: when will there is redirect after judging, just determine jump location and the redirect destination of the redirect that will occur, thus complete skip operation when instruction proceeds to this jump location.
In fact, any one redirect with good conditionsi in program occurs having redirect after all just can knowing when condition generates." for " such as standard circulates, just can know at loop start, be certain to face the judgement of whether redirect later, even according to the current value of loop variable, just can know that future wants redirect, method according to the present invention learn following want redirect in just indicate where redirect, where jump, when estimating the position of redirect before instruction proceeds to, the skip operation estimated before just performing.
Pre-jump method of the present invention is based on mode stack, its ultimate principle is some the redirects that will occur after can prejudging, by these redirects pop down in order, when arriving each jump location, these redirects are successively played stack, this mode stack (namely, pattern first-in last-out) mate with the pattern of nested circulation, be therefore specially adapted to multinest circulation.
Fig. 1 is the process flow diagram of the pre-jump method of a kind of instruction branches according to an embodiment of the invention, and it comprises:
Step S11: when judging according to present instruction to comprise jump instruction in subsequent instructions, according to the result of present instruction, determines whether described jump instruction performs redirect;
Step S12: if judged result is for performing redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after performing by original order;
Step S13: when the jump location in described stack top portion is consistent with pending instruction address, then eject jump location and the redirect destination in described stack top portion, using the described redirect destination of ejecting as the address of next instruction, when the jump location in described stack top portion and pending instruction address inconsistent time, then using pending instruction address as the address of next instruction;
Step S14, performs according to the address reading command of next instruction described.
Wherein, step S12 realizes by pre-jump instruction PJ, the function of this pre-jump instruction PJ is: the result generating instruction based on condition operates, if the result that condition generates instruction is designated as execution redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after order execution.
Fig. 2 is the schematic diagram of a pre-jump instruction.Wherein this pre-jump instruction mainly comprises condition field #C, jump location field B and redirect destination field A.Condition field #C defines the condition that redirect occurs, and #C is generally constant, may correspond to the sign position FLAG generating instruction generation in condition.Jump location field B indicates in performed instruction, the position at " redirect " This move place, and namely indicate the problem of " where redirect ", this position is associated with the instruction address of the instruction that execution " redirect " operates.Redirect destination field A indicates execution " redirect " when operating, and the branch address of instruction, namely indicates the problem of " redirect where ".
Step S13 can realize compared with the instruction address that the jump location in stack top portion and programmable counter PC indicated, the address that wherein program technic device PC indicates is exactly the address of pending instruction, if the jump location of stack top is consistent with the instruction address that PC indicates, then indicate that instruction has run to the position that redirect occur, then eject jump location and the redirect destination in stack top portion, the instruction branches address of answering " redirect " to arrive when this redirect destination performs redirect exactly, according to this instruction branches address reading command, just complete this redirect.
Because the working mechanism of stack is " first-in last-out ", therefore in multilayer nest recursion instruction, the redirect of outer loop first pushes on, and pushes on after the redirect of interior loop, after this inevitable jump location first moving to interior loop of instruction, thus the interior loop redirect at top is popped.When instruction operation is to the jump location of outer loop, then outer loop redirect is popped, thus complete the circulation of whole multilayer nest.
Method of the present invention is described in detail below for the double nested circulation of standard.
Below the c language codes that two of standard recirculates:
Wherein
*p++=q; It is schematic loop body.
The method that fixed length (being assumed to 3) traditionally postpones groove compiles, and obtains following assembly instruction, and total execution instruction number is 65 (Inner eycle 5x2 bar, outer circulation 16x4 bars):
MOV i，0 //i＝0
LOOPi: // outer circulation starting point
MOV j，0 //j＝0
LOOPj: // Inner eycle starting point
CMP J, 1 // compare j and 2-1
JLT LOOPj // redirect when j=0
ST q, [p], 1 // postpone groove 1:*p++=q
ADD j, 1 // postpone groove 2:j++
NOP // delay groove 3:
// Inner eycle terminal
CMP i, 3 // compare i and 4-1
JLT LOOPi // at i=0,1, circulate when 2
ADD i, 1 // postpone groove 1:i++
NOP // delay groove 2
NOP // delay groove 3
// outer circulation terminal
Owing to have employed the fixed length delay groove that length is 3, after Inner eycle jump instruction JLT, loop body instruction ST and loop variable j is added 1 instruction ADD as delay groove 1 and delay groove 2, the instruction postponing groove is suitable as owing to there is no other near JLT, therefore NOP instruction is inserted as delay groove 3, in outer circulation, then need two NOP instructions as delay groove 2 and postpone groove 3, causing the waste of the tediously long of instruction and pipeline resource.
Contrastingly, according to method of the present invention, the instruction generated based on above-mentioned c language program is as follows: wherein always performing instruction strip number is 49 (Inner eycle 4x2 bar, outer circulation 12x4 bars):
MOV i，0 //i＝0
LOOPi: // outer circulation starting point
CMP i, 3 // compare i and 4-1
PJ [LT] ENDi, LOOPi // at i=0,1, circulate when 2
MOV j，0 //j＝0；
LOOPj: // Inner eycle starting point
CMP j, 1 // compare j and 2-1
PJ [LT] ENDj, LOOPj // circulate when j=0
ST q，[p]，1 //*p++＝q；
ADD j，1 //j++；
ENDj: // Inner eycle terminal
ADD i，1 //i++；
ENDj: // outer circulation terminal
Loop start place outside, due to i=0, CMP instruction is judged redirect to occur at outer circulation destination county, jump to outer circulation starting point, here the effect that condition generates instruction is played in CMP instruction, " outer circulation terminal " is exactly jump location, " outer circulation starting point " is exactly redirect destination, therefore, after CMP instruction insert a pre-jump instruction PJ, its effect be when satisfy condition [LT] time (this refers to i=0,1,2), by jump location " outer circulation terminal " ENDi, and redirect destination " outer circulation starting point " LOOPi pop down.
At Inner eycle starting point place, due to j=0, CMP instruction is judged redirect to occur at Inner eycle destination county, jump to Inner eycle starting point, therefore, after CMP instruction insert a pre-jump instruction PJ, its effect be when satisfy condition [LT] time (this refers to j=0), by jump location " Inner eycle terminal " ENDj, and redirect destination outer circulation starting point LOOPj pop down.
Meanwhile, the jump location of indicated pending instruction address and stack top point compares by programmable counter PC in real time, when proceeding to Inner eycle terminal ENGj, PC indicates pending instruction address to correspond to ENGj, and the jump location of stack top also corresponds to ENGj, the two is consistent, therefore by ENGj and LOOPj bullet stack, instruction process system reads this redirect destination, i.e. instruction branches address LOOPj, instruction sequence jumps to Inner eycle starting point, completes a redirect in Inner eycle.
Now, because Inner eycle jump location ENGj and Inner eycle redirect destination LOOPj plays stack, the data that stack top is deposited are outer circulation jump location ENGi and outer circulation redirect destination LOOPi.
Next, due to j=1, no longer meet the condition of pre-jump instruction, therefore no longer carry out push operation, instruction sequences proceeds to outer circulation terminal, now, the instruction address that programmable counter PC indicates is outer circulation terminal ENDi, consistent with the jump location ENGi of stack top, instruction process system reads this redirect destination, i.e. instruction branches address LOOPi, instruction sequence jumps to outer circulation starting point, completes a redirect in outer circulation.
Next, at i=1, repeat above-mentioned outer loop process when 2, until i=3, no longer meet the condition of pre-jump instruction PJ, therefore push operation does not occur, instruction sequences is carried out, until whole nested circulation terminates.
Compiler according to the prediction to redirect, can select the position of pre-jump instruction freely.This mechanism based on stack is beneficial to the optimization of this common circulation pattern of nested circulation very much, thus greatly improves the efficiency of instruction.Method according to the present invention is equivalent to the delay groove employing selectable length, relative to the delay groove of regular length, bring great dirigibility to program, redirect condition judgment and actual branch place need not be adjacent, and increase design difficulty without the need to introducing cancels completely.When not using traditional jump forecasting technology, pre-jump method of the present invention just can obtain very high efficiency, simultaneously, pre-redirect technology of the present invention and traditional jump forecasting technology not contradiction, according to the needs of application, also can introduce the mechanism cancelled and do further to optimize.
Fig. 3 is the structural drawing of the pre-jump system of a kind of instruction branches according to an embodiment of the invention, and it comprises:
For storing the stack 301 of pre-redirect data;
Pre-redirect module 302, the output of its input end link order processing module 303, its input end connects the input of described stack 301, when the Output rusults instruction jump instruction below of command process module 303 will perform redirect, the jump location of described jump instruction and redirect destination will be pressed into described stack as redirect data 304;
Instruction address comparison module 305, the jump location at the top of its more described stack and pending instruction address 306, when the jump location in described stack top portion is consistent with pending instruction address, then eject the output as instruction address comparison module 305 of the jump location at described stack 301 top and redirect destination, when the jump location at described stack 301 top and pending instruction address 306 inconsistent time, then using described pending instruction address 306 as the output of instruction address comparison module;
Instruction fetch module 307, according to the output reading command of instruction address comparison module 305;
Command process module 303, processes the instruction that instruction fetch module 307 reads, Output rusults.
Fig. 4 is a preferred embodiment of pre-jump system of the present invention, under typical microprocessor architecture design, the instruction address of pending instruction is indicated by programmable counter PC, then this instruction address is kept in address register ITCM, order register INS reads pending instruction according to this instruction address, and corresponding decoding is carried out in instruction process system, read operation number, the operations such as computing, and obtain result, if the skip operation of jump instruction can be performed after the instruction of this result, then pre-redirect divides formwork PJM to be just pressed in stack STA by the jump location JD of described jump instruction and redirect destination JA, when the instruction address that instruction address comparison module compares programmable counter PC instruction is consistent with the jump location JD at the top of stack time, then by the jump location JD in stack top portion and redirect destination JA bullet stack, wherein redirect destination JA, namely the instruction address after redirect enters address register ITCM, order register is according to the address reading command after this redirect, and process in follow-up instruction processing unit system.
Above-described embodiment is for illustrative principle of the present invention and effect thereof, but not for limiting the present invention.Any those skilled in the art all without prejudice under spirit of the present invention and category, can modify to above-described embodiment.Therefore protection scope of the present invention, should listed by claims of the present invention.
Claims (7)
1. a pre-jump method for instruction branches, the method comprises:
Step S11: when judging according to present instruction to comprise jump instruction in subsequent instructions, according to the result of the condition generation instruction that present instruction generates, judges whether described jump instruction performs redirect;
Step S12: if judged result is for performing redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after performing by original order;
Step S13: when the jump location in described stack top portion is consistent with pending instruction address, then eject jump location and the redirect destination in described stack top portion, using the described redirect destination of ejecting as the address of next instruction, when the jump location in described stack top portion and pending instruction address inconsistent time, then using pending instruction address as the address of next instruction;
Step S14, performs according to the address reading command of next instruction described.
2. the pre-jump method of instruction branches according to claim 1, wherein, step S12 is realized by pre-jump instruction, the result that this pre-jump instruction generates instruction based on condition operates, if the result that condition generates instruction is designated as execution redirect, then determine jump location and the redirect destination of jump instruction, and by described jump location and described redirect destination press-in stack, if judged result is not for perform redirect, then the instruction after order execution.
3. the pre-jump method of instruction branches according to claim 2, wherein said pre-jump instruction comprises condition field, jump location field and redirect destination field.
4. the pre-jump method of instruction branches according to claim 1, the address of wherein pending instruction is indicated by programmable counter.
5. a pre-jump system for instruction branches, this system comprises:
For storing the stack of pre-redirect data;
Pre-redirect module, the output of its input end link order processing module, its input end connects the input of described stack, when the Output rusults instruction jump instruction below of command process module will perform redirect, the jump location of described jump instruction and redirect destination will be pressed into described stack as redirect data;
Instruction address comparison module, the jump location at the top of its more described stack and pending instruction address, when the jump location in described stack top portion is consistent with pending instruction address, then eject the output as instruction address comparison module of the jump location in described stack top portion and redirect destination, when the jump location in described stack top portion and pending instruction address inconsistent time, then using described pending instruction address as the output of instruction address comparison module;
Instruction fetch module, according to the output reading command of instruction address comparison module;
Command process module, processes the instruction that instruction fetch module reads, Output rusults.
6. the pre-jump system of instruction branches according to claim 5, wherein indicates described pending instruction address by programmable counter.
7. the pre-jump system of instruction branches according to claim 5, wherein instruction processing unit module carries out Instruction decoding, read operation number, arithmetic operation.
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| CN107665169B (en) * | 2016-07-29 | 2020-07-28 | 龙芯中科技术有限公司 | Method and device for testing processor program |
| CN109614146B (en) * | 2018-11-14 | 2021-03-23 | 西安翔腾微电子科技有限公司 | Local jump instruction fetch method and device |
| CN111061512B (en) * | 2019-12-06 | 2022-11-15 | 湖北文理学院 | Method, device and equipment for processing branch instruction and storage medium |
| CN111898120B (en) * | 2020-06-29 | 2023-10-10 | 中国科学院信息工程研究所 | Control flow integrity protection method and device |
| CN113110879B (en) * | 2021-03-31 | 2023-05-30 | 北京中科晶上科技股份有限公司 | Instruction processing method and device |
| CN113946539B (en) * | 2021-10-09 | 2024-02-13 | 深圳市创成微电子有限公司 | DSP processor and processing method of circulation jump instruction thereof |
| CN113946540B (en) * | 2021-10-09 | 2024-03-22 | 深圳市创成微电子有限公司 | DSP processor and processing method for judging jump instruction thereof |
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| CN102063370B (en) * | 2010-12-17 | 2013-10-16 | 北京控制工程研究所 | Method for extracting actual execution instruction and prefetched instruction from bus instruction flow |
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