CN103217918B - Synchronous implementation method and synchronous control device for three-phase uninterrupted power supply (UPS) parallel operation system - Google Patents
Synchronous implementation method and synchronous control device for three-phase uninterrupted power supply (UPS) parallel operation system Download PDFInfo
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Abstract
The invention discloses a synchronous implementation method and a synchronous control device for a three-phase uninterrupted power supply (UPS) parallel operation system. The synchronous control device comprises a preprocessing circuit, a master control circuit and a parallel operation communication interface circuit; in the synchronous implementation method, the master control circuit samples and detects the voltage and current signals obtained by the preprocessing circuit, the phase, frequency and amplitude of the output voltage of the UPS inverter are regulated, and bypass/inversion logic control is realized; the parallel operation communication interface circuit is used for transmitting/receiving a synchronizing signal, a bypass/inversion control signal, an inverter state signal and a bypass phase-A voltage tracking signal. According to various different operation states of the UPS, the synchronizing signal is analyzed and integrated through a digital signal processor (DSP), a pulse width modulation (PWM) control signal is transmitted, and the frequency and the phase of each UPS output voltage in the parallel operation system are controlled, so that the high-precision synchronization of the frequency and the phase of each UPS output voltage is realized.
Description
Technical field
The present invention relates to three-phase UPS(uninterrupted power source) a kind of method that parallel operation synchronously realizes, particular by the control of 32 bit DSP TMS320F2812, realize each frequency of UPS output voltage of combining system and the high-precise synchronization of phase place.
Background technology
What require high quality power supply along with important consumer and user improves constantly, and UPS is widely used.The development of all-controlling power electronics device, High Performance DSP and Advanced Control Techniques, facilitate UPS to future developments such as greenization, digitizing, intellectuality and redundant parallels, parallel operation runs and UPS electric power system can be made to facilitate dilatation and realize redundancy, substantially increases the reliability of system.And the gordian technique of parallel operation is the frequency of each UPS output voltage, the high-precise synchronization of phase place.What the application of parallel operation control method was maximum is based on active power and reactive power method, because difference in magnitude Δ V, the phase differential of the output voltage of each UPS of combining system
with meritorious circulation P
h, reactive circular power flow Q
hthere is relation.By detecting Q
h, P
has known quantity, just can in the hope of output voltage amplitude difference Δ V now, thus the amplitude of regulation output voltage; In like manner can try to achieve the phase differential of output voltage now
the phase place of regulation output voltage, realizes dividing equally of active power and reactive power, thus achieves the current sharing control of UPS.This method reliability is high, and easily, be a kind of fairly perfect also machine technology, but this algorithm is comparatively complicated, accuracy of detection requires very high in expansion.For this reason, the present invention spy proposes a kind of synchronization realizing method of comparatively easy three-phase UPS parallel computer system, and experiment result demonstrates the validity and reliability of this method.
Summary of the invention
The hardware circuit basis that the object of the invention controls in the parallel operation based on TMS320F2812 is on this, and provide synchronization realizing method and the sync control device of three-phase UPS parallel computer system, concrete technical scheme is as follows.
The synchronization realizing method of three-phase UPS parallel computer system, specifically: each UPS in combining system is equipped with the parallel operation control circuit based on TMS320F2812, detect bypass voltage signal rising edge by the CAP1 mouth (catching mouth 1) of DSP, the CAP2 mouth (catching mouth 2) of DSP detects parallel operation synchronizing signal rising edge; For two machine of any A, B in multi-machine parallel connection system, under different running status, by DSP, analysis and synthesis is carried out to synchronizing signal, send pwm signal by the T1PWM pin of DSP, regulate frequency and the phase place of every platform UPS output voltage, thus realize the synchronous of each UPS; Described different running status comprises: 1. A start, B do not open, and none-disk terminal voltage; 2. A start, B do not open, and have bypass voltage; 3. A, B machine is all started shooting, and has bypass voltage; 4. A, B machine is all started shooting, none-disk terminal voltage.
Further, in the synchronization realizing method of above-mentioned three-phase UPS parallel computer system, the analysis and synthesis of synchronizing signal specifically:
1. A machine start, B machine are not opened, and none-disk terminal voltage
Refer to accompanying drawing 2, after opening initialization, if without synchronizing signal on line synchro, the T1PWM of DSP will send out the machine square-wave signal f
rwhen the CAP2 mouth of DSP captures t0 moment rising edge, the CAP1 mouth of DSP starts to catch bypass voltage rising edge signal, CAP2 mouth starts to catch t1 moment negative edge simultaneously, after capturing, starts again to catch t2 moment rising edge, CAP1 mouth is not as captured bypass voltage rising edge signal, then conclude none-disk terminal voltage, stop the seizure of CAP1 mouth, T1PWM continues to send consistent synchronizing signal of same t0 ~ t2 moment simultaneously;
After the start of A unit 2., B machine do not open and has bypass voltage, and this state comprises two kinds:
If synchronous signal frequency is f
t, bypass voltage signal frequency is f
p,
One of state, A start, B do not open, and have bypass, capture t1' moment negative edge in the t2 moment, CAP2 mouth captures synchronizing signal after t0 moment rising edge, start to catch at t1 moment negative edge; CAP1 mouth catches by-passing signal at the rising edge in t0' moment simultaneously, after capturing rising edge, starts to catch by-passing signal at t1' moment negative edge; If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth do not capture at t1' moment negative edge yet, then can think f
rlag behind f
p, then T1PWM goes out the f of a same cycle same frequency at t2 moment follow-up supervention
t, CAP1 mouth continues to catch by-passing signal at the negative edge in t1' moment simultaneously, captures bypass at t1' negative edge, now calculate f between t2 ~ t3
pfrequency, and the phase differential ξ between t0' and t2;
State two, A start, B do not open, there is bypass, t1' moment negative edge has been captured before the t2 moment, CAP2 mouth captures synchronizing signal after t0 moment rising edge, starts to catch the negative edge in the t1 moment, and CAP1 mouth starts to catch the rising edge of by-passing signal in the t0' moment simultaneously, after capturing rising edge, start to catch the negative edge of by-passing signal at t1'; If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth captured at t1' moment negative edge, then can think f
radvanced by-passing signal frequency f
p, now calculate f
pfrequency, and the phase differential ξ between t0 and t0';
3. A machine, B machine are all started shooting, and have bypass voltage
A machine, B machine are all started shooting and after initialization, the CAP2 mouth of B machine captures negative edge signal, can confirm synchronizing signal line synchro having other machine send;
When the CAP2 mouth of B machine captures t0 moment negative edge, the T1PWM of B machine sends high level, the CAP2 mouth of B machine starts to catch t1 moment rising edge simultaneously, after capturing, B machine T1PWM sends low level, when B machine captures negative edge again, reverse level simultaneously, and the T1PWM mouth of some all after date A machines is synchronous with the signal that the T1PWM of B machine sends separately; Now, B machine can start the CAP1 mouth of treatments B machine and the signal acquisition of CAP2 mouth according to the operation method in " A unit normal then have bypass voltage "; Now, as long as have one to have by-passing signal in A machine or B machine, respective CAP1 mouth will capture identical by-passing signal, in conjunction with the identical synchronizing signal that respective CAP2 mouth captures, according to the operation method of " A unit normal then have bypass voltage ", do identical process;
4. A machine, B machine are all started shooting, and none-disk terminal voltage
Have bypass voltage before being located at the t0 moment, frequency is 50Hz; At the separated bypass voltage of t0 ~ t2, A machine, B machine are in t0 ~ t2, respective CAP1 mouth all catches less than bypass voltage negative edge, now A machine B machine can to think in combining system none-disk terminal voltage simultaneously, after the t2 moment, respective T1PWM sends the synchronizing signal of 50Hz, again sends the synchronizing signal of 50Hz after the t4 moment, several week after date, the synchronizing signal sent becomes local synchronous signal 50Hz.
The present invention also provides the sync control device of the three-phase UPS parallel computer system realizing said method, comprises the parallel operation control circuit based on TMS320F2812, and described parallel operation control circuit comprises preposing signal process circuit, governor circuit and parallel operation communication interface circuit; Preposing signal process circuit realizes DC bus current, voltage, and three-phase voltage and bypass voltage signal carry out current/voltage-converted, step-down and rectification process, obtain the d. c. voltage signal of 0 ~ 5V, is input to the inner A/D converter of DSP in governor circuit; Governor circuit major function is: to sampling and the detection of the voltage and current signal that preposing signal process circuit obtains, realize the adjustment to UPS inverter output voltage phase place, frequency and amplitude, and realize the logic control of bypass/inversion; Parallel operation communication interface circuit is used for the sending/receiving of synchronizing signal, the control signal of bypass/inversion, inverter state signal, bypass A phase voltage trace signals.
Further, described governor circuit is made up of 32 bit DSP TMS320F2812 and peripheral circuit, DSP realizes the detection to the voltage and current signal that preposing signal process circuit obtains by inner A/D converter, then realizes the adjustment to UPS inverter output voltage phase place, frequency and amplitude by the PWM mouth of DSP; DSP is connected with parallel operation communication interface circuit by GPIO mouth, realizes the logic detection of bypass/inversion and the control of switching value.
Compared with prior art, the effect that the present invention is useful is: by the method for this synchronous realization under different running status, each UPS output voltage frequency and phase place high-precise synchronization can be realized, UPS circulation value can be suppressed, within export total current 3%, the UPS parallel operation that 10 single-machine capacity grades are 10KVA ~ 500KVA can be realized.
Accompanying drawing explanation
Fig. 1 is the UPS parallel operation control system hardware configuration schematic diagram based on TMS320F2812.
Fig. 2 is T1PWM and line synchro signal schematic representation (start of A machine, B machine are not opened, none-disk terminal).
Fig. 3 is T1PWM, synchronous and by-passing signal schematic diagram (A start, B do not open, and have bypass, do not capture the negative edge in t1' moment before the t2 moment).
Fig. 4 is T1PWM, synchronous and by-passing signal schematic diagram (A start, B do not open, and have bypass, have captured the negative edge in t1' moment before the t2 moment).
Embodiment
Below from the angle of those skilled in the art by reference to the accompanying drawings enforcement of the present invention be described further, but enforcement of the present invention and protection are not limited thereto.
Referring to accompanying drawing 1, Fig. 1 is UPS parallel operation control system hardware configuration schematic diagram.The method of synchronous realization is based upon on the basis of this hardware circuit.Hardware comprises governor circuit, preposing signal process circuit and parallel operation communication interface circuit.Governor circuit is made up of 32 bit DSP TMS320F2812 and peripheral system, main realization is to the output of the sampling of the multiple signals such as electric current and voltage and PWM ripple, utilize the detection of the inner A/D converter realization of DSP to these signals, then realize the adjustment to UPS inverter output voltage phase place, frequency and amplitude by the PWM mouth of DSP; Logic detection and the control (switching value) of bypass/inversion is realized by GPIO mouth (general input/output port).Preposing signal process circuit effect is by DC bus current, voltage, and three-phase voltage and bypass voltage carry out the process such as current/voltage-converted, step-down and rectification, obtain the d. c. voltage signal of 0 ~ 5V, and the AD sample circuit of DSP is accurately sampled desired data.Each UPS exchanges information by parallel operation order wire, the sending/receiving etc. of the signals such as order wire includes synchronously, the control of bypass/inversion, inverter state, the tracking of bypass A phase voltage, in order to prevent interference, the sending/receiving of each signal all have employed photoisolator.The 106th pin CAP1 mouth of DSP detects bypass voltage signal rising edge, and the 107th pin CAP2 mouth detects synchronizing signal rising edge, and the 102nd pin T1PWM sends pwm signal, regulates the frequency of UPS output voltage and the synchronous of phase place by inverter control circuit.
For any A, B two machine in multi-machine parallel connection system, under each machine is in different states, as follows to the method for synchronous realization:
(1) A machine start, B machine are not opened, and none-disk terminal voltage
Refer to accompanying drawing 2, T1PWM and synchronizing signal schematic diagram (start of A machine, B machine are not opened, none-disk terminal).
After opening initialization, in 20ms, if CAP1 mouth does not capture bypass voltage rising edge signal, none-disk terminal voltage can be confirmed; CAP2 mouth does not capture rising edge signal, can confirm on line synchro without synchronizing signal.At this moment, it is 50Hz that T1PWM sends frequency, the machine square-wave signal f that dutycycle is certain
r.Meanwhile, CAP2 mouth can capture the square-wave signal with frequency homophase.Be first periodic signal that T1PWM sends during t0 ~ t2, when CAP2 mouth captures t0 moment rising edge, CAP1 mouth starts to catch bypass voltage rising edge signal, CAP2 mouth starts to catch t1 moment negative edge simultaneously, after capturing t1 moment negative edge, start again to catch t2 moment rising edge, after capturing, if CAP1 mouth does not still capture bypass voltage rising edge signal, then can conclude none-disk terminal voltage, stop the seizure of CAP1 mouth, T1PWM continues to send the consistent synchronizing signal of same t0 ~ t2 simultaneously.Can define: send new periodic signal in the 10ms moment at T1PWM, DSP can detect and obtain load current, output voltage etc., coordinate the local frequency of 50Hz, the control signal of inverter governor circuit can be drawn through computing.
(2) after the start of A unit, B machine do not open and has bypass voltage
The phase differential of synchronizing signal and bypass voltage signal, frequency have multiple situation, and each situation corresponding has different disposal routes, after processing a situation at every turn, start news and judge and process, go round and begin again.If synchronous signal frequency is f
t, bypass voltage signal frequency is f
p.
1. situation 1:
Refer to accompanying drawing 3, T1PWM, synchronous and by-passing signal schematic diagram (A start, B do not open, and have bypass, do not capture t1' moment negative edge before the t2 moment).
CAP2 mouth captures synchronizing signal after t0 moment rising edge, starts to catch at t1 moment negative edge, and CAP1 mouth starts to catch the rising edge of by-passing signal in the t0' moment simultaneously, after capturing rising edge, starts to catch the negative edge of by-passing signal in the t1' moment.If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth do not capture at t1' moment negative edge yet, be then f
rlag behind by-passing signal frequency f
p, then T1PWM goes out the f of a same cycle same frequency at t2 moment follow-up supervention
t, CAP1 mouth continues to catch by-passing signal at the negative edge in t1' moment simultaneously, captures bypass at t1' moment negative edge, now can calculate f between t2 ~ t3
pfrequency, and the phase differential ξ between t0' and t2.
Work as f
p-f
rduring >0.01Hz, then, after the t4 moment, T1PWM sends f
r'=f
rthe synchronizing signal that+0.01Hz, dutycycle are certain;
Work as 0<f
p-f
rduring≤0.01Hz, if ξ is >0.01Hz, after the t4 moment, T1PWM sends f
r' '=f
r' the synchronizing signal (identical with a upper cycle) of+0.01Hz; If 0< ξ is <0.01Hz, after the t4 moment, T1PWM sends f
r' '=f
rsynchronizing signal.
Work as f
r-f
pduring >0.01Hz, then, after the t4 moment, T1PWM sends f
r'=f
rthe synchronizing signal that-0.01Hz, dutycycle are certain;
Work as 0<f
r-f
pduring≤0.01Hz, if ξ is >0.01Hz, after the t4 moment, T1PWM sends f
r' '=f
r' the synchronizing signal (identical with a upper cycle) of-0.01Hz; If 0< ξ is <0.01Hz, after the t4 moment, T1PWM sends f
r' '=f
rsynchronizing signal.
2. situation 2:
Refer to accompanying drawing 4, T1PWM, synchronous and by-passing signal schematic diagram (A start, B do not open, and have bypass, have captured t1' moment negative edge before the t2 moment).
CAP2 mouth captures synchronizing signal after t0 moment rising edge, starts to catch at t1 moment negative edge, and CAP1 mouth starts to catch the rising edge of by-passing signal in the t0' moment simultaneously, after capturing rising edge, starts to catch the negative edge of by-passing signal in the t1' moment.If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth captured at t1' negative edge, then can think f
radvanced by-passing signal frequency f
p, now can calculate f
pfrequency, and the phase differential ξ between t0 and the t0' moment.
Work as f
p-f
rduring >0.01Hz, then, after the t2 moment, namely T1PWM sends f
r'=f
rthe synchronizing signal that+0.01Hz, dutycycle are certain; Work as 0<f
p-f
rduring≤0.01Hz, control method is with situation 1;
Work as f
r-f
pduring >0.01Hz, then, after the t2 moment, namely T1PWM sends f
r'=f
rthe synchronizing signal that-0.01Hz, dutycycle are certain; Work as 0<f
r-f
pduring≤0.01Hz, control method is with situation 1.
(3) A machine, B machine are all started shooting, and have bypass voltage
A machine, B machine are all started shooting and after initialization, the CAP2 mouth of B machine captures negative edge signal, can confirm synchronizing signal line synchro having other machine send, can refer to accompanying drawing 2.
The synchronizing signal that in figure, the CAP2 mouth of A machine captures can be captured by the CAP2 mouth of B machine equally in B machine simultaneously, when the CAP2 mouth of B machine captures t0 moment negative edge, the T1PWM of B machine sends high level, the CAP2 mouth of B machine starts to catch t1 moment rising edge simultaneously, after capturing, B machine T1PWM sends low level, when B machine captures negative edge again, reverse level simultaneously, and the T1PWM mouth of several all after date A machines is synchronous with the signal that the T1PWM of B machine sends separately.Now, B machine can start the CAP1 mouth of treatments B machine and the signal acquisition of CAP2 mouth according to the method in " A unit normal then have bypass voltage ".Now, as long as have one to have by-passing signal in A machine or B machine, respective CAP1 mouth will capture identical by-passing signal, in conjunction with the identical synchronizing signal that respective CAP2 mouth captures, according to the method for " A unit normal then have bypass voltage ", identical process can be done.
(4) A machine, B machine are all started shooting, and none-disk terminal voltage
Have bypass voltage before being located at the t0 moment, frequency is 50Hz.At the separated bypass voltage of t0 ~ t2, A machine, B machine are in t0 ~ t2, respective CAP1 mouth all catches less than bypass voltage negative edge, now A machine B machine can to think in combining system none-disk terminal voltage simultaneously, after the t2 moment, respective T1PWM sends the synchronizing signal of 50Hz, again sends the synchronizing signal of 50Hz after the t4 moment.Several all after dates, the synchronizing signal sent becomes local synchronous signal 50Hz.
By the method for this synchronous realization under different running status, frequency and the phase place high-precise synchronization of each UPS output voltage can be realized, circulation value can be controlled, within export total current 3%, the UPS parallel operation that 10 single-machine capacitys are 10KVA ~ 500KVA can be realized.
Claims (3)
1. the synchronization realizing method of three-phase UPS parallel computer system, it is characterized in that: each UPS in combining system is equipped with the parallel operation control circuit based on DSP, described DSP is TMS320F2812, detect bypass voltage signal rising edge by the CAP1 mouth of DSP, the CAP2 mouth of DSP detects parallel operation synchronizing signal rising edge; For two machine of any A, B in multi-machine parallel connection system, under different running status, by DSP, analysis and synthesis is carried out to synchronizing signal, send pwm signal by the T1PWM pin of DSP, regulate frequency and the phase place of every platform UPS output voltage, thus realize the synchronous of each UPS; Described different running status comprises: 1. A start, B do not open, and none-disk terminal voltage; 2. A start, B do not open, and have bypass voltage; 3. A, B machine is all started shooting, and has bypass voltage; 4. A, B machine is all started shooting, none-disk terminal voltage; The analysis and synthesis of described synchronizing signal specifically comprises:
1. A machine start, B machine are not opened, and none-disk terminal voltage
After opening initialization, if without synchronizing signal on line synchro, the T1PWM pin of DSP will send out the machine square-wave signal f
rwhen the CAP2 mouth of DSP captures t0 moment rising edge, the CAP1 mouth of DSP starts to catch bypass voltage rising edge signal, CAP2 mouth starts to catch t1 moment negative edge simultaneously, after capturing, starts again to catch t2 moment rising edge, CAP1 mouth is not as captured bypass voltage rising edge signal, then conclude none-disk terminal voltage, stop the seizure of CAP1 mouth, T1PWM continues to send consistent synchronizing signal of same t0 ~ t2 moment simultaneously;
After the start of A unit 2., B machine do not open and has bypass voltage, and this state comprises two kinds:
If synchronous signal frequency is f
t, bypass voltage signal frequency is f
p,
One of state, A start, B do not open, and have bypass, capture t1' moment negative edge in the t2 moment,
CAP2 mouth captures synchronizing signal after t0 moment rising edge, starts to catch at t1 moment negative edge; CAP1 mouth catches by-passing signal at the rising edge in t0' moment simultaneously, after capturing rising edge, starts to catch by-passing signal at t1' moment negative edge; If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth do not capture at t1' moment negative edge yet, then can think f
rlag behind f
p, then T1PWM goes out the f of a same cycle same frequency at t2 moment follow-up supervention
t, CAP1 mouth continues to catch by-passing signal at the negative edge in t1' moment simultaneously, captures bypass at t1' negative edge, now calculate f between t2 ~ t3
pfrequency, and the phase differential ξ between t0' and t2;
State two, A is started shooting, B does not open, and has bypass, has captured t1' moment negative edge before the t2 moment,
CAP2 mouth captures synchronizing signal after t0 moment rising edge, starts to catch the negative edge in the t1 moment, and CAP1 mouth starts to catch the rising edge of by-passing signal in the t0' moment simultaneously, after capturing rising edge, starts to catch the negative edge of by-passing signal at t1'; If T1PWM start to send pwm signal to t2 during this period of time CAP1 mouth captured at t1' moment negative edge, then can think f
radvanced by-passing signal frequency f
p, now calculate f
pfrequency, and the phase differential ξ between t0 and t0';
3. A machine, B machine are all started shooting, and have bypass voltage
A machine, B machine are all started shooting and after initialization, the CAP2 mouth of B machine captures negative edge signal, can confirm synchronizing signal line synchro having other machine send;
When the CAP2 mouth of B machine captures t0 moment negative edge, the T1PWM of B machine sends high level, the CAP2 mouth of B machine starts to catch t1 moment rising edge simultaneously, after capturing, B machine T1PWM sends low level, when B machine captures negative edge again, reverse level simultaneously, and the T1PWM mouth of some all after date A machines is synchronous with the signal that the T1PWM of B machine sends separately; Now, B machine can start the CAP1 mouth of treatments B machine and the signal acquisition of CAP2 mouth according to the operation method in " A unit normal then have bypass voltage "; Now, as long as have one to have by-passing signal in A machine or B machine, respective CAP1 mouth will capture identical by-passing signal, in conjunction with the identical synchronizing signal that respective CAP2 mouth captures, according to the operation method of " A unit normal then have bypass voltage ", do identical process;
4. A machine, B machine are all started shooting, and none-disk terminal voltage
Have bypass voltage before being located at the t0 moment, frequency is 50Hz; At the separated bypass voltage of t0 ~ t2, A machine, B machine are in t0 ~ t2, respective CAP1 mouth all catches less than bypass voltage negative edge, now A machine B machine can to think in combining system none-disk terminal voltage simultaneously, after the t2 moment, respective T1PWM sends the synchronizing signal of 50Hz, again sends the synchronizing signal of 50Hz after the t4 moment, several week after date, the synchronizing signal sent becomes local synchronous signal 50Hz.
2. realize the sync control device of the three-phase UPS parallel computer system of method described in claim 1, it is characterized in that comprising the parallel operation control circuit based on TMS320F2812, described parallel operation control circuit comprises preposing signal process circuit, governor circuit and parallel operation communication interface circuit;
Preposing signal process circuit realizes DC bus current, voltage, and three-phase voltage and bypass voltage signal carry out current/voltage-converted, step-down and rectification process, obtain the d. c. voltage signal of 0 ~ 5V, is input to the inner A/D converter of DSP in governor circuit; Governor circuit major function is: to sampling and the detection of the voltage and current signal that preposing signal process circuit obtains, realize the adjustment to UPS inverter output voltage phase place, frequency and amplitude, and realize the logic control of bypass/inversion; Parallel operation communication interface circuit is used for the sending/receiving of synchronizing signal, the control signal of bypass/inversion, inverter state signal, bypass A phase voltage trace signals.
3. the sync control device of three-phase UPS parallel computer system according to claim 2, it is characterized in that governor circuit is made up of 32 bit DSP TMS320F2812 and peripheral circuit, DSP realizes the detection to the voltage and current signal that preposing signal process circuit obtains by inner A/D converter, then realizes the adjustment to UPS inverter output voltage phase place, frequency and amplitude by the PWM mouth of DSP; DSP is connected with parallel operation communication interface circuit by GPIO mouth, realizes the logic detection of bypass/inversion and the control of switching value.
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| CN107179051A (en) * | 2017-06-27 | 2017-09-19 | 中国航空工业集团公司北京长城航空测控技术研究所 | A kind of big angle of visual field 3 D measuring instrument |
| CN108155715A (en) * | 2018-01-24 | 2018-06-12 | 广州科技贸易职业学院 | A kind of three-phase ups power control device based on double-nuclear DSP |
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| 基于TMS320F2812 的UPS 并机控制技术;廖慧 等;《电力电子技术》;20080430;第42卷(第4期);第43-45,48页 * |
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| CN103217918A (en) | 2013-07-24 |
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