CN103217610A - Device for capturing and processing transient events of power quality - Google Patents
Device for capturing and processing transient events of power quality Download PDFInfo
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- CN103217610A CN103217610A CN2013101765468A CN201310176546A CN103217610A CN 103217610 A CN103217610 A CN 103217610A CN 2013101765468 A CN2013101765468 A CN 2013101765468A CN 201310176546 A CN201310176546 A CN 201310176546A CN 103217610 A CN103217610 A CN 103217610A
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Abstract
The invention relates to a device for capturing and processing transient events of power quality, belonging to the technical field of power supply management. The core component FPGA (Field Programmable Gate Array) of the device at least comprises a sampling control module, an effective value judging module, a variable judging module, a break variable judging module, a first internal memory control module, a transient event capturing control module and a second internal memory control module. According to the invention, the FPGA is reasonably used for creating the effective value judging module, the variable judging module and the break variable judging module parallel to the sampling control module, and the first and the second internal memory control modules performing respective functions are created to reasonably divide the work of first and the second internal memories, thereby being capable of simultaneously extracting and processing various transient event data with different attributes of power quality through a scientific internal operation structure, having the capability of processing high frequency transient data higher than 5 MHz, greatly improving the sampling rate and laying a foundation for satisfying high-precision monitoring of power quality.
Description
Technical field
The present invention relates to a kind of equipment for monitoring power quality, especially a kind of device that is suitable for the electric energy quality transient affair seizure and handles belongs to the power supply management technical field.
Background technology
Understand according to the applicant, at present in the electric energy quality monitoring field, the voltage transient of still being unrealized is truly monitored.
Retrieval finds, application number is that 201210262537.6 Chinese patent application discloses a kind of online equipment for monitoring power quality.It is introduced that this device can make existing common electric energy quality device possess high speed transient signal capture function.Be widely used in nonlinear-load and impact load, comprise that the transition interference is as more serious online monitorings of carrying out conventional power quality index parameter in place of problem such as connection of the equipment on the electrical network and thunderbolts, and when the anomalous event of high speed voltage transient occurring, can catch automatically and true intactly record transient signal at that time, for the fault analysis of device in the supply line and equipment provides the data support.
In addition, application number is that 201210247188.0 Chinese patent application discloses a kind of equipment for monitoring power quality based on the sampling of dual rate double-range.It is introduced that this device not only can be applicable to equipment for monitoring power quality, can also be used for super wide range electric energy meter or impact load electric energy meter, it can make electric energy meter both keep the high precision (especially small load) of stable state metering, does not lose any impact electric energy again.
Yet research and analyse as can be known, there are the following problems in actual applications for above-mentioned prior art:
1, the problem of sampling rate: be subject to processing power, adopt general DSP or CPU can't obtain high sampling rate; Once had that to provide sampling rate by DSP be the transient state solution of 1MHz, but under its hardware structure, be difficult to obtain higher sampling rate and processing power; The transient state solution that scheme by FPGA and POWERPC can provide sampling rate to reach 2MHz, but still be difficult to satisfy the requirement of transient state monitoring, according to the standard of IEEE, the higher-order of oscillation transition dominant frequency that may occur in the voltage transient process is up to 5MHz.Crossing the process that low sampling rate is not enough to support transient affair is further analyzed.With the Lightning Over-voltage is example, and the wave head time of thunder-strike current (being raised to the maximal value time from above freezing) is 2.6us, if adopt the sampling rate of 2MHz, then overall process only can collect 5 sampled points, adopts the sampling rate of 1MHz then to count still less.
2, the problem of sampling precision: the transient state solution of prior art is 12 precision solutions, because transient process itself is rich in the high-frequency harmonic component, needs were done the analysis of high precision entire spectrum to transient waveform when, 12 sampling precisions were difficult to satisfy the requirement of analyzing.
3, the problem of detection criteria: substantially only adopt a kind of fairly simple criterion in the transient state solution of prior art, for example effective value criterion or variable quantity criterion are subject to processing power for sudden change amount criterion and are difficult to handle.In the case, the important transient incident of very likely failing to judge at the scene reduces effective value or variable quantity criterion threshold and then brings the possibility of erroneous judgement; Being difficult to provides reliable, comprehensive criterion to make the transient state monitoring device scope of application be subjected to certain influence to on-the-spot transient state monitoring.
In a word, the problems referred to above have produced following influence to electric energy quality monitoring:
1) owing to install support, the electric energy quality monitoring field stays cool substantially for the research of voltage transient incident;
2), device damage and yields decline solution in the production run can't be proposed for the voltage transient sensitive users;
3) professional user's harm that voltage transient is caused has certain understanding, but does not have corresponding monitoring device that Monitoring Data is provided, and is difficult to the reason that transient state takes place is further analyzed.
Therefore, be to improve the electric energy quality monitoring level, the solution at the seizure and the processing of electric energy quality transient affair provides a kind of technical feasibility, reasonable price has very important significance.
Summary of the invention
Primary and foremost purpose of the present invention is: at the problem that above-mentioned prior art exists, propose a kind of device that electric energy quality transient affair is caught and handled that is suitable for enough sampling rates, thereby the process that supports transient affair is further analyzed.
The present invention puies forward further purpose and is: a kind of sampling precision height is provided, has the device that electric energy quality transient affair is caught and handled that is suitable for of reasonable detection criteria, thereby realize electric energy quality transient affair seizure truly.
In order to reach above-mentioned primary and foremost purpose, the present invention is suitable for the device of electric energy quality transient affair seizure and processing with the FPGA(field programmable gate array---Field-Programmable Gate Array) and be core devices, described FPGA contains at least
The controlling of sampling module periodically latchs in internal data bus in order to the power quality data with AD acquisition circuit collection input;
The effective value data are extracted and obtained to effective value criterion module in order to data bus internally, again with the effective value threshold ratio after, with the effective value data delivery of superthreshold to the transient affair acquisition control module;
Variable quantity criterion module is extracted and differential obtains the variable quantity data in order to data bus internally, again with the variable quantity threshold ratio after, with the variable quantity data delivery of superthreshold to the transient affair acquisition control module;
Sudden change amount data are extracted and tried to achieve to sudden change amount criterion module in order to data bus internally, again with sudden change amount threshold ratio after, with the sudden change amount data delivery of superthreshold to the transient affair acquisition control module;
The first internal memory control module, in order to control outside first internal memory, temporary controlling of sampling module latchs the original power quality data in internal data bus;
The transient affair acquisition control module, in order to read the original power quality data of storing in the first internal memory control module, together with the effective value that sends, variable quantity, sudden change amount data delivery to the second internal memory control module;
The second internal memory control module in order to control outside second internal memory, is kept in the various data that the transient affair acquisition control module is carried, and is transported to outer CPU.
During work, the sampled data of the outside high-speed AD of controlling of sampling module controls of the present invention (analog to digital converter) is read in, and will read in data and send to effective value criterion, variable quantity criterion, sudden change amount criterion by data bus and carry out parallel processing.Read in data after effective value criterion module, variable quantity criterion module, sudden change amount criterion module are carried out necessary computing judgement, send to the transient affair acquisition control module, deposit these transient datas in second external memory by the transient affair acquisition control module, read by interaction logic control module notice outer CPU subsequently, be further analyzed processing.
The present invention not only rationally adopts FPGA to build the effective value criterion module parallel with the controlling of sampling module, variable quantity criterion module, sudden change amount criterion module (can also increase other parallel module as one sees fit), and made up that Each performs its own functions first, the internal memory control module, make outside first, the second internal memory rational division of work, the internal operation framework that therefore can rely on science, extract the electric energy transient affair data of handling various different attributes simultaneously, has the ability that is enough to handle the above high frequency transient data of 5MHz, increased substantially sampling rate, laid a good foundation for satisfying high-precision electric energy quality monitoring.
In order to reach further purpose, described FPGA also contains time-delay and reads control module, in order to by the first internal memory control module with after temporary power quality data time-delay one-period, flow to sudden change amount criterion module basis for estimation as a comparison; After described sudden change amount criterion module is extracted instantaneous value data in this cycle power quality data in order to data bus internally, will with read from time-delay control module last one-period corresponding data difference measure data as sudden change.Like this, the ingenious monitoring problem of having properly settled sudden change amount in the quality of power supply that prior art can't realize has been avoided failing to judge of important parameter in the transient affair, has established solid foundation for effectively improving the electric energy quality monitoring level.
Further, the input termination signal condition loop of described AD acquisition circuit, described signal condition loop are that three-phase voltage and voltage common port input terminal connect the difference input circuit that corresponding binary channels amplifier integrated chip constitutes by one group of resistance in series respectively.
Further, the signal condition loop that described difference input circuit constitutes is connected on the corresponding FPGA input pin through bus by the binary channels output in high-speed AD acquisition loop; Described first internal memory and second internal memory are connected respectively on the corresponding FPGA read-write pin.
Further again, the described second internal memory control module is transported to outer CPU by outside interaction logic control module.
In a word, the present invention catches and handles and divided each functional module for realizing electric energy quality transient affair, and data interaction, logic exchange channels between each functional module have been set up, not only practical, and have compact overall structure, data stream and remarkable advantages such as the logic control process is clear, cost is low, function expansion convenience.
Description of drawings
Fig. 1 is the structured flowchart of one embodiment of the invention.
Fig. 2 is the structured flowchart of FPGA among Fig. 1 embodiment.
Fig. 3 is the circuit theory diagrams in signal condition loop among Fig. 1 embodiment.
Fig. 4 is the circuit theory diagrams of Fig. 1 embodiment high speed AD acquisition circuit.
Fig. 5 is the circuit theory diagrams of a FPGA part among Fig. 1 embodiment.
Fig. 6 is the circuit theory diagrams of FPGA another part among Fig. 1 embodiment.
Embodiment
Embodiment one
Present embodiment be suitable for that electric energy quality transient affair is caught and the device handled as shown in Figure 1, mainly constitute by fpga chip, first internal memory, second internal memory, high-speed AD acquisition loop, signal condition loop.Core devices FPGA wherein contains as shown in Figure 2: controlling of sampling module 1, periodically latch in internal data bus in order to the power quality data with AD acquisition circuit collection input; Effective value criterion module 2, in order to data bus internally extract handle the effective value data and with the effective value threshold ratio after, with the effective value data delivery of superthreshold to transient affair acquisition control module 7; Variable quantity criterion module 3, in order to data bus internally extract processing variation amount data and with the variable quantity threshold ratio after, with the variable quantity data delivery of superthreshold to transient affair acquisition control module 7; Sudden change amount criterion module 4, after sudden change amount criterion module is extracted instantaneous value data in this cycle power quality data in order to data bus internally, will with read from time-delay control module last one-period corresponding data difference measure data as sudden change, with the sudden change amount data delivery of superthreshold to transient affair acquisition control module 7; The first internal memory control module 8, in order to control outside first internal memory, by write memory control module 5, temporary controlling of sampling module latchs the original power quality data in internal data bus; Transient affair acquisition control module 7, in order to read the original power quality data of storing in the first internal memory control module, together with the effective value that sends, variable quantity, sudden change amount data delivery to the second internal memory control module 9; The second internal memory control module 9 in order to control outside second internal memory, is kept in the various data that transient affair acquisition control module 7 is carried, and is transported to outer CPU by outside interaction logic control module 10; Control module 6 is read in time-delay, in order to by the first internal memory control module 8 with after temporary power quality data time-delay one-period, flow to sudden change amount criterion module 4 basis for estimation as a comparison.
During work, the signal condition loop is reduced to the simulating signal that high-speed AD can insert with external voltage signal; The high-speed AD acquisition loop is a digital signal with analog signal conversion; The FIFO that first internal memory is caught as transient affair; The transient data bag that second internal memory is caught as buffer memory reads for outer CPU.
The physical circuit in above-mentioned signal condition loop as shown in Figure 3, BNC connector BNC1 ~ BNC4 is as three-phase voltage input and voltage common port input terminal, this three-phase voltage and voltage common port input terminal meet corresponding binary channels amplifier integrated chip LF412 by one group of resistance in series respectively, constitute the difference input circuit.Many group precision resisters constitute resistance pressure-dividing network, increase the insulation distance that resistance pressure-dividing network resistance number can increase signal input part and back-end circuit as required; Adopt binary channels amplifier integrated chip LF412 to constitute the difference input circuit with resistance pressure-dividing network, can improve the ability of the anti-common mode interference of signal input part, the high voltage of front end input is transformed to the small-signal that can directly insert high-speed AD after this circuit conditioning.
The high-speed AD acquisition loop is a core devices with the high speed double channel A acquisition chip AD9268 of ADI company as shown in Figure 4, and high sampling rate is supported 125M/S, and sampling precision is 16, adopts the 1.8V low voltage power supply to reduce chip power-consumption; Simultaneously, this double channel A adopts independently data bus output, to improve data throughput.
First internal memory adopts DDR2 sdram memory particle MT47H32M16, and its data width is 16, and its data throughput rate is supported 400M/S.Second internal memory adopts DDR2 sdram memory particle MT47H32M16, with said external internal memory 1 by separately independently data bus, address bus and control bus be connected to FPGA, independently access control ability is provided.
The FPGA(programmable gate array) circuit theory diagrams as shown in Figure 5, adopt the 780 pin chip bgas of the ALTERA high power capacity fpga chip EP3C80F780 of company, 429 user-programmable IO pins and 81264 logical blocks are provided, and the member of its internal module as previously mentioned.The signal condition loop that the difference input circuit constitutes is connected on the corresponding FPGA input pin, so that higher data throughput to be provided through bus by the binary channels output in high-speed AD acquisition loop; First internal memory and second internal memory are connected respectively on the corresponding FPGA read-write pin, provide FPGA to read while write the ability of two internal memories.
During the device work of this enforcement, for power factor correction capacitor switching in the supply line cause a low-frequency oscillation transient process---oscillation frequency is usually less than 5KHz, duration is 0.3-50ms, voltage magnitude is up to 4 times rated voltage, sudden change amount sensitivity, sudden change amount criterion can be caught this transient process effectively.The device of present embodiment can utilize the periodicity of power network signal, uses the sampled point of one-period corresponding sampling points and this sampling period opposite position and makes comparisons, if difference greater than pre-set threshold value, is then judged transient process has taken place.This transient affair can be cooperated by the sudden change amount criterion module 4 among Fig. 2, time-delay one-period read through model finishes catching this incident.Particularly, time-delay one-period read through model 6 is read 20 milliseconds of (corresponding power network signal cycle) preceding data by the multiport first internal memory control module 8 from first internal memory, and the current data that these data and controlling of sampling module 1 are obtained relatively, if the absolute value of difference is greater than pre-set threshold value, then by pulse MUT_REQ of sudden change amount criterion module 4 outputs, notice transient affair acquisition control module 7, transient affair acquisition control module 7 reads the data of preset length from first internal memory by the multiport first internal memory control module 8 subsequently, and write second internal memory by the multiport second internal memory control module 9, after preserving end, outside interaction logic control module 10 notice outer CPU reading and saving results.
In addition, when the controllable silicon false triggering of Power Electronic Circuit, also can cause the transient process of electrical network---the voltage point occurs at normal sinusoidal waveform 120 degree or 60 degree phase place places and dash, its amplitude is relevant with the pulse relative time of duration and false triggering, effective value criterion and sudden change amount criterion are difficult to reliably catch this transient process, and the variable quantity criterion can reliably be caught this transient process.Because variable quantity is asked for the differential signal of input signal and is obtained the result, if the differential signal of respective signal has transient affair to take place greater than setting threshold values, then thinking.Because derivative constant can take the circumstances into consideration to dynamically arrange, therefore can obtain different acquisition sensitivities.Particularly, above-mentioned transient process by the variable quantity criterion module 3 of Fig. 2 according to the derivative constant of setting, buffered data in module, and with these data and the current data comparison that obtains by controlling of sampling module 1, if absolute difference is greater than pre-set threshold value, then by a pulsed D V_REQ notice of variable quantity criterion module 3 outputs transient affair acquisition control module 7, transient affair acquisition control module 7 reads the data of preset length and is written to second internal memory by the multiport second internal memory control module 9 by the multiport first internal memory control module 8 from first internal memory subsequently, after preserving end, outside interaction logic control module 10 notice outer CPU reading and saving results.
Above embodiment is nonrestrictive.The technician of the industry should be appreciated that under the prerequisite that does not break away from core architecture of the present invention and main method, the present invention also has various variations and improvement, and these variations and improvement all fall in the claimed scope of the invention.
Claims (5)
1. one kind is suitable for the device that electric energy quality transient affair is caught and handled, and is core devices with FPGA(, and it is characterized in that: described FPGA contains at least
The controlling of sampling module periodically latchs in internal data bus in order to the power quality data with AD acquisition circuit collection input;
The effective value data are extracted and obtained to effective value criterion module in order to data bus internally, again with the effective value threshold ratio after, with the effective value data delivery of superthreshold to the transient affair acquisition control module;
Variable quantity criterion module is extracted and differential obtains the variable quantity data in order to data bus internally, again with the variable quantity threshold ratio after, with the variable quantity data delivery of superthreshold to the transient affair acquisition control module;
Sudden change amount data are extracted and tried to achieve to sudden change amount criterion module in order to data bus internally, again with sudden change amount threshold ratio after, with the sudden change amount data delivery of superthreshold to the transient affair acquisition control module;
The first internal memory control module, in order to control outside first internal memory, temporary controlling of sampling module latchs the original power quality data in internal data bus;
The transient affair acquisition control module, in order to read the original power quality data of storing in the first internal memory control module, together with the effective value that sends, variable quantity, sudden change amount data delivery to the second internal memory control module;
The second internal memory control module in order to control outside second internal memory, is kept in the various data that the transient affair acquisition control module is carried, and is transported to outer CPU.
2. the device that is suitable for the electric energy quality transient affair seizure and handles according to claim 1, it is characterized in that: described FPGA also contains time-delay and reads control module, in order to by the first internal memory control module with after temporary power quality data time-delay one-period, flow to sudden change amount criterion module basis for estimation as a comparison; After described sudden change amount criterion module is extracted instantaneous value data in this cycle power quality data in order to data bus internally, will with read from time-delay control module last one-period corresponding data difference measure data as sudden change.
3. the device that is suitable for the electric energy quality transient affair seizure and handles according to claim 2, it is characterized in that: the input termination signal condition loop of described AD acquisition circuit, described signal condition loop are that three-phase voltage and voltage common port input terminal connect the difference input circuit that corresponding binary channels amplifier integrated chip constitutes by one group of resistance in series respectively.
4. the device that is suitable for the electric energy quality transient affair seizure and handles according to claim 3, it is characterized in that: the signal condition loop that described difference input circuit constitutes is connected on the corresponding FPGA input pin through bus by the binary channels output in high-speed AD acquisition loop; Described first internal memory and second internal memory are connected respectively on the corresponding FPGA read-write pin.
5. the device that is suitable for the electric energy quality transient affair seizure and handles according to claim 4, it is characterized in that: the described second internal memory control module is transported to outer CPU by outside interaction logic control module.
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| CN109633253A (en) * | 2018-12-07 | 2019-04-16 | 中电科仪器仪表(安徽)有限公司 | One kind realizing voltage transient signal deteching circuit and method based on FPGA |
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Address after: Jiangning District of Nanjing City, Jiangsu province Rhine Road No. 699 211100 Patentee after: Nanjing can electric power automation Limited by Share Ltd Address before: Jiangning District of Nanjing City, Jiangsu province Rhine Road No. 699 211100 Patentee before: Nanjing Shining Electric Automation Co., Ltd. |