CN103200062A - Controller area network (CAN) bus data transceiver - Google Patents

Controller area network (CAN) bus data transceiver Download PDF

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CN103200062A
CN103200062A CN2013101097387A CN201310109738A CN103200062A CN 103200062 A CN103200062 A CN 103200062A CN 2013101097387 A CN2013101097387 A CN 2013101097387A CN 201310109738 A CN201310109738 A CN 201310109738A CN 103200062 A CN103200062 A CN 103200062A
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transceiver
bus
fixed contact
speed
microcontroller
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CN103200062B (en
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周树民
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Beijing Jingwei Hirain Tech Co Ltd
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Beijing Jingwei Hirain Tech Co Ltd
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Abstract

The invention provides a controller area network (CAN) bus data transceiver which comprises a microcontroller, a low-speed/fault-tolerant CAN transceiver, a high-speed transceiver, a switching circuit and a CAN type judgment circuit. When connection of the switching circuit and an exterior CAN bus is cut off, the CAN type judgment circuit judges current connected exterior CAN bus type of the data transceiver according to difference of voltage of a CAN high-speed wire and voltage of a CAN low-speed wire, and then sends the judgment result to the microcontroller. The microcontroller sends a switching signal of the CAN transceiver to the switching circuit and controls the connection state of the switching circuit, the low-speed/fault-tolerant CAN transceiver and the high-speed CAN transceiver. A connected signal of the CAN transceiver is sent to the switching circuit, building of connection of the switching circuit and the exterior CAN bus is controlled, and communication between the CAN transceiver and the exterior CAN bus is achieved.

Description

A kind of CAN bus data transceiver
Technical field
The present invention relates to CAN bus communication technical field in the automobile bus network, more particularly, relate to a kind of CAN bus data transceiver.
Background technology
CAN (Controller Area Network, controller local area network) bus is the STD bus of Computer Controlled System for Vehicle and built-in industrial control area net, and it is a kind of serial communication protocol of ISO International standardization.In different types of CAN bus, with being most widely used of high-speed CAN and low speed/fault-tolerant CAN.Wherein, high-speed CAN and low speed/fault-tolerant CAN is to use two holding wires, is respectively the high line of CAN of the outside CAN bus of CAN_H() and the CAN of the outside CAN bus of CAN_L(hang down line).According to the physical layer standard of CAN, when the difference of high-speed CAN and low speed/fault-tolerant CAN was that both are in dominance condition, stealthy state and resting state, the CAN_H line was different with the bus voltage of CAN_L line.Secondly, high-speed CAN has adopted different CAN transceivers respectively with low speed/fault-tolerant CAN, and different transceivers has different circuit design.In view of the above-mentioned difference of high-speed CAN and low speed/fault-tolerant CAN, therefore, can not on same bus, realize high-speed CAN and low speed/two kinds of forms of fault-tolerant CAN usually simultaneously.
In order to realize not only supporting high-speed CAN but also support low speed/fault-tolerant CAN at equipment, a kind of system connection diagram in the prior art as shown in Figure 1, can comprise host computer 100 and CAN bus data transceiver 200, wherein CAN bus data transceiver 200 can comprise microcontroller 210 and the CAN transceiver 220 that can manually plug, the high line 001 of the CAN of CAN bus data transceiver 200 and outside CAN bus, the CAN of outside CAN bus is low, and line 002 connects, wherein, we can be according to actual needs, on CAN bus data transceiver, change transceiver type manually, to realize supporting the function of high-speed CAN and low speed/fault-tolerant CAN.
But because high-speed CAN transceiver and low speed/fault-tolerant CAN transceiver are exteriorly basic identical, so it is wrong to be easy to choosing when the user selects transceiver, mistake inserts low speed/fault-tolerant CAN bus with the high-speed CAN transceiver, otherwise or, low speed/fault-tolerant CAN transceiver is inserted high-speed CAN bus.So not only can cause the equipment cisco unity malfunction, also can have influence on the signal on the CAN bus, make the communication on the CAN bus receive interference, other equipment that may cause being connected when serious on the CAN bus produce misoperation, cause danger.
Summary of the invention
In view of this, the invention provides a kind of CAN bus data transceiver, to realize the automatic switchover of high-speed CAN transceiver and low speed/fault-tolerant CAN transceiver.
A kind of CAN bus data transceiver comprises: microcontroller, low speed/fault-tolerant CAN transceiver, high-speed CAN transceiver, commutation circuit and CAN type decision circuitry;
First output of described microcontroller is connected with the input of described low speed/fault-tolerant CAN transceiver, and the first input end of described microcontroller is connected with the output of described low speed/fault-tolerant CAN transceiver;
Second output of described microcontroller is connected with the input of described high-speed CAN transceiver, and second input of described microcontroller is connected with the output of described high-speed CAN transceiver;
The one I/O port of described low speed/fault-tolerant CAN transceiver is connected with first switch terminal of described commutation circuit, and the 2nd I/O port of described low speed/fault-tolerant CAN transceiver is connected with second switch terminal of described commutation circuit;
The one I/O port of described high-speed CAN transceiver is connected with the 3rd switch terminal of described commutation circuit, and the 2nd I/O port of described high-speed CAN transceiver is connected with the 4th switch terminal of described commutation circuit;
First link of described commutation circuit can be connected by high line with the CAN of outside CAN bus, and second link of described commutation circuit can be connected by low line with the CAN of outside CAN bus;
Described first link is connected with the first input end of described CAN type decision circuitry, described second link is connected with second input of described CAN type decision circuitry, described CAN type decision circuitry is according to the difference of the voltage on the low line of CAN of the voltage on the high line of CAN of described outside CAN bus and described outside CAN bus, the outside CAN bus type of the current access of judgment device, and judged result sent to the described microcontroller that links to each other with described CAN type decision circuitry;
First control end of described microcontroller is connected with first control end of described commutation circuit, and second control end of described microcontroller is connected with second control end of described commutation circuit; When described commutation circuit is connected cut-out with outside CAN bus, described microcontroller is according to the judged result of described outside CAN bus type, send CAN transceiver switching signal to described commutation circuit, control the connection status of described commutation circuit and described low speed/fault-tolerant CAN transceiver, described high-speed CAN transceiver; Send the CAN transceiver to described commutation circuit and insert signal, control described commutation circuit and outside CAN bus establishment of connection, realization CAN transceiver is communicated by letter with outside CAN bus.
Preferably, described commutation circuit comprises first switching circuit and second switch circuit;
Described first switching circuit comprises: first fixed contact, second fixed contact, the 3rd fixed contact, the 4th fixed contact, first moving contact and second moving contact; Described first fixed contact is connected with described first switch terminal, and described second fixed contact is connected with described the 3rd switch terminal, and described the 3rd fixed contact is connected with described second switch terminal, and described the 4th fixed contact is connected with described the 4th switch terminal; Described first moving contact can be connected with described first fixed contact, described second fixed contact, and described second moving contact can be connected with described the 3rd fixed contact, described the 4th fixed contact;
Described second switch circuit comprises: first fixed contact, second fixed contact, first moving contact and second moving contact; Described first fixed contact is connected with described first link, and described second fixed contact is connected with described second link; Described first moving contact can be connected with described first fixed contact, and described second moving contact can be connected with described second fixed contact;
Wherein, first moving contact of described first switching circuit is connected with first moving contact of described second switch circuit, and second moving contact of described first switching circuit is connected with second moving contact of described second switch circuit.
Preferably, described first switching circuit comprises the single-pole double throw relay of two interlocks, and described second switch circuit comprises the single-pole single-throw(SPST relay of two interlocks;
The single-pole double throw relay of described two interlocks, receive the CAN transceiver switching signal that described microcontroller sends, control the switching of its Chang Kaiduan and normal-closed end, to realize the connection status of described first switching circuit and described low speed/fault-tolerant CAN transceiver, described high-speed CAN transceiver;
The single-pole single-throw(SPST relay of described two interlocks receives the CAN transceiver access signal that described microcontroller sends, and controls its break-make, with cut-out or the foundation that realizes that described second switch circuit is connected with outside CAN bus.
Preferably, described microcontroller is connected with host computer, and described host computer can be stored the data message that outside CAN bus transmits.
From above-mentioned technical scheme as can be seen, the invention provides a kind of CAN bus data transceiver, can comprise: microcontroller, low speed/fault-tolerant CAN transceiver, high-speed CAN transceiver, commutation circuit and CAN type decision circuitry.When commutation circuit is connected cut-out with outside CAN bus, CAN type decision circuitry is according to the difference of the voltage on the voltage on the high line of CAN and the low line of CAN, the outside CAN bus type of the current access of judgment device, and judged result sent to microcontroller, microcontroller sends CAN transceiver switching signal, the connection status of control commutation circuit and low speed/fault-tolerant CAN transceiver, high-speed CAN transceiver to commutation circuit; Send the CAN transceiver to commutation circuit and insert signal, control commutation circuit and outside CAN bus establishment of connection, realization CAN transceiver is communicated by letter with outside CAN bus.CAN bus data transceiver provided by the invention is judged the outside CAN bus type of current access automatically, automatically appropriate C AN transceiver is inserted the CAN bus, need not artificial interference, has effectively avoided the influence of selecting the CAN transceiver to make mistakes and bring because of the user.And high-speed CAN transceiver and low speed/fault-tolerant CAN transceiver can not insert outside CAN bus all the time simultaneously, thereby has avoided the influence to the generation of the signal on the CAN bus, has guaranteed the quality of signal of communication.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is a kind of system connection diagram in the prior art;
Fig. 2 is the structural representation of the disclosed a kind of CAN bus data transceiver of the embodiment of the invention;
Fig. 3 is the disclosed a kind of high-speed CAN bus voltage schematic diagram of the embodiment of the invention;
Fig. 4 is the disclosed a kind of low speed of the embodiment of the invention/fault-tolerant CAN bus voltage schematic diagram;
Fig. 5 is the disclosed a kind of high-speed CAN bus dormancy level schematic diagram of the embodiment of the invention;
Fig. 6 is the disclosed a kind of low speed of the embodiment of the invention/fault-tolerant CAN bus dormancy level schematic diagram;
Fig. 7 is the disclosed a kind of CAN type decision circuitry principle schematic of the embodiment of the invention;
Fig. 8 is the disclosed a kind of commutation circuit principle schematic of the embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
As shown in Figure 2, the structural representation of the disclosed a kind of CAN bus data transceiver of the embodiment of the invention can comprise microcontroller 210, low speed/fault-tolerant CAN transceiver 221, high-speed CAN transceiver 222, commutation circuit 230 and CAN type decision circuitry 240;
Wherein, CAN (Controller Area Network) is the abbreviation of controller local area network, is the serial communication protocol of ISO International standardization.
Microcontroller 210(Microcontroller Unit, i.e. MCU) be a kind ofly the major part of microcomputer can be integrated in a single-chip microcomputer on the chip.
First output of described microcontroller 210 can be connected with the input of described low speed/fault-tolerant CAN transceiver 221, and the first input end of described microcontroller 210 can be connected with the output of described low speed/fault-tolerant CAN transceiver 221;
Concrete, described microcontroller 210 can send LCAN_TXD(low speed/fault-tolerant CAN digital signal and send to described low speed/fault-tolerant CAN transceiver 221), simultaneously, can also receive LCAN_RXD(low speed/fault-tolerant CAN digital signal that described low speed/fault-tolerant CAN transceiver 221 sends receives).
Second output of described microcontroller 210 can be connected with the input of described high-speed CAN transceiver 222, and second input of described microcontroller 210 can be connected with the output of described high-speed CAN transceiver 222;
Concrete, described microcontroller 210 can send HCAN_TXD(high-speed CAN digital signal to described high-speed CAN transceiver 222 and send), simultaneously, can receive the HCAN_RXD(high-speed CAN digital signal reception that described high-speed CAN transceiver 222 sends).
Described microcontroller 210 is realized the switching of low speed/fault-tolerant CAN transceiver 221 and high-speed CAN transceiver 222 digital signals part by sending different TXD and receiving different RXD.
What it will be appreciated by those skilled in the art that is that the transmission of above-mentioned digital signal and the reception of digital signal are all for described microcontroller 210.
The one I/O port of described low speed/fault-tolerant CAN transceiver 221 can be connected with first switch terminal 231 of described commutation circuit 230, and the 2nd I/O port of described low speed/fault-tolerant CAN transceiver 221 can be connected with second switch terminal 232 of described commutation circuit 230;
The one I/O port of described high-speed CAN transceiver 222 can be connected with the 3rd switch terminal 233 of described commutation circuit 230, and the 2nd I/O port of described high-speed CAN transceiver 222 can be connected with the 4th switch terminal 234 of described commutation circuit 230;
First link 235 of described commutation circuit 230 can be connected by high line 001 with the CAN of outside CAN bus, and second link 236 of described commutation circuit 230 can be connected by low line 002 with the CAN of outside CAN bus;
Described first link 235 can be connected with the first input end of described CAN type decision circuitry 240, described second link 236 can be connected with second input of described CAN type decision circuitry 240, described CAN type decision circuitry 240 can be according to the CAN of described outside CAN bus the difference of voltage on the low line 002 of CAN of the voltage on the high line 001 and described outside CAN bus, the outside CAN bus type of the current access of judgment device, and judged result can be sent to the described microcontroller 210 that links to each other with described CAN type decision circuitry 240;
First control end 211 of described microcontroller 210 can be connected with first control end 237 of described commutation circuit 230, and second control end 212 of described microcontroller 210 can be connected with second control end 238 of described commutation circuit 230; When described commutation circuit 230 is connected cut-out with outside CAN bus, described microcontroller 210 can be according to the judged result of described outside CAN bus type, send CAN transceiver switching signal (CAN Transceiver Switch signal to described commutation circuit 230, be designated as the TS signal), control the connection status of described commutation circuit 230 and described low speed/fault-tolerant CAN transceiver 221, described high-speed CAN transceiver 222; Can send the CAN transceiver to described commutation circuit 230 and insert signal (CAN Transceiver Connect signal, be designated as the TC signal), control described commutation circuit 230 and outside CAN bus establishment of connection, realization CAN transceiver is communicated by letter with outside CAN bus.
It will be appreciated by persons skilled in the art that when outside CAN bus is in dominance position, recessive position and dormancy that the magnitude of voltage of the high line of the CAN of high-speed CAN (CAN_H) is not less than the magnitude of voltage of the low line (CAN_L) of CAN of high-speed CAN all the time; The magnitude of voltage of the high line of the CAN of low speed/fault-tolerant CAN (CAN_H) might be higher than the magnitude of voltage of the low line (CAN_L) of CAN of low speed/fault-tolerant CAN, also might be lower than the magnitude of voltage of the low line (CAN_L) of CAN of low speed/fault-tolerant CAN.
Concrete, high-speed CAN bus voltage schematic diagram as shown in Figure 3, in the high-speed CAN, voltage difference on CAN_H line 001 and the CAN_L line 002 is represented dominance level signal 0 when 1.5V~3.0V, the voltage difference on CAN_H line 001 and the CAN_L line 002 is represented recessive level signal 1 during for-0.5V~0.05V.As can be seen, the magnitude of voltage of the CAN_H line 001 of high-speed CAN is not less than the magnitude of voltage of the CAN_L line 002 of high-speed CAN all the time among Fig. 3.
Low speed/fault-tolerant CAN bus voltage schematic diagram as shown in Figure 4, among low speed/fault-tolerant CAN, voltage difference on CAN_H line 001 and the CAN_L line 002 is represented dominance level signal 0 when 2.2V~5V, the voltage difference on CAN_H line and the CAN_L line for-5V~-represent recessive level signal 1 during 4.4V.As can be seen, the magnitude of voltage of the CAN_H line 001 of low speed/fault-tolerant CAN might be higher than the magnitude of voltage of the CAN_L line 002 of low speed/fault-tolerant CAN among Fig. 4, also might be lower than the magnitude of voltage of the CAN_L line 002 of low speed/fault-tolerant CAN.
High-speed CAN bus dormancy level schematic diagram as shown in Figure 5, in the high-speed CAN, the dormancy when time A of CAN_H line 001 and CAN_L line 002, its voltage difference is 0V during dormancy.Low speed/fault-tolerant CAN bus dormancy level schematic diagram as shown in Figure 6, among low speed/fault-tolerant CAN, the dormancy when time B of CAN_H line 001 and CAN_L line 002, voltage difference is-12V during dormancy.
In sum, the contrast of the magnitude of voltage under high-speed CAN bus and low speed/fault-tolerant each state of CAN bus is as shown in table 1:
Table 1
Figure BDA00002991388100071
As shown in Figure 7, a kind of CAN type decision circuitry principle schematic disclosed by the invention can comprise: outside CAN Bus Wire voltage collection circuit 010, hysteresis loop comparator 020 and dc bias circuit 030.
Concrete, outside CAN Bus Wire voltage collection circuit 010 can comprise CAN line voltage acquisition resistance R 1 and CAN line voltage acquisition resistance R 2, CAN line voltage acquisition resistance R 1 can be connected by high line 001 with the CAN of outside CAN bus, CAN line voltage acquisition resistance R 2 can be connected by low line 002 with the CAN of outside CAN bus, the resistance value of CAN line voltage acquisition resistance R 1 can be greater than 1 megohm, the resistance value of CAN line voltage acquisition resistance R 2 also can be greater than 1 megohm, signal on the outside CAN bus is impacted avoiding, the collection of outside CAN Bus Wire voltage is caused interference.Wherein, the A voltage of ordering is V A=(V CAN_H-V CAN_L)/2, dissimilar outside CAN buses, A point voltage difference under different conditions, as shown in table 2:
Table 2
? The dominance position Recessive position Dormancy
High-speed CAN bus 1.1V 0V 0V
Low speed/fault-tolerant CAN bus 1.5V -2.5V -6V
CAN bus specification ISO11898 regulation, CAN bus must send a recessive position after sending five dominance positions; After sending five recessive positions, must send a dominance position, namely if the CAN bus is not in resting state, and dominance position and recessive position are bound to alternately occur.So, if equipment inserts is high-speed CAN bus, A point voltage V then AAlways not for negative; If that equipment inserts is low speed/fault-tolerant CAN bus, then A point voltage V ABe bound to occur negative value.
Hysteresis loop comparator 020 can comprise operational amplifier A 1, resistance R 3, resistance R 4 and resistance R 5, and the value of resistance R 3 and resistance R 4 rationally is set, the threshold value of hysteresis loop comparator 020 can be arranged on+0.5V and-0.5V; At V ADuring greater than 0.5V, the voltage that B is ordered is 5V, at V ADuring less than-0.5V, the voltage that B is ordered is-5V.When outside CAN bus was subjected to external disturbance, the level on CAN_H and the CAN_L may produce fluctuation, made the 0V in the table 2 that minor fluctuations (becoming 0.1V as 0V) be arranged.For avoiding the influence of external disturbance, the threshold value that we can hysteresis loop comparator 020 is set to positive and negative 0.5V by 0V, so that outside CAN bus type is judged is more accurate.
Wherein, the voltage of operational amplifier A 1 can be changed according to actual needs.
Dc bias circuit 030 can comprise resistance R 6 and resistance R 7, and its supply power voltage is 5V, and wherein, supply power voltage can be changed according to the difference of selector.The amplitude that dc bias circuit 030 can be ordered to B for+5V and-signal of 5V carries out the level adjustment, when making the B point for+5V, CT signal (CANType signal, the CAN type is judged signal) be output as+the 5V high level, the B point is-during 5V, the CT signal is output as the 0V low level, to obtain being fit to the CAN type judgement signal of microcontroller 210.
In summary it can be seen that if the equipment access is high-speed CAN bus, then the CT signal is+the 5V high level always; If what equipment inserted is low speed/fault-tolerant CAN bus, then the CT signal is the level signal that low level or high-low level replace, 210 pairs of equipment of microcontroller insert a period of time (for example 20ms) interior CT signals collecting after the outside CAN bus, namely can judge the outside CAN bus type that current device inserts.
As shown in Figure 8, the disclosed a kind of commutation circuit principle schematic of the embodiment of the invention, commutation circuit can comprise: first switching circuit 1 and second switch circuit 2;
Described first switching circuit 1 can comprise: first fixed contact 01, second fixed contact 02, the 3rd fixed contact 03, the 4th fixed contact 04, first moving contact 05 and second moving contact 06; Described first fixed contact 01 can be connected with described first switch terminal 231, described second fixed contact 02 can be connected with described the 3rd switch terminal 233, described the 3rd fixed contact 03 can be connected with described second switch terminal 232, and described the 4th fixed contact 04 can be connected with described the 4th switch terminal 234; Described first moving contact 05 can be connected with described first fixed contact 01, described second fixed contact 02, and described second moving contact 06 can be connected with described the 3rd fixed contact 03, described the 4th fixed contact 04;
Described second switch circuit 2 can comprise: first fixed contact 10, second fixed contact 11, first moving contact 12 and second moving contact 13; Described first fixed contact 10 can be connected with described first link 235, and described second fixed contact 11 can be connected with described second link 236; Described first moving contact 12 can be connected with described first fixed contact 10, and described second moving contact 13 can be connected with described second fixed contact 11;
Wherein, first moving contact 05 of described first switching circuit 1 is connected with first moving contact 12 of described second switch circuit 2, and second moving contact 06 of described first switching circuit 1 is connected with second moving contact 13 of described second switch circuit 2.
It will be appreciated by persons skilled in the art that first switching circuit 1 can comprise single-pole double throw relay S1, the S2 of two interlocks, second switch circuit 2 can comprise single-pole single-throw(SPST relay S3, the S4 of two interlocks;
Single-pole double throw relay S1, the S2 of two interlocks, can receive CAN transceiver switching signal (the CAN Transceiver Switch signal that microcontroller 210 sends, be designated as the TS signal), control the switching of its Chang Kaiduan and normal-closed end, to realize the connection status of first switching circuit 1 and described low speed/fault-tolerant CAN transceiver 221, described high-speed CAN transceiver 222;
Single-pole single-throw(SPST relay S3, the S4 of two interlocks, can receive CAN transceiver access signal (the CAN Transceiver Connect signal that microcontroller 210 sends, be designated as the TC signal), control its break-make, to realize cut-out or the foundation of second switch circuit 2 and outside CAN bus.
Concrete, for example, when the normal-closed end (the 3rd fixed contact 03 and second moving contact 06 contact) of the normal-closed end of single-pole double throw relay S1 (first fixed contact 01 and 05 contact of first moving contact) and single-pole double throw relay S2 be connected with low speed/fault-tolerant CAN transceiver 221 respectively, the Chang Kaiduan (the 4th fixed contact 04 contacts with second moving contact 06) of the Chang Kaiduan of single-pole double throw relay S1 (second fixed contact 02 with the contact of first moving contact 05) and single-pole double throw relay S2 be connected with high-speed CAN transceiver 222 respectively, single-pole single-throw(SPST relay S3 and single-pole single-throw(SPST relay S4 all are in off-state, and namely commutation circuit 230 does not establish a connection with outside CAN bus.
When CAN type decision circuitry 240 judges that the type of outside CAN bus is high-speed CAN bus, CAN type decision circuitry 240 sends connected microcontroller 210 with this judged result, microcontroller 210 sends the TS signal to commutation circuit 230 earlier, finish by the switching of normal-closed end to Chang Kaiguan with control single-pole double throw relay S1 and single-pole double throw relay S2, namely finish the switching of low speed/fault-tolerant CAN transceiver 221 and high-speed CAN transceiver 222; Microcontroller 210 sends the TC signal to commutation circuit 230 again, so that single-pole single-throw(SPST relay S3 and single-pole single-throw(SPST relay S4 and outside CAN bus establish a connection.
Wherein, the normal-closed end of the normal-closed end of single-pole double throw relay S1 and single-pole double throw relay S2 can also be connected with high-speed CAN transceiver 222 respectively, the Chang Kaiduan of the Chang Kaiduan of single-pole double throw relay S1 and single-pole double throw relay S2 is connected with low speed/fault-tolerant CAN transceiver 221 respectively, operation principle is the same, repeats no more herein.
In summary it can be seen, CAN bus data transceiver inserts outside CAN bus when beginning, but the two does not establish a connection, after CAN type decision circuitry 240 is judged the type of outside CAN bus, judged result is sent to connected microcontroller 210, it is the TS signal that microcontroller 210 sends CAN transceiver switching signal to commutation circuit 230 earlier, to select appropriate C AN transceiver, sending the CAN transceivers to commutation circuit 230 then, to insert signals be the TC signal, is consistent with the type of the outside CAN bus that guarantees to insert and the CAN transceiver type of access.And low speed/fault-tolerant CAN transceiver 221 and high-speed CAN transceiver 222 can not insert the CAN bus simultaneously, thereby have avoided the influence to the generation of the signal on the CAN bus, have guaranteed the quality of signal of communication.
Preferably, described microcontroller 210 can be connected with host computer, and described host computer can be stored the data message that outside CAN bus transmits.
Each embodiment adopts the mode of going forward one by one to describe in this specification, and what each embodiment stressed is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and defined General Principle can realize under the situation that does not break away from the spirit or scope of the present invention in other embodiments herein.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the wideest scope consistent with principle disclosed herein and features of novelty.

Claims (4)

1. a CAN bus data transceiver is characterized in that, comprising: microcontroller, low speed/fault-tolerant CAN transceiver, high-speed CAN transceiver, commutation circuit and CAN type decision circuitry;
First output of described microcontroller is connected with the input of described low speed/fault-tolerant CAN transceiver, and the first input end of described microcontroller is connected with the output of described low speed/fault-tolerant CAN transceiver;
Second output of described microcontroller is connected with the input of described high-speed CAN transceiver, and second input of described microcontroller is connected with the output of described high-speed CAN transceiver;
The one I/O port of described low speed/fault-tolerant CAN transceiver is connected with first switch terminal of described commutation circuit, and the 2nd I/O port of described low speed/fault-tolerant CAN transceiver is connected with second switch terminal of described commutation circuit;
The one I/O port of described high-speed CAN transceiver is connected with the 3rd switch terminal of described commutation circuit, and the 2nd I/O port of described high-speed CAN transceiver is connected with the 4th switch terminal of described commutation circuit;
First link of described commutation circuit can be connected by high line with the CAN of outside CAN bus, and second link of described commutation circuit can be connected by low line with the CAN of outside CAN bus;
Described first link is connected with the first input end of described CAN type decision circuitry, described second link is connected with second input of described CAN type decision circuitry, described CAN type decision circuitry is according to the difference of the voltage on the low line of CAN of the voltage on the high line of CAN of described outside CAN bus and described outside CAN bus, the outside CAN bus type of the current access of judgment device, and judged result sent to the described microcontroller that links to each other with described CAN type decision circuitry;
First control end of described microcontroller is connected with first control end of described commutation circuit, and second control end of described microcontroller is connected with second control end of described commutation circuit; When described commutation circuit is connected cut-out with outside CAN bus, described microcontroller is according to the judged result of described outside CAN bus type, send CAN transceiver switching signal to described commutation circuit, control the connection status of described commutation circuit and described low speed/fault-tolerant CAN transceiver, described high-speed CAN transceiver; Send the CAN transceiver to described commutation circuit and insert signal, control described commutation circuit and outside CAN bus establishment of connection, realization CAN transceiver is communicated by letter with outside CAN bus.
2. CAN bus data transceiver according to claim 1 is characterized in that, described commutation circuit comprises first switching circuit and second switch circuit;
Described first switching circuit comprises: first fixed contact, second fixed contact, the 3rd fixed contact, the 4th fixed contact, first moving contact and second moving contact; Described first fixed contact is connected with described first switch terminal, and described second fixed contact is connected with described the 3rd switch terminal, and described the 3rd fixed contact is connected with described second switch terminal, and described the 4th fixed contact is connected with described the 4th switch terminal; Described first moving contact can be connected with described first fixed contact, described second fixed contact, and described second moving contact can be connected with described the 3rd fixed contact, described the 4th fixed contact;
Described second switch circuit comprises: first fixed contact, second fixed contact, first moving contact and second moving contact; Described first fixed contact is connected with described first link, and described second fixed contact is connected with described second link; Described first moving contact can be connected with described first fixed contact, and described second moving contact can be connected with described second fixed contact;
Wherein, first moving contact of described first switching circuit is connected with first moving contact of described second switch circuit, and second moving contact of described first switching circuit is connected with second moving contact of described second switch circuit.
3. CAN bus data transceiver according to claim 2 is characterized in that, described first switching circuit comprises the single-pole double throw relay of two interlocks, and described second switch circuit comprises the single-pole single-throw(SPST relay of two interlocks;
The single-pole double throw relay of described two interlocks, receive the CAN transceiver switching signal that described microcontroller sends, control the switching of its Chang Kaiduan and normal-closed end, to realize the connection status of described first switching circuit and described low speed/fault-tolerant CAN transceiver, described high-speed CAN transceiver;
The single-pole single-throw(SPST relay of described two interlocks receives the CAN transceiver access signal that described microcontroller sends, and controls its break-make, with cut-out or the foundation that realizes that described second switch circuit is connected with outside CAN bus.
4. CAN bus data transceiver according to claim 1 is characterized in that described microcontroller is connected with host computer, and described host computer can be stored the data message that outside CAN bus transmits.
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CN103368801A (en) * 2013-08-02 2013-10-23 常州市新科汽车电子有限公司 High-and-low speed CAN (controller area network) bus compatible device and working method thereof
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CN109361584A (en) * 2018-10-20 2019-02-19 中国航空工业集团公司洛阳电光设备研究所 A kind of CAN bus input/output interface system
CN111614506A (en) * 2019-02-22 2020-09-01 沃尔沃汽车公司 Monitoring CAN node
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CN110442070A (en) * 2019-09-09 2019-11-12 山东理工大学 A kind of signal light control tutoring system of changeable communication mode
CN111882852A (en) * 2020-07-14 2020-11-03 深圳市信锐网科技术有限公司 Access detection circuit, method, master device and storage medium
CN111882852B (en) * 2020-07-14 2021-10-22 深圳市信锐网科技术有限公司 Access detection circuit, method, master device and storage medium
CN112152897A (en) * 2020-09-14 2020-12-29 珠海格力电器股份有限公司 Communication chip circuit, communication method, storage medium, and electronic device
CN112152897B (en) * 2020-09-14 2021-11-02 珠海格力电器股份有限公司 Communication chip circuit, communication method, storage medium, and electronic device

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