Summary of the invention
The objective of the invention is to the deficiency at above-mentioned prior art, a kind of SAR formation method based on on-site programmable gate array FPGA is provided, with simplied system structure, reduce power consumption, improve the conversion speed of radar imagery.
For achieving the above object, the present invention includes following steps:
(1) produces 16384 hamming window with Matlab software, and it is quantized into the 9bit signed fixed-point number deposits among the ROM, the radar return distance is multiplied each other to the hamming window among data and the ROM, adjust the distance to the windowing of data with realization;
(2) distance after the windowing is carried out the FFT computing to data, finish apart from pulse pressure;
(3) according to oblique distance, angle of squint, the flying speed of radar front end inertial navigation, be calculated to be position, image field scape center, and respectively intercept as about the mid point 1024 totally 2048 point data when producing address out of range, begin intercepting from particular point 0 or 14337 as imaging data;
(4) the radar return data are upwards pressed 512 pulses of repetition accumulation of radar transmitted pulse in the orientation, obtain 512 columns according to as sub-aperture data, will store behind the data transposition of sub-aperture;
(5) respectively to the every capable orientation of step (4) neutron aperture data to data computation, obtain 2048 Doppler's central values, 2048 orientation obtaining are averaged Doppler center as this sub-aperture to the summation of Doppler's central value;
(6) calculate doppler frequency rate according to carrier aircraft speed, angle of squint and the oblique distance of radar front end inertial navigation;
(7) the Doppler center that obtains according to step (5) obtains the Doppler shift function, and the doppler frequency rate according to step (6) obtains obtains the doppler frequency rate function; And produce 512 hamming window with Matlab software, and it is quantized into the 16bit signed fixed-point number deposits among the ROM;
(8) with the every capable orientation of step (4) neutron aperture data to data respectively with step (7) in Doppler shift function, doppler frequency rate function, hamming window data multiply each other, finish orientation Dechirp and handle in earlier stage;
(9) to the sub-aperture data after handling through step (8) by its orientation to doing the FFT computing, obtain the orientation frequency domain of sub-aperture data, each data of orientation frequency domain are asked the mould value, obtain final imaging data.
The present invention has following advantage:
The first, the present invention adopts FPGA as kernel processor chip, functions such as because FPGA has abundant internal resource, the IP kernel that can call FPGA inside in data handling procedure is realized the reading in of data, taken advantage of again, phase calculation, fast operation; And FPGA parallel processing degree height, processing speed is fast, has improved the conversion speed of radar imagery.
Second, the tradition imaging algorithm realizes adopting the complicated many integrated circuit boards form of FPGA+DSP deal with data, wherein, realizes the radar return distance to the windowing of data and apart from pulse pressure with FPGA, realize windowing and the orientation Dechirp of radar return orientation to data with DSP, and in the present invention, FPGA not only is used for handling distance to data, and handles the orientation to data, signal is handled and has only been used FPGA chip in the total system like this, system architecture is simplified, and power consumption reduces, and reliability increases.
Specific embodiments
The present invention will be further described below in conjunction with accompanying drawing.
With reference to Fig. 1, concrete implementation step of the present invention is as follows:
The compression of step 1. range pulse
1.1) windowing process: I, Q two paths of data be the real imaginary part of radar return data, calls the multiplication IP kernel of two FPGA inside, I, the Q two paths of data with the radar return data multiply by window function respectively.Wherein, window function is 16384 the hamming window that produces with Matlab software, deposits among the ROM of FPGA after its normalizing is quantized into the 9bit signed number; I, Q two paths of data are the echo datas that radar AD collects, be 12bit, be spliced into the 16bit data after the front end zero padding, multiplier output result is 25bit, because follow-up FFT requirement data bits is 2 power power, so the 25bit data cutout is become 16bit, gets the 24th sign bit as the data after the intercepting of multiplier output data during intercepting, the 6th to the 20th data bit as these data;
1.2) call the inner FFT nuclear of FPGA, the output of previous step multiplier is FFT by the data of cut position handles, FFT nuclear input data width and phase place bit wide are set are 16bit, adopt the Scaled pattern, make the output data also be 16bit.
Step 2. intercepting distance is to data
The oblique distance that inertial navigation provides according to radar, angle of squint, flying speed are calculated scene center position x, with x be respectively intercept about mid point 1024 totally 2048 point data as distance to effective contextual data, when x less than 1023 or greater than 15360 the time, just can not respectively intercept 1023 points at x the right and left, when x begins intercepting with the first point of scene less than 1023 the time; When x is that starting point begins intercepting with 14337 then greater than 15360 the time.
Step 3. data accumulation and transposition.
The DDRII of the plug-in 2 groups of 1GB of FPGA, step 2 is finished distance behind data cutout, every row 2048 point data are deposited among the DDRII, accumulation 512 row backs are as the data in a sub-aperture, realize data transposition according to the quick transposition algorithm of DDRII, make sub-aperture data by the orientation to 512 arrangements, handle to data in order to carry out follow-up orientation.
Doppler center, step 4. estimator aperture and doppler frequency rate.
4.1) the estimating Doppler central value:
4.1.1) call the complex multiplication IP kernel of FPGA inside, the delegation orientation to data dislocation conjugation dot product, is obtained the auto-correlation vector, the complex multiplication IP kernel is input as the plural number that the real imaginary part of two-way is respectively 16bit, is output as the plural number that one tunnel real imaginary part is respectively 16bit;
4.1.2) to auto-correlation vector summation average and obtain autocorrelation value, the CORDIC IP kernel that calls FPGA inside calculates the phase angle [alpha] of autocorrelation value, here the real imaginary part that is input as autocorrelation value of CORDIC IP kernel is exported the phasing degree that is this autocorrelation value;
4.1.3) according to the autocorrelation value phase angle [alpha] that previous step obtains, calculate Doppler center f by following formula
Dc:
f
dc=α×PRF/2/π,
Wherein, PRF is the repetition of radar emission signal.
Here the calculating at Doppler center is to call the multiplier of FPGA inside to realize, a road of multiplier is input as the autocorrelation value phase angle [alpha], another road is PRF/2/ π, here need in Matlab software, it to be quantized into the signed fixed-point number that has same bit-width with autocorrelation value R phase angle earlier, be re-used as the input of multiplier.
4.1.4) repeating step 4.1.1) to step 4.1.3) three steps, until obtain all orientation to Doppler's central value, 2048 orientation obtaining are averaged Doppler center as this sub-aperture to the summation of Doppler's central value;
4.2) call the multiplier of FPGA inside, according to carrier aircraft speed v, angle of squint θ and the oblique distance Rs of radar front end inertial navigation, calculate doppler frequency rate ka by following formula:
ka=-2v
2cos
2θ/λ/Rs,
Wherein, λ is the wavelength of radar emission signal.
Operate to Dechirp in step 5. orientation.
5.1) windowing process
To multiply by window function respectively through I, the Q two paths of data that step 1 is handled the back data to step 3.Wherein, I, Q two paths of data refer to real part and the imaginary part of data respectively; Window function is 512 the hamming window that produces with Matlab software, deposits among the ROM of FPGA after its normalizing is quantized into the 16bit signed number; Call the multiplication IP kernel of two FPGA inside, from ROM, read the hamming window data of 16bit as one tunnel input of multiplication IP kernel, the orientation is imported as another road of two multiplication IP kernels respectively to real part, the imaginary part of 512 16bit data, obtain the 32bit data after multiplying each other, namely finished the windowing operation;
5.2) structure Doppler shift function
The Doppler shift function is according to step 4.1) in Doppler's central configuration of estimating, concrete steps are as follows:
5.2.1) being spaced apart 1 with the always module generation from-255 to 256 of FPGA inside, length is 512 vector, wherein the bit wide of each data is set to 10bit;
5.2.2) use Matlab software with 2 * π * f
Dc/ PRF is quantized into the 10bit signed fixed-point number, deposits among the ROM of FPGA, wherein f
DcBe step 4.1) in the Doppler center that estimates;
5.2.3) call the inner multiplication IP kernel of FPGA, with step 5.2.1) the vector sum step 5.2.2 that obtains) fixed-point number that obtains is as two groups of inputs of multiplication IP kernel, is output as length and is 512 vector;
5.2.4) call the CORDIC IP kernel of FPGA, with step 5.2.3) in the vector quantity that obtains change into the 10bit signed number according to the input as the CORDIC IP kernel, be output as one complex vector located, wherein the real part of output vector is the trigonometric function cos of input vector, imaginary part is the trigonometric function sin of CORDIC IP kernel input vector, and output vector is the Doppler shift function.
5.3) structure doppler frequency rate function
The doppler frequency rate function is to utilize step 4.2) in estimate the doppler frequency rate structure obtain, concrete steps are as follows:
5.3.1) with Matlab software produce from-255 to 256 be spaced apart 1, length is 512 vector, each element in the vector all divided by asking behind the radar emission signal repetition PRF square, changes into the 16bit signed number with this data volume then, stores among the ROM of FPGA;
5.3.2) call FPGA multiplication IP kernel, with step 5.3.1) vector that obtains is as one tunnel input of multiplication IP kernel, with step 4.2) in estimate that the ka obtain intercepts into the data that bit wide is 16bit after, as another road input of multiplication IP kernel, the multiplication IP kernel is output as the new vector that one group of bit wide is 32bit;
5.3.3) call the CORDIC IP kernel of FPGA, with step 5.3.2) in the vector that obtains as the input of CORDIC IP kernel, be output as one complex vector located, wherein the real part of output vector is the trigonometric function cos of input vector, imaginary part is the trigonometric function sin of CORDIC IP kernel input vector, and output vector is the doppler frequency rate function;
5.4) orientation is to data configuration
Call FPGA complex multiplication IP kernel twice, for the first time the complex multiplication IP kernel with the orientation of radar return to data and step 5.2) the Doppler shift function that obtains multiplies each other, and is output as the 48bit plural number; With the first time complex multiplication output as one tunnel input of second complex multiplication IP kernel, another road is input as step 5.3) in estimate the doppler frequency rate function obtain, be output as the data of 64bit, become real imaginary part to be the data of 32bit through the data cut position.
5.5) orientation is to data FFT
Calling the FFT IP kernel of FPGA inside, with step 4.4) result vector that produces is as the input of FFT IP kernel, and FFT IP kernel output bit wide is that the data of 32bit are final imaging data, and so far, the processing of radar return data is all finished.
Effect of the present invention can further specify by following actual measurement:
The emulation content is shone airborne radar one group of echo data in somewhere as the pending radar return data of the present invention, handles this data with the inventive method, draws gray-scale map with the data after handling, as shown in Figure 2.Can find out bridge, river, highway and farmland clearly among Fig. 2, imaging effect is good, and visible SAR formation method based on FPGA provided by the invention is rationally feasible.