CN103193192A - Method for isolating functional structure Si and sacrificial layer Si in bulk silicon machining - Google Patents
Method for isolating functional structure Si and sacrificial layer Si in bulk silicon machining Download PDFInfo
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- CN103193192A CN103193192A CN2012100026784A CN201210002678A CN103193192A CN 103193192 A CN103193192 A CN 103193192A CN 2012100026784 A CN2012100026784 A CN 2012100026784A CN 201210002678 A CN201210002678 A CN 201210002678A CN 103193192 A CN103193192 A CN 103193192A
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Abstract
The invention discloses a method for isolating functional structure Si and sacrificial layer Si in bulk silicon machining. The method comprises the following steps: 1, taking an SOI silicon chip which sequentially comprises, from top to bottom, an upper silicon layer, a silicon oxide layer and a lower silicon layer, and manufacturing a device part on the upper silicon layer as needed for the utilization of a deep etching technology and an oxidizing technology of the functional structure Si to realize the isolation of the functional structure Si from the sacrificial layer Si; 2, depositing a masking layer on the surface of the lower silicon layer, etching away the needless masking layer to expose the lower silicon layer, and carrying out deep silicon etching of the exposed lower silicon layer until the silicon oxide layer is exposed; 3, etching away superfluous silicon on the upper silicon layer; and 4, etching away the silicon oxide layer exposed in step 2. The method allows the functional structure silicon to be completely surrounded, and the complete corrosion of the sacrificial layer Si and the complete reservation of the structure layer Si to be realized through utilizing the high selection ratio of the above two materials in corrosion release, and the technological difficulty of the method is substantially reduced, so the method is especially suitable for the large-scale production.
Description
Technical field
The present invention relates to a kind of partition method that in the processing of body silicon, is used for the Si of functional structure Si and sacrifice layer.
Background technology
In the MEMS device, there is quite a few device need make cavity structure or directly with the substrate hollow out, implementation structure separates with substrate.For example, apply to core texture---the cantilever beam structures of new-type memory or measuring surface form instrument, the free standing structure film structure of acceleration transducer, shear force sensor, temperature sensor, the core devices of non-refrigerated infrared detector---infrared focal plane array etc.Such device is finished by silicon substrate surface micro-processing technology and the combination of body micro-processing technology usually, is conducive to large-scale production.But as the making of hanging structures such as cantilever beam, generally need to adopt the sacrifice layer release tech, and the sacrificial layer release process complexity can cause the adhesion of structure sheaf and substrate usually after the release, be head it off, a kind of method is for to make little tip in functional layer or substrate.Little tip is made through excessive erosion usually, and corrosion can cause the corrosion non-uniform phenomenon usually for a long time, causes the actual effect of partial function structure, is unfavorable for the making of big array; Utilize the high heat capacity thermal conductance characteristic of Si to improve the performance of device as heat sink structure as infrared focal plane array, but by increasing this structure, release to structure causes great difficulty, the corrosion release process is difficult to hold, the inhomogeneities of the long-time corrosion zone of causing just discharges and finishes on the other hand, corrosion is owed in the regional excessive erosion that has, the zone that has, and causes some regional performance off-design.Technology realizes very difficult, needs strict assurance, is unfavorable for the production of large scale array.
Summary of the invention
In order to overcome above-mentioned defective, the invention provides a kind of partition method that in the processing of body silicon, is used for the Si of functional structure Si and sacrifice layer, this method can make functional structure silicon be surrounded fully, corrosion utilizes the high selectivity of two kinds of materials when discharging, realized that Si as sacrifice layer is corroded fully and kept fully as the Si of structure sheaf, technology difficulty reduces greatly, especially is fit to manufacturing of big displayization.
The present invention for the technical scheme that solves its technical problem and adopt is: a kind of partition method that is used for the Si of functional structure Si and sacrifice layer in the processing of body silicon may further comprise the steps:
1. get soi wafer, this soi wafer is followed successively by upper silicon layer, silicon oxide layer and lower silicon layer from top to bottom, makes device portions on described upper silicon layer as required, and the Si that is used for functional structure utilizes deep etching technology to add the oxidation technology, realizes the isolation with sacrifice layer silicon;
2. deposit one deck masking layer on the surface of lower silicon layer, and unwanted masking layer etched away, expose lower silicon layer, begin to carry out the deep erosion of silicon on this lower silicon layer surface of exposing then, till etching into silicon oxide layer;
3. silicon etching unnecessary on the above-mentioned upper silicon layer is fallen;
4. the silicon oxide layer that above-mentioned steps is exposed in 2. etches away.
As a further improvement on the present invention, the material of described masking layer is one of photoresist, silica and aluminium.
The invention has the beneficial effects as follows: by SOI oxygen buried layer and deep trouth oxide layer, function Si and the Si that is used for sacrifice layer are isolated fully, when bulk silicon etching, play a very good protection; Solve long-time corrosion inhomogeneous problem when discharging, simplified the corrosion release process; The processing step of element manufacturing is simplified; Being highly suitable for large scale array makes.
Description of drawings
Fig. 1 is one of the method for the invention step structural representation;
Fig. 2 is two structural representations of the method for the invention step;
Fig. 3 is three structural representations of the method for the invention step;
Fig. 4 is four structural representations of the method for the invention step.
The specific embodiment
A kind of partition method that is used for the Si of functional structure Si and sacrifice layer in the processing of body silicon is characterized in that may further comprise the steps:
1. get soi wafer, this soi wafer is followed successively by upper silicon layer 1, silicon oxide layer 2 and lower silicon layer 3 from top to bottom, make device portions (as shown in Figure 1) on described upper silicon layer as required, the Si that is used for functional structure utilizes deep etching technology to add the oxidation technology, realizes the isolation with sacrifice layer silicon;
2. deposit one deck masking layer 4 on the surface of lower silicon layer, and unwanted masking layer etched away, expose lower silicon layer, begin to carry out the deep erosion of silicon on this lower silicon layer surface of exposing then, till etching into silicon oxide layer (as shown in Figure 2);
3. silicon etching unnecessary on the above-mentioned upper silicon layer is fallen (as shown in Figure 3);
4. the silicon oxide layer that above-mentioned steps is exposed in 2. etches away (as shown in Figure 4).
Preferably, the material of above-mentioned masking layer is one of photoresist, silica and aluminium.
Claims (2)
1. partition method that is used for the S i of functional structure S i and sacrifice layer in body silicon processing is characterized in that may further comprise the steps:
1. get soi wafer, this soi wafer is followed successively by upper silicon layer (1), silicon oxide layer (2) and lower silicon layer (3) from top to bottom, makes device portions on described upper silicon layer as required;
2. deposit one deck masking layer (4) on the surface of lower silicon layer, and unwanted masking layer etched away, expose lower silicon layer, begin to carry out the deep erosion of silicon on this lower silicon layer surface of exposing then, till etching into silicon oxide layer;
3. silicon etching unnecessary on the above-mentioned upper silicon layer is fallen;
4. the silicon oxide layer that above-mentioned steps is exposed in 2. etches away.
2. the partition method that is used for the Si of functional structure Si and sacrifice layer in body silicon processing according to claim 1, it is characterized in that: the material of described masking layer is one of photoresist, silica and aluminium.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104671190A (en) * | 2013-11-27 | 2015-06-03 | 中芯国际集成电路制造(上海)有限公司 | Protecting method for device surface |
CN105621341A (en) * | 2015-12-29 | 2016-06-01 | 苏州工业园区纳米产业技术研究院有限公司 | MEMS anchor area structure and preparation method thereof |
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CN101289160A (en) * | 2008-05-20 | 2008-10-22 | 无锡市纳微电子有限公司 | 0-100Pa monolithic silicon based SOI high-temperature low drift micropressure sensor and processing method thereof |
CN101520350A (en) * | 2009-03-24 | 2009-09-02 | 无锡市纳微电子有限公司 | Process for manufacturing improved high-sensitivity low pressure sensor chip |
CN101907769A (en) * | 2010-07-01 | 2010-12-08 | 西北工业大学 | Silicon on insulator (SOI) wafer double-mask etching-based vertical comb teeth driven torsional micro-mirror and manufacturing method thereof |
CN102279289A (en) * | 2011-03-09 | 2011-12-14 | 大连理工大学 | Method for manufacturing micro cantilever probe based on monocrystalline silicon (110) |
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- 2012-01-06 CN CN2012100026784A patent/CN103193192A/en active Pending
Patent Citations (5)
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US6143190A (en) * | 1996-11-11 | 2000-11-07 | Canon Kabushiki Kaisha | Method of producing a through-hole, silicon substrate having a through-hole, device using such a substrate, method of producing an ink-jet print head, and ink-jet print head |
CN101289160A (en) * | 2008-05-20 | 2008-10-22 | 无锡市纳微电子有限公司 | 0-100Pa monolithic silicon based SOI high-temperature low drift micropressure sensor and processing method thereof |
CN101520350A (en) * | 2009-03-24 | 2009-09-02 | 无锡市纳微电子有限公司 | Process for manufacturing improved high-sensitivity low pressure sensor chip |
CN101907769A (en) * | 2010-07-01 | 2010-12-08 | 西北工业大学 | Silicon on insulator (SOI) wafer double-mask etching-based vertical comb teeth driven torsional micro-mirror and manufacturing method thereof |
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CN104671190A (en) * | 2013-11-27 | 2015-06-03 | 中芯国际集成电路制造(上海)有限公司 | Protecting method for device surface |
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CN105621341A (en) * | 2015-12-29 | 2016-06-01 | 苏州工业园区纳米产业技术研究院有限公司 | MEMS anchor area structure and preparation method thereof |
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Application publication date: 20130710 |