CN103188042A - Matching method and matching accelerator of Internet protocol (IP) data package - Google Patents
Matching method and matching accelerator of Internet protocol (IP) data package Download PDFInfo
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Abstract
The invention discloses a matching method and a matching accelerator of an Internet protocol (IP) data package. The matching method and the matching accelerator are used for improving matching efficiency between the IP data package and a packet filter. According to the matching method, after an ith packet filter matches with head parameter values in the IP data package saved in a kth cache block, the ith packet filter can match with the head parameter values in the IP data package saved in a (k+1)th cache block, and the fact that matching is conducted after all the packet filters with the number of m in a matching module are matched with the IP data package saved in the kth cache block is not needed, namely, parallel processing can be conducted on the matching of all the packet filters in the matching module with the IP data package saved in all the cache blocks in an IP head parameter buffer, and matching efficiency between the IP data packages and the packet filters can be improved.
Description
Technical field
The present invention relates to the mobile communication system field, relate in particular to matching process and the coupling accelerator of a kind of IP packet in the traffic flow template.
Background technology
Along with wireless communication technology and network interconnection agreement (IP, Internet Protocol) technology combines closely, mobile communications network is from global system for mobile communications (GSM, Global System of Mobilecommunication) Circuit Switching Network of system develops into the packet switching network of GPRS (GPRS, GeneralPacket Radio Service).In order to satisfy the user to the new demand of high speed wireless data business, GPRS experience enhanced data rates for gsm evolution technology (EDGE, Enhanced Data Ratefor GSM Evolution) to 3G (Third Generation) Moblie technology (3G, 3rd-generation)/evolution of universal mobile telecommunications system (UMTS, Universal Mobile Telecommunications System).
Though the 3G mobile communication system has had significant improvement compared with 2G, but still can't satisfy user's requirement, further having released evolution UMTS technology again is evolved packet system (EPS, Evolved PacketSystem), target is for real-time and non-real-time service provide a kind of unified architecture, and the packet radio access technology of high data rate, low time delay and optimization is provided for the user.
This target is by two important component parts of EPS: wave point Long Term Evolution (LTE, LongTerm Evolution) and system architecture evolution (SAE, System Architecture Evolution) are finished.Simultaneously at service quality (QoS, Quality of Service), have paroxysmal characteristics at following data service, introduce the concept of EPS dedicated bearer and default bearing, reduced the setup delay of service bearer effectively, really realized user's " always online ".Default bearing is user's carrying that a kind satisfies data and the signaling of acquiescence QoS.Dedicated bearer is to the employed SAE carrying of some specific transactions.Special-purpose SAE carrying QoS is than the requirement height of acquiescence QoS generally speaking.Dedicated bearer is at subscriber equipment (UE, User Equipment) related up traffic flow template (TFT, Traffic FlowTemplate), at public data network gateway (PDNGW, Public Data Network Gateway) related descending TFT, the packet filter (PF, Packet Pilter) that comprises business data flow among the TFT has only IP packet and PF the match is successful and could transmit.
In the EPS system, all business data flows in the same carrying will obtain same QoS and ensure, different bearer types provides different QoS to ensure.An EPS carries the logical circuit that can regard as between subscriber equipment and the public data network gateway (PDNGW, Public Data Network Gateway), the corresponding EPS carrying of each the grouping IP filter (PF) in the traffic flow template.By with the corresponding PF of carrying, the business data flow under the PDN classified and is distributed in the different EPS carryings transmit.
In the EPS system, APN (APN, Access Point Name) connects may exist a plurality of dedicated bearers (containing a plurality of PF).If the property value of effective combinations of attributes mates entirely among the IP packet head parameter that receives and certain PF, then the match is successful for IP packet and PF, and the IP packet can transmit at the radio bearer of this PF mapping simultaneously.
The software of existing IP packet and PF is realized matching process, as shown in Figure 1, at Ti constantly, extract an IP packet (being IP1 Fig. 1) from IP traffic earlier, extraction header parameter and PF carry out matching ratio one by one from PF0 to PF255 according to the priority from this IP packet then, last till the IP packet the match is successful with certain PF wherein always, again with this IP packet and EPS bearing identification (EBI, EPS Bearer Identity) sending to protocol stack after the binding handles, constantly extract next IP packet (IP2) again at (Ti+1) then and carry out similar matching treatment, that is to say, the necessary wait of next IP bag when the match is successful when a last IP packet and PF, as shown in Figure 1, when IP1 in when coupling, IP2 must wait for, have only when IP1 and PF after the match is successful IP2 could begin to begin coupling one by one from the highest PF0 to PF255 of priority, the process of a serial that Here it is, and for the more and more higher speed uplink of present requirement, the match time that the implementation procedure of this serial needs is longer.
Summary of the invention
The embodiment of the invention provides a kind of matching process and coupling accelerator of IP packet, is used for improving the matching efficiency of IP packet and packet filter.
On the one hand, the matching process of the IP packet that the embodiment of the invention provides comprises:
IP header parameter buffer extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, is saved to respectively then in x the cache blocks of described IP header parameter buffer, and n wherein, x is positive integer;
I packet filter of described matching module mates the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and described k the cache blocks, wherein, described matching module comprises m packet filter, wherein, 1≤i＜(i+1)＜m, i, k, m are positive integers;
If the match is successful for the header parameter value of the IP packet of preserving in the match attribute value of described i packet filter and k the cache blocks, described main control module writes the evolved packet system of described i packet filter carrying index EBI in the structure of described k cache blocks corresponding IP data bag, and described main control module deposits the structure address of the IP packet preserved in described k the cache blocks in the transmit buffer in;
If it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of described i packet filter and described k the cache blocks, (i+1) individual packet filter of described matching module mates the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks;
After i packet filter of described matching module mated the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and described k the cache blocks, described i packet filter mated the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and (k+1) individual cache blocks.
On the other hand, the coupling accelerator that the embodiment of the invention provides comprises:
IP header parameter buffer, main control module, matching module, transmit buffer, wherein,
Described IP header parameter buffer comprises: x cache blocks, and wherein x is positive integer;
Described IP header parameter buffer, be used for from header parameter value and structure address that n IP packet of IP traffic extracts each IP packet respectively, be saved to respectively then in x the cache blocks of described IP header parameter buffer, wherein, n is positive integer;
Described matching module comprises m packet filter, wherein, and 1≤i＜(i+1)＜m, i, m are positive integers;
I packet filter of described matching module, the header parameter value that is used for IP packet that the match attribute value of described i packet filter and k cache blocks are preserved is mated, and wherein, k is positive integer;
Described main control module, be used for if the match is successful for the match attribute value of described i packet filter and the header parameter value of the IP packet that described k cache blocks preserved, EBI writes in the structure of described k cache blocks corresponding IP data bag with the evolved packet system of described i packet filter carrying index, and the structure address of the IP packet in described k the cache blocks is deposited in the described transmit buffer;
Described transmit buffer, the structure address of be used for preserving the IP packet that k cache blocks that described main control module deposits in preserve;
(i+1) individual packet filter of described matching module, be used for if it fails to match for the match attribute value of described i packet filter and the header parameter value of the IP packet that described k cache blocks preserved, the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks is mated;
I packet filter of described matching module, after the header parameter value that is used for IP packet that match attribute value and described k the cache blocks of described i packet filter are preserved is mated, the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and (k+1) individual cache blocks is mated.
As can be seen from the above technical solutions, the embodiment of the invention has the following advantages:
In embodiments of the present invention, IP header parameter buffer at first extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, be saved to respectively then in x the cache blocks in the IP header parameter buffer, i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, i packet filter advances coupling with the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks then, as seen, in embodiments of the present invention, after the header parameter value of the IP packet that i packet filter preserved in having mated k cache blocks, the header parameter value that just can mate the IP packet of preserving in (k+1) individual cache blocks again, and do not need in the matching module by the time m packet filter all with k cache blocks in data packet matched the finishing of IP that preserve carry out again afterwards, that is to say, in the embodiment of the invention, each packet filter in the matching module can parallel processing to the coupling of the IP packet preserved in each cache blocks in the IP header parameter buffer, can improve the matching efficiency of IP packet and packet filter.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention, the accompanying drawing of required use is done to introduce simply in will describing embodiment below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, to those skilled in the art, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the schematic diagram of the matching process of the IP packet that exists in the prior art and PF;
The schematic diagram of the matching process of the IP packet that Fig. 2 provides for the embodiment of the invention;
A kind of composition structural representation that mates accelerator that Fig. 3 provides for the embodiment of the invention;
The another kind that Fig. 4 provides for the embodiment of the invention mates the composition structural representation of accelerator;
Fig. 5 carries out the schematic diagram of matching treatment for what provide in the embodiment of the invention to an IP packet;
A plurality of IP data chains that Fig. 6 (a) provides for the embodiment of the invention carry out the schematic diagram of matching treatment constantly at Ti;
A plurality of IP data chains that Fig. 6 (b) provides for the embodiment of the invention carry out the schematic diagram of matching treatment constantly at Ti+1;
A plurality of IP data chains that Fig. 6 (c) provides for the embodiment of the invention carry out the schematic diagram of matching treatment constantly at Ti+2.
Embodiment
The embodiment of the invention provides a kind of matching process and coupling accelerator of IP packet, is used for improving the matching efficiency of IP packet and packet filter.
For make goal of the invention of the present invention, feature, advantage can be more obvious and understandable, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, the embodiments described below only are the present invention's part embodiment, but not whole embodiment.Based on the embodiment among the present invention, the every other embodiment that those skilled in the art obtains belongs to the scope of protection of the invention.
The matching process of the IP packet that the embodiment of the invention provides as shown in Figure 2, comprising:
201, IP header parameter buffer extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, is saved to respectively then in x the cache blocks of IP header parameter buffer.
N wherein, x is positive integer, n refers to the number of the IP packet that comprises in the IP traffic, x refers to the number of the cache blocks that comprises in the IP header parameter buffer, need to prove, the n that occurs in the embodiment of the invention, what the m of x and follow-up appearance referred to all is quantity, and can be the quantitative value that the applied environment according to reality changes, n, x, m refers to n, x, of these letters of m itself, can certainly letter or numeral replace arbitrarily with other, just show packet herein, cache blocks, the number of packet filter for illustrative purposes only, is not done restriction herein.
Need to prove, n and x do not have corresponding relation in the embodiment of the invention, n might be less than x, n might be greater than x, when initially beginning buffer memory IP packet, not necessarily all cache blocks in the IP header parameter buffer are filled up and go coupling again, might packet of buffer memory or several packet just begin the process of mating, for illustrative purposes only, do not do restriction herein.
In embodiments of the present invention, the coupling accelerator comprises: IP header parameter buffer, main control module, matching module, transmit buffer, wherein, IP header parameter buffer comprises: x cache blocks, matching module comprise m packet filter.Explanation about x, m sees aforementioned description for details, repeats no more herein.
In embodiments of the present invention, IP header parameter buffer offers matching module and carries out the PF coupling for header parameter value and the structure address of depositing the IP packet.Need to prove, the IP header parameter buffer that describe this moment has comprised x cache blocks, k cache blocks and (k+1) individual cache blocks have only been described in subsequent step, just in order clearly to describe workflow and the implementation of each cache blocks, certainly IP header parameter buffer also can comprise a plurality of cache blocks, but k cache blocks that the implementation of a plurality of cache blocks remains that the repetition embodiment of the invention provides and the workflow of (k+1) cache blocks still just are included among the embodiment of the invention.In actual applications, IP header parameter buffer can comprise x cache blocks, x is positive integer, because IP header parameter buffer is when carrying out the extraction of IP header parameter, matching module in the embodiment of the invention also carries out matching treatment at the same time, the speed of extracting when the IP header parameter is less than the PF rate matched in the matching module, the not enough situation of buffer memory just can not appear in IP header parameter buffer, in order to reduce the hardware resource expense, cache blocks in the IP header parameter buffer is specifically as follows 16 herein, and namely the cache blocks that comprises in the IP header parameter buffer is the 1st cache blocks, the 2nd cache blocks, ..., the 16th cache blocks.
In embodiments of the present invention, IP traffic comprises n IP packet, but can comprise a plurality of IP packets usually in the IP traffic (also can be an IP data chain) in actual applications, need to prove, the IP traffic of describing this moment comprises that n IP packet is just in order clearly to describe processed workflow and the implementation of each IP packet, certain IP traffic also can comprise a plurality of IP packets, but the processed flow process to the IP packet preserved in the IP packet preserved in k the cache blocks and (k+1) individual cache blocks to the implementation of a plurality of IP packets remains that the repetition embodiment of the invention provides still just is included among the embodiment of the invention.In each IP packet, all include header parameter value and the IP packet structure body address of IP packet, for example an IP packet just includes an IP packet head parameter value and an IP packet structure body address, and the 2nd IP packet just includes the 2nd IP packet head parameter value and the 2nd IP packet structure body address.
In embodiments of the present invention, IP header parameter buffer extracts header parameter value and structure address respectively and is saved to x cache blocks of IP header parameter buffer respectively from n IP packet of IP traffic, if IP header parameter buffer includes a plurality of cache blocks, a plurality of IP packet head parameter values and structure address can be kept in the idle cache blocks herein.
202, i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, if the match is successful, trigger step 203 and carry out, if not success of coupling triggers step 204 and carries out.
Wherein, matching module comprises m packet filter, wherein, and 1≤i＜(i+1)＜m, i, k, m are positive integers.I, k, (i+1) all be positive integer, i, (i+1) 1≤i＜(the i+1)＜m that satisfies condition, wherein i refers to i packet filter in the matching module, (i+1) refer to (i+1) individual packet filter in the matching module, k refers to k cache blocks in the IP header parameter buffer, need to prove, the i that occurs in the embodiment of the invention, k, (i+1) and (k+1) of follow-up appearance refer to all is some packet filters or cache blocks, if for example the i value is 3, what then refer to is the 3rd packet filter in the matching module, the k value is 1, what then refer to is the 1st cache blocks in the IP header parameter register, i in addition, k, (i+1) and (k+1) of follow-up appearance can be the quantitative value that the applied environment according to reality changes, i, k, (i+1), (k+1) be not to refer to i, k, (i+1), (k+1) these letters is own, can certainly letter or numeral replace arbitrarily with other, just show which packet filter herein, which cache blocks, for illustrative purposes only, do not do restriction herein.
In embodiments of the present invention, main control module is used for the control to IP header parameter buffer, matching module, transmit buffer, for example main control module to matching module, IP header parameter buffer, transmit buffer whether enable control, only under situation about enabling, its excess-three module could operate as normal.
In embodiments of the present invention, matching module comprises m packet filter, the implementation method of i packet filter has just been described in the step 202, need to prove, i packet filter in the matching module of describing this moment is just in order clearly to describe workflow and the implementation of a packet filter in the matching module, certainly matching module also can comprise a plurality of packet filters, but a plurality of branches are made the workflow that the implementation of filter remains i the packet filter that the repetition embodiment of the invention provides, and still just are included among the embodiment of the invention.
In embodiments of the present invention, matching module is main functional module, be used for that IP packet and network are joined the effective packet filter that gives and carry out matching ratio, and the EPS bearing identification (EBI, EPS Bearer Identity) of the packet filter correspondence that the match is successful is write in the structure of IP packet.Wherein, the matching principle of IP packet can mate to low according to priority is high, so the design of packet filtering device also can be according to mating to low order from the priority height.
Need to prove, in the invention process, the priority index of i packet filter (EPI, Evaluation Precedence Index) can be higher than the EPI of (i+1) individual packet filter, each packet filter is identified by unique packet filter identifier (PF ID), each packet filter includes a priority index simultaneously, the match attribute principle that the packet filter that each EPI is different adopts may be different, the value of EPI is only under the same direction (specifically referring to up direction or down direction) of all EPS carryings of using identical ip addresses and APN, the priority span of priority index is 0～255, wherein 0 the representative be that priority is the highest, 255 the representative be that priority is minimum.
In embodiments of the present invention, i packet filter mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, wherein, the match attribute value comprises at least one of following property value: far-end address and subnet mask property value, the Security Parameter Index property value, the flow label property value, the local port scope attribute value, the remote port scope attribute value, the 4th edition (IPv4 of Internet protocol, Internet Protocol version 4) grade of service property value in COS or the Internet protocol sixth version (IPv6, Internet Protocol version 6) in, next property value among protocol number or the IPV6 among the IPV4.
Can be with all packet filters and EPS carrying mutual mapping by EBI, each EPS carries corresponding EBI parameter and TFT.Can there be corresponding packet filter among each TFT, but can only have at most among the TFT during PDN connects and not have packet filter, that is to say if do not have on the default bearing packet filter so PDN connect in all corresponding coupling accelerators and all must have packet filter.
In view of the matching process of packet filter in the embodiment of the invention to the IP packet, the advantage that increases IP header parameter buffer is:
(1), in the Match IP packet, can extract the header parameter value of other IP packets in the IP traffic at matching module, thus improve matching efficiency;
(2), can reduce the hardware spending of matching module and matching ratio than the time IP packet head parameter the copy number of times, were it not for the IP header parameter buffer that the embodiment of the invention proposes, need open up another memory space so among each PF in the matching module and be used for depositing IP packet head parameter to be used for each matching ratio, each PF needs to increase the space same big with the property value register again like this, for 256 PF, whole matching module just needs extra 256 registers that increase, and has increased hardware spending; Secondly, the match is successful need be sent under the situation of next PF coupling when the IP packet is failed in previous PF, two kinds of methods are arranged, a kind of is to take out IP packet head parameter again from the IP packet, but because relate to two not parameters of fixed position in these header parameter, so the expense of peek ratio copy from the register of the header parameter of previous PF storing IP packet is bigger again; Another kind is to copy from a last PF, considers limiting case, then needs to copy 256 times.More both can reduce hardware spending and also can reduce the copy number of times so directly use IP header parameter buffer that the embodiment of the invention provides and the match attribute value among the PF to carry out matching ratio, improve matching efficiency.
Need to prove in addition, in the step 202 for k cache blocks and i packet filter, the effective cache blocks that all refers to and the packet filter that enables the free time (the just cache blocks that can read and the packet filter that can mate), comprise that (i+1) individual packet filter and (k+1) individual cache blocks of occurring in the subsequent step also refer to effective cache blocks and enable idle packet filter, also be for enabling idle packet filter, (i+1) individual packet filter might not be and i that packet filter that packet filter is adjacent that same (k+1) individual cache blocks also might not be and k that cache blocks that cache blocks is adjacent.In brief, for cache blocks: idle expression can write header parameter value and the structure address of IP packet inside, and effectively expression can be read header parameter value and the PF coupling in the cache blocks; For matching module, enable idle expression can with next valid cache piece in the header parameter value mate.
203, if the match is successful for the header parameter value of the IP packet of preserving in the match attribute value of i packet filter and k the cache blocks, main control module writes the evolved packet system of i packet filter carrying index EBI in the structure of k cache blocks corresponding IP data bag, and main control module deposits the structure address of the IP packet preserved in k the cache blocks in the transmit buffer in.
In embodiments of the present invention, if the match is successful for the header parameter value of the IP packet of preserving in the match attribute value of i packet filter and k the cache blocks, main control module writes the EBI of i packet filter in the structure of the IP packet of preserving in k the cache blocks, main control module deposits the structure address of the IP packet preserved in k the cache blocks in the transmit buffer in, wherein, transmit buffer is used for depositing the IP packet structure body address after the match is successful, the design of transmit buffer should be noted: it is excessive that the buffer area space does not need to open up, to reduce hardware spending.
Need to prove, in embodiments of the present invention, must comprise one in the IP packet structure body in order to store the member of corresponding EBI value, the match is successful or failure need write corresponding EBI value wherein as IP packet and PF, EBI with packet filter when namely the match is successful writes among the member of IP packet structure body correspondence, and all packet filters write the EBI in the main control module among the corresponding member of IP packet structure body during all with the data packet matched failure of IP.
Need to prove, in actual applications, after main control module deposits in the structure address of the IP packet preserved in k the cache blocks that the match is successful in the transmit buffer, can also comprise step: whether master control module judges satisfies the down trigger condition that presets, if satisfying then, main control module triggers interruption, protocol stack is exported in the structure address of the IP packet that transmit buffer will be preserved in transmit buffer, so that protocol stack is handled the structure address of IP packet, main control module does not trigger interruption if do not satisfy then.For example, main control module is that transmit buffer arranges the down trigger condition, when the interruption trigger condition satisfies, main control module triggers and interrupts, protocol stack is exported in the IP packet structure body address that transmit buffer will be preserved in transmit buffer, to satisfy in the IP traffic IP packet structure body address priority treatment to the match is successful.
In actual applications, the down trigger condition that presets of main control module specifically can comprise: the number of the IP packet structure body address of preserving in the transmit buffer is not less than preset number; Or, satisfy the idle condition of interrupting that triggers, wherein, the condition of idle triggering terminal comprises: all m packet filter of all cache blocks free time, matching module all is in the number of the structure address that enables the IP packet preserved in idle condition, the transmit buffer greater than zero in the IP header parameter buffer.
204, if it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of i packet filter and k the cache blocks, (i+1) individual packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of (i+1) individual packet filter and k the cache blocks.
In embodiments of the present invention, when the header parameter value of the IP packet of preserving in i packet filter and k cache blocks when it fails to match, by (i+1) individual packet filter continue with k cache blocks in the IP packet head parameter value preserved mate.This is a process that constantly continues to carry out, if contain a plurality of packet filters in the matching module, then when it fails to match, need proceed coupling at previous packet filter by the subsequent packets filter.
Need to prove, in embodiments of the present invention, a kind of attainable situation is, (i+1) individual packet filter of matching module can also comprise the steps: after the header parameter value of the IP packet preserved in the match attribute value of (i+1) individual packet filter and k the cache blocks is mated
As (i+1)=m, if it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of (i+1) individual packet filter and k the cache blocks, main control module writes the evolved packet system in main control module carrying index EBI in the structure of k cache blocks corresponding IP data bag, and main control module deposits the structure address of the IP packet preserved in k the cache blocks in the transmit buffer in.
That is to say, when all it fails to match as if m the packet filter that comprises in the matching module, then main control module writes the EBI in the main control module in the IP packet of preserving in k the cache blocks, and main control module deposits the structure address of the IP packet preserved in k the cache blocks in the transmit buffer in.
Below describe for example, in actual applications, the priority span of priority index is 0～255, matching module specifically can comprise 256 packet filter PF, according to the order design from high to low of PF priority, be that to correspond to priority be 0 PF to PF0, PFk deposits and preferentially corresponds to the PF that priority is k, at first mated by PF0, if it fails to match, mated by PF1, it fails to match as if PF1, continuation is mated by PF2, ..., up to being mated by PF255, it fails to match as if PF255, then main control module writes the EBI of main control module in the structure of the IP packet of preserving in k the cache blocks, and main control module deposits the structure address of the IP packet in k the cache blocks in the transmit buffer in.
205, after i packet filter of matching module mated the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, i packet filter mated the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks.
In embodiments of the present invention, after i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, i packet filter mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks, because i packet filter just can be proceeded coupling work when enabling the free time, just can not mate afterwards and do not need m packet filter in the matching module by the time all to mate to finish, so can realize the matching way that walks abreast, improve matching efficiency.
Need to prove that in embodiments of the present invention, step 205 can also comprise the steps: before carrying out
Whether (i+1) individual packet filter of master control module judges matching module enables the free time, if, main control module trigger (i+1) individual packet filter carry out with k cache blocks in the header parameter value of the IP packet the preserved function of mating.Namely, before (i+1) individual packet filter begins to mate, master control module judges is the state of (i+1) individual packet filter once, if (i+1) individual packet filter is effective, main control module triggers (i+1) individual packet filter again and begins coupling work.
Need to prove, in the embodiment of the invention, before i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks, also comprise: whether (k+1) individual cache blocks is effective in the master control module judges IP header parameter buffer, if the header parameter value that main control module triggers the IP packet of preserving in i packet filter and (k+1) individual cache blocks is mated.
In embodiments of the present invention, IP header parameter buffer at first extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, be saved to respectively then in x the cache blocks in the IP header parameter buffer, i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, i packet filter advances coupling with the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks then, as seen, in embodiments of the present invention, after the header parameter value of the IP packet that i packet filter preserved in having mated k cache blocks, the header parameter value that just can mate the IP packet of preserving in (k+1) individual cache blocks again, and do not need in the matching module by the time m packet filter all with k cache blocks in data packet matched the finishing of IP that preserve carry out again afterwards, that is to say, in the embodiment of the invention, each packet filter in the matching module can parallel processing to the coupling of the IP packet preserved in each cache blocks in the IP header parameter buffer, can improve the matching efficiency of IP packet and packet filter.
Above embodiment has introduced the matching process of the IP packet that the embodiment of the invention provides, next introduce the corresponding device of method that the embodiment of the invention provides: the coupling accelerator, as shown in Figure 3, a kind of coupling accelerator 300, comprise: IP header parameter buffer 301, main control module 302, matching module 303, transmit buffer 304, wherein
IP header parameter buffer 301 comprises: x cache blocks, and wherein x is positive integer;
IP header parameter buffer 301, be used for from header parameter value and structure address that n IP packet of IP traffic extracts each IP packet respectively, be saved to respectively then in x the cache blocks of described IP header parameter buffer, wherein, n is positive integer;
The i packet filter 3031 of matching module is used for the header parameter value of the IP packet of the match attribute value of i packet filter 3031 and k cache blocks 3011 preservations is mated, and wherein, k is positive integer;
Transmit buffer 304, the structure address of be used for preserving the IP packet that k cache blocks that main control module 302 deposits in preserve;
(i+1) individual packet filter 3032 of matching module, be used for if it fails to match for the header parameter value of the IP packet that the match attribute value of i packet filter 3031 and k cache blocks are preserved, the IP packet head parameter value of preserving in the match attribute value of (i+1) individual packet filter 3032 and k the cache blocks is mated;
I packet filter 3031 of matching module, after being used for the match attribute value of i packet filter 3031 mated with the header parameter value of the IP packet of k cache blocks 3011 preservations, the header parameter value of the IP packet of preservation in the match attribute value of i packet filter 3031 and (k+1) individual cache blocks 3012 is mated.
Need to prove, for main control module 302 and (i+1) individual packet filter 3032, in actual applications, main control module 302, also be used for as (i+1)=m, if it fails to match for the header parameter value of the IP packet of preservation in the match attribute value of (i+1) individual packet filter 3032 and k the cache blocks 3011, EBI writes in the structure of k cache blocks 3011 corresponding IP data bags with the evolved packet system in the main control module 302 carrying index, and the structure address of the IP packet of preservation in k the cache blocks 3011 is deposited in the transmit buffer 304.
Need to prove that for main control module 302 and transmit buffer 304, in actual applications, main control module 302 also is used for judging whether to satisfy the down trigger condition that presets, and interrupts if satisfy then to trigger;
Transmit buffer 304, protocol stack is exported in the structure address that also is used for the IP packet that will preserve at transmit buffer 304, so that protocol stack is handled the structure address of the IP packet preserved in the transmit buffer 304.
Need to prove, for main control module 302 and IP header parameter buffer 301, in actual applications, main control module 302, also be used for after structure address with the IP packet of k cache blocks 3011 preservations deposits in the transmit buffer 304, with k cache blocks 3011 zero clearings of IP header parameter register 301;
IP header parameter buffer 301 also is used for extracting header parameter value and the structure address of an IP packet of not preserving and being saved to k cache blocks 3011 of IP header parameter buffer from IP traffic.
Need to prove, for main control module 302, in actual applications, main control module 302, also be used for before (i+1) individual packet filter 3032 is carried out, judging whether (i+1) individual packet filter 3032 enables the free time, if trigger (i+1) individual packet filter 3032 and carry out.
What need say is, main control module 302, also be used for before i packet filter carried out, judging whether (i+1) individual cache blocks is effective, if the header parameter value that triggers the IP packet of preserving in i packet filter 3031 and (k+1) individual cache blocks 3012 is mated.
Need to prove, contents such as the information interaction between each module/unit of said apparatus, implementation, since with the inventive method embodiment based on same design, its technique effect that brings is identical with the inventive method embodiment, particular content can repeat no more referring to the narration among the present invention method embodiment as shown in Figure 1 herein.
In the embodiment of the invention, IP header parameter buffer at first extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, be saved to respectively then in x the cache blocks in the IP header parameter buffer, i packet filter of matching module mates the header parameter value of the IP packet preserved in the match attribute value of i packet filter and k the cache blocks, i packet filter advances coupling with the header parameter value of the IP packet preserved in the match attribute value of i packet filter and (k+1) individual cache blocks then, as seen, in embodiments of the present invention, after the header parameter value of the IP packet that i packet filter preserved in having mated k cache blocks, the header parameter value that just can mate the IP packet of preserving in (k+1) individual cache blocks again, and do not need in the matching module by the time m packet filter all with k cache blocks in data packet matched the finishing of IP that preserve carry out again afterwards, that is to say, in the embodiment of the invention, each packet filter in the matching module can parallel processing to the coupling of the IP packet preserved in each cache blocks in the IP header parameter buffer, can improve the matching efficiency of IP packet and packet filter.
Next, with the application scenarios of a reality coupling accelerator that the embodiment of the invention proposes is elaborated, as shown in Figure 4, the coupling accelerator comprises: IP header parameter buffer, main control module, matching module, transmit buffer, wherein,
IP header parameter buffer comprises: cache blocks 1, cache blocks 2, ..., cache blocks n, this IP header parameter buffer comprises n cache blocks, all PF enable work in the matching module in order to make, the n value should be 256 so, because IP header parameter buffer is when carrying out the extraction of IP header parameter, matching module is matching treatment at the same time also, the speed of extracting when the IP header parameter is less than the PF rate matched in the matching module, the not enough situation of buffer memory just can not appear in IP header parameter buffer, in order to reduce the hardware resource expense, cache blocks is example with 16 in the IP header parameter buffer herein.Wherein, each cache blocks in the IP header parameter buffer should comprise three parts at least, as shown in Figure 4, only drawn among Fig. 4 and comprised IP packet structure body address register, match attribute value register, status register in the cache blocks 1, other cache blocks such as cache blocks 2 ..., cache blocks n comprised this 3 parts, specifically comprise in each cache blocks: one is used for depositing the structure address register that includes the IP packet information; The match attribute value register that another is used for depositing the header parameter of extracting from the IP packet also has one to be used to indicate whether effectively status register of current cache piece.Wherein the read-write of cache blocks is operated successively according to the operating state of cache blocks, when preserving the header parameter value of IP packet and structure address in the cache blocks in the IP header parameter buffer for writing cache blocks, to have now in the free buffer piece from last time write cache blocks backward nearest free buffer piece carry out write operation; When IP header parameter and matching module mate for reading cache blocks, in the existing valid cache piece from last time read cache blocks backward nearest valid cache piece carry out read operation.
Main control module comprises: trigger register, length register, EBI register, configuration register, status register, next do respectively to introduce one by one.
Trigger register: in conjunction with the space size of transmit buffer, configure interrupt produces trigger condition;
Length register: when being used for storage interruption generation, the number of the IP packet structure body address of from transmit buffer, extracting.
The EBI register: be used for storage and do not have the corresponding EBI of the EBI of PF when all it fails to match (i.e. all PF), same PDN connects down, if all carryings (comprising default bearing and dedicated bearer) all are assigned PF, then this EBI register is set to an invalid value;
Configuration register: be used for that storage coupling accelerator enables, matching module enables with trigger register and configuration information such as enable;
Status register: work state informations such as interrupt status, IP header parameter buffer, matching module;
Need to prove, if other functional requirements are arranged, can increase the register number and be used for different control.
Matching module comprises 256 PF, according to the order design from high to low of PF priority, be respectively PF0, PF1, PF2 ..., PF255, namely to correspond to priority be 0 PF to PF0, PFk deposits and preferentially corresponds to the PF that priority is k, PFk refers to k PF.There are five parts at least in each PF:
Comparator: be used for the match attribute value of IP packet head parameter value and PF relatively;
Status register: state informations such as record PF operating state;
EBI register: the EPS bearing identification (EBI) of depositing the PF correspondence;
Configuration register: deposit the control bit that enables of PF match attribute principle and matching module, PF match attribute principle wherein is according to bitmap (bitmap) design, and each bit represents a kind of validity of PF match attribute;
The property value register: deposit the match attribute value of corresponding PF, can as in the following table 1 design:
Wherein far-end address and far-end address subnet mask belong to same match attribute, represent so share a bit.
The PF0 that only drawn in Fig. 4 has comprised comparator, status register, EBI register, configuration register, property value register, but other PF has also comprised this five part, has all omitted in Fig. 4.
Transmit buffer: be used for depositing the IP pack arrangement body address after the match is successful.Data buffer area design should be noted: it is excessive that the buffer area space does not advise opening up, to reduce hardware spending;
Next introduce the workflow of coupling accelerator as shown in Figure 4.
The down trigger creation of condition can be according to trigger condition or the idle generation that triggers interrupt condition, trigger condition is: just produce when the IP packet of storing in the transmit buffer reaches trigger condition and interrupt, this interrupt notification mode can avoid that whenever the match is successful, and an IP packet just produces the inefficient situation of an interruption, can reduce and interrupt too frequently handling, save system resource, improve system effectiveness.The idle interrupt condition that triggers is: the number of the IP packet of last transmission does not probably reach and produces the number that triggers the IP packet that interrupts in actual the use, for solving the situation of this tail effect, can trigger interrupt last part IP packet is sent by the free time, idle to trigger the generation condition of interrupting be that following three conditions are set up simultaneously: all cache blocks free time in the IP header parameter buffer, matching module all enable PF be in enable IP packet in free time, the transmit buffer number greater than 0.
Need to prove, herein following four conditions of hypothesis in the application scenarios: the node number of each IP data chain is 10 in (1) this example, and just 10 IP packets are formed an IP data chain; (2) cache blocks of IP header parameter buffer has 16; (3) suppose that the trigger condition in the trigger register is made as 12; (4) must comprise one in the IP data chain in the IP packet structure body in order to store the member of corresponding EBI value, the match is successful or with whole PF when it fails to match as IP packet and PF, corresponding EBI is written among the member of IP packet correspondence, this can reduce the treating capacity of interrupting producing the back protocol stack, and has saved the data buffer space.Next introduce the workflow of coupling accelerator in detail:
At first, initial phase
1, matching module: according to receiving to such an extent that the match attribute value of PDN all upstream packet filter PF in connecting is come configuration register in the configurations match module, comprise the match attribute principle of each PF and enable configuration, dispose the corresponding EBI register of each PF.
2, main control module:
A), configuration EBI register: the EBI of the carrying correspondence of the no PF of storage, same PDN connect down, if all carryings (comprising default bearing and dedicated bearer) all are assigned PF, then this EBI register is set to an invalid value.
B), configuration register and trigger register configuration: configure interrupt enables, matching module enables, the trigger condition setting.
C), status register zero clearing.
D), enable to mate accelerator.
Then, matching stage
1, at first simply introduce the handling process of single IP packet in the coupling accelerator, as shown in Figure 5:
1.1, the IP packet enters the coupling accelerator, checks at first whether the coupling accelerator enable bit in the configuration register effective in the main control module, namely confirms whether to set up default bearing, if enable, coupling finishes to withdraw from; If enabled just to enter next step, extract the cache blocks that IP header parameter buffer is put in IP packet head parameter and IP packet structure body address, enter 1.2;
1.2, whether the matching module enable bit effective in the configuration register in the main control module, if do not enable, then transmit buffer is put in IP packet structure body address, simultaneously the EBI value in the main control module is write the corresponding member of IP packet structure body, coupling finishes to withdraw from; If enable, then the IP packet is sent into matching module and mate, enter 1.3;
1.3, from IP header parameter buffer, extract IP packet head parameter value, in matching module, carry out matching treatment, judge whether PF0 enables, do not enable then to enter PF1 module coupling, until enabling the PF module, if PF0 enables then the coupling of the match attribute value among IP packet head parameter value and the PF0 to be carried out, enter 1.4;
1.4, if the match is successful then IP packet structure body address is deposited in the transmit buffer, main control module writes corresponding member in the IP packet structure body with the corresponding EBI value of PF0 simultaneously, and the cache blocks state zero clearing of this IP packet head parameter will be stored in the cache blocks 1 in the IP header parameter buffer, represent 1 free time of this cache blocks, can store new IP packet head parameter, and with the PF0 state zero clearing in the matching module, expression PF0 enables the free time, this moment, PF0 can mate next IP packet, and matching process finishes; Then enter next PF as if it fails to match and mate, each PF afterwards does the processing identical with PF0, enters 1.5;
1.5, suppose to match PF254 success yet, enter PF255 and handle differently with the PF of front, judge whether PF255 enables, identical with 1.2 processing as if not enabling; If enable then the matching principle property value among IP packet head parameter value and the PF255 to be mated, the match is successful then deposits IP packet structure body address in the transmit buffer in, simultaneously the corresponding EBI value of PF255 is write corresponding member in the IP packet structure body, and the cache blocks state zero clearing of this IP packet head parameter will be stored in the cache blocks 1 in the IP header parameter buffer, represent 1 free time of this cache blocks, can store new IP packet head parameter, and with the zero clearing of PF255 state, expression PF0 enables the free time, this moment, PF255 can mate next IP packet, and coupling finishes to withdraw from; Still work is identical with 1.2 processing if it fails to match.
2, the workflow handled simultaneously of a plurality of IP data chains, shown in Fig. 6 (a), Fig. 6 (b), Fig. 6 (c), wherein, Fig. 6 (a) carries out the schematic diagram of matching treatment constantly at Ti for a plurality of IP data chains, Fig. 6 (b) carries out the schematic diagram of matching treatment constantly at Ti+1 for a plurality of IP data chains, Fig. 6 (c) carries out the schematic diagram of matching treatment for a plurality of IP data chains constantly at Ti+2, wherein
2.1, come when IP data chain 1, at first all the IP packet head parameter values in the IP data chain 1 and IP packet structure body address extraction are come out and be stored in together in each cache blocks of IP header parameter buffer, when being checked through IP header parameter buffer and having IP header parameter information, matching module extracts IP packet head parameter value in the cache blocks 1 and PF0 from IP header parameter buffer match attribute value matching ratio;
2.2, if at this moment IP data chain 2 arrives, IP header parameter buffer is checked through idle cache blocks, continues the IP packet head parameter value in the IP data chain 2 and IP packet structure body address extraction come out and is stored in together in the cache blocks idle in the IP header parameter buffer that all IP packet head parameter values and structure address extraction finish in IP data chain 2;
2.3, shown in Fig. 6 (a), at Ti constantly, IP1 begins the coupling with PF0, if it fails to match then send into next effectively PF and mate among the PF1; Otherwise the match is successful then deposits IP1 packet structure body address in the transmit buffer in and stores, and the EBIx with the PF0 correspondence writes corresponding member in the IP1 packet structure body simultaneously; Suppose IP1 and PFO herein the match is successful and be sent in the transmit buffer and store; To deposit in the cache blocks 1 state zero clearing of IP1 packet head parameter value in the IP header parameter buffer simultaneously, expression 1 free time of cache blocks, can store next IP packet head parameter value, and IP packet head parameter value and the IP packet structure body address of reading IP17 in the IP data chain 2 are left in the IP header parameter buffer in.As long as the PF0 module is in and enables idle condition, the matching principle property value that matching module continues to leave in the PF0 in the next IP2 packet head parameter value and matching module in the IP header parameter buffer compares coupling; Make IP packet head parameter extraction and Data Matching parallel running;
2.4, the matching treatment of IP packet in other PF undertaken by the handling process of IP1 packet in PF0, parameter extraction and Data Matching are parallel simultaneously carries out, the structure address that the data packet matched success of any one PF and IP just is present in this IP packet IP header parameter buffer writes in the transmit buffer, simultaneously the EBI value of this PF correspondence is write in this IP packet structure body among the corresponding member; Simultaneously corresponding PF in corresponding cache blocks zero clearing in the IP header parameter buffer and the matching module is identified into and enable the free time.
2.5, shown in Fig. 6 (b), at Ti+1 constantly, the match is successful deposits in the transmit buffer for the IP12 of IP8, the IP2 of IP data chain 1 and IP data chain 2, to deposit in the cache blocks state zero clearing of the packet header parameter value of depositing IP8, IP2, IP12 in the IP header parameter buffer simultaneously, represent this three cache blocks free time, but storing IP packet head parameter value and IP packet structure body address, and with the data packet matched successful PF state zero clearing of three IP therewith, represent that these three PF enable the free time; Suppose IP2 the match is successful yet in PF255 that then IP packet structure body address being write the EBI value that reads simultaneously in the transmit buffer in the main control module writes corresponding member in the IP packet structure body;
2.6, shown in Fig. 6 (c), at Ti+2 constantly, the number of the IP packet structure body address of storing in the transmit buffer satisfies trigger condition, namely is filled with 12 IP packet structure body addresses and produces an interrupt notification protocol stack deal with data; The IP packet structure body that read out from transmit buffer this moment disperses, and after protocol stack is handled the IP packet in the transmit buffer is formed a new IP data chain and transmits.Handle by this kind interrupt mode, satisfy in the IP data chain the PF high priority demand that the match is successful sends earlier;
2.7, in addition, there is a tail effect here, the number that is the IP packet of last transmission in the IP data chain does not probably reach the IP packet number that produces the triggering interruption, in the IP header parameter buffer in all cache blocks free time, the matching module all PF all be in and enable in free time, the transmit buffer IP packet number and set up simultaneously greater than 0 these three conditions and then produce idle the triggering and interrupt, just can avoid this tail effect.
One of ordinary skill in the art will appreciate that all or part of step that realizes in above-described embodiment method is to instruct relevant hardware to finish by program, described program can be stored in a kind of computer-readable recording medium, the above-mentioned storage medium of mentioning can be read-only memory, disk or CD etc.
More than the matching process of a kind of IP packet provided by the present invention and coupling accelerator are described in detail, for one of ordinary skill in the art, thought according to the embodiment of the invention, part in specific embodiments and applications all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (15)
1. the matching process of an IP packet is characterized in that, comprising:
IP header parameter buffer extracts header parameter value and the structure address of each IP packet respectively from n IP packet of IP traffic, is saved to respectively then in x the cache blocks of described IP header parameter buffer, and n wherein, x is positive integer;
I packet filter of described matching module mates the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and k the cache blocks, described matching module comprises m packet filter, wherein, 1≤i＜(i+1)＜m, i, k, m are positive integers;
If the match is successful for the header parameter value of the IP packet of preserving in the match attribute value of described i packet filter and described k the cache blocks, described main control module writes the evolved packet system of described i packet filter carrying index EBI in the structure of described k cache blocks corresponding IP data bag, and described main control module deposits the structure address of the IP packet preserved in described k the cache blocks in the transmit buffer in;
If it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of described i packet filter and described k the cache blocks, (i+1) individual packet filter of described matching module mates the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks;
After i packet filter of described matching module mated the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and described k the cache blocks, described i packet filter mated the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and (k+1) individual cache blocks.
2. the matching process of IP packet according to claim 1, it is characterized in that, (i+1) individual packet filter of described matching module also comprises after the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks is mated:
As (i+1)=m, if it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of described (i+1) individual packet filter and described k the cache blocks, described main control module writes the evolved packet system in described main control module carrying index EBI in the structure of described k cache blocks corresponding IP data bag, and described main control module deposits the structure address of the IP packet preserved in described k the cache blocks in the transmit buffer in.
3. the matching process of IP packet according to claim 1 is characterized in that, described method also comprises:
Whether described master control module judges satisfies the down trigger condition that presets, if satisfying then, described main control module triggers interruption, protocol stack is exported in the structure address of the IP packet that described transmit buffer will be preserved in described transmit buffer, so that described protocol stack is handled the structure address of the IP packet preserved in the described transmit buffer.
4. the matching process of IP packet according to claim 3 is characterized in that, the described down trigger condition that presets comprises:
The number of the structure address of the IP packet of preserving in the described transmit buffer is not less than preset number;
Or, satisfy the idle condition of interrupting that triggers, the condition of described idle triggering terminal comprises: m packet filter of all cache blocks free time, described matching module all is in the number of the structure address that enables the IP packet preserved in idle condition, the described transmit buffer greater than zero in the described IP header parameter buffer.
5. the matching process of IP packet according to claim 1 is characterized in that, described main control module also comprises after depositing in the structure address of the IP packet preserved in described k the cache blocks in the transmit buffer:
Described main control module is with k cache blocks zero clearing of described IP header parameter register;
Described IP header parameter buffer extracts header parameter value and the structure address of an IP packet of not preserving and is saved to k cache blocks of described IP header parameter buffer from IP traffic.
6. the matching process of IP packet according to claim 1 is characterized in that, the priority index EPI of described i packet filter is higher than the EPI of described (i+1) individual packet filter.
7. the matching process of IP packet according to claim 1 is characterized in that, described match attribute value comprises at least one of following property value:
Next property value among protocol number or the IPv6 among grade of service property value, the IPv4 among COS or the Internet protocol sixth version IPv6 among far-end address and far-end address subnet mask property value, Security Parameter Index property value, flow label property value, local port scope attribute value, remote port scope attribute value, the 4th edition IPv4 of Internet protocol.
8. the matching process of IP packet according to claim 1, it is characterized in that, (i+1) individual packet filter of described matching module also comprises before the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks is mated:
Whether (i+1) individual packet filter of the described matching module of described master control module judges enables the free time, if, described main control module trigger described (i+1) individual packet filter carry out with described k cache blocks in the header parameter value of the IP packet the preserved function of mating.
9. the matching process of IP packet according to claim 1, it is characterized in that, i packet filter of matching module also comprises before the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and (k+1) individual cache blocks is mated:
Whether (k+1) individual cache blocks is effective in the described IP header parameter of the described master control module judges buffer, if the header parameter value that described main control module triggers the IP packet of preserving in described i packet filter and described (k+1) individual cache blocks is mated.
10. a coupling accelerator is characterized in that, comprising: IP header parameter buffer, main control module, matching module, transmit buffer, wherein,
Described IP header parameter buffer comprises: x cache blocks, and wherein x is positive integer;
Described IP header parameter buffer, be used for from header parameter value and structure address that n IP packet of IP traffic extracts each IP packet respectively, be saved to respectively then in x the cache blocks of described IP header parameter buffer, wherein, n is positive integer;
Described matching module comprises m packet filter, wherein, and 1≤i＜(i+1)＜m, i, m are positive integers;
I packet filter of described matching module, the header parameter value that is used for IP packet that the match attribute value of described i packet filter and k cache blocks are preserved is mated, and wherein, k is positive integer;
Described main control module, be used for if the match is successful for the match attribute value of described i packet filter and the header parameter value of the IP packet that described k cache blocks preserved, EBI writes in the structure of described k cache blocks corresponding IP data bag with the evolved packet system of described i packet filter carrying index, and the structure address of the IP packet in described k the cache blocks is deposited in the described transmit buffer;
Described transmit buffer, the structure address of be used for preserving the IP packet that k cache blocks that described main control module deposits in preserve;
(i+1) individual packet filter of described matching module, be used for if it fails to match for the match attribute value of described i packet filter and the header parameter value of the IP packet that described k cache blocks preserved, the header parameter value of the IP packet preserved in the match attribute value of described (i+1) individual packet filter and described k the cache blocks is mated;
I packet filter of described matching module, after the header parameter value that is used for IP packet that match attribute value and described k the cache blocks of described i packet filter are preserved is mated, the header parameter value of the IP packet preserved in the match attribute value of described i packet filter and (k+1) individual cache blocks is mated.
11. coupling accelerator according to claim 10, it is characterized in that, described main control module, also be used for as (i+1)=m, if it fails to match for the header parameter value of the IP packet of preserving in the match attribute value of described (i+1) individual packet filter and described k the cache blocks, EBI writes in the structure of described k cache blocks corresponding IP data bag with the evolved packet system in described main control module carrying index, and the structure address of the IP packet preserved in described k the cache blocks is deposited in the transmit buffer.
12. coupling accelerator according to claim 10 is characterized in that,
Described main control module also is used for judging whether to satisfy the down trigger condition that presets, and interrupts if satisfy then to trigger;
Described transmit buffer, protocol stack is exported in the structure address that also is used for the IP packet that will preserve at described transmit buffer, so that described protocol stack is handled the structure address of the IP packet preserved in the described transmit buffer.
13. coupling accelerator according to claim 10 is characterized in that,
Described main control module is after the structure address that also is used for IP packet that described k cache blocks preserved deposits in the transmit buffer, with k cache blocks zero clearing of described IP header parameter register;
Described IP header parameter buffer also is used for extracting header parameter value and the structure address of an IP packet of not preserving and being saved to k cache blocks of described IP header parameter buffer from IP traffic.
14. coupling accelerator according to claim 10, it is characterized in that described main control module also is used for judging whether described (i+1) individual packet filter enables the free time before described (i+1) individual packet filter is carried out, if trigger described (i+1) individual packet filter and carry out.
15. coupling accelerator according to claim 10, it is characterized in that, described main control module, also be used for before described i packet filter carried out, judging whether described (i+1) individual cache blocks is effective, if the header parameter value that triggers the IP packet of preserving in described i packet filter and described (k+1) individual cache blocks is mated.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103491008A (en) * | 2013-09-22 | 2014-01-01 | 福建星网锐捷网络有限公司 | MAC address matching processing device and method |
| CN104113554A (en) * | 2014-07-30 | 2014-10-22 | 中国联合网络通信集团有限公司 | Processing method and device of filters |
| CN105916176A (en) * | 2016-04-18 | 2016-08-31 | 全球能源互联网研究院 | Power service bearing mapping method based on LTE system |
| CN106717051A (en) * | 2014-09-24 | 2017-05-24 | 瑞典爱立信有限公司 | A method and user equipment for uplink traffic mapping |
| CN109376546A (en) * | 2018-09-28 | 2019-02-22 | 深信服科技股份有限公司 | Data packet auditing method, system, device and storage medium based on global rule |
| CN109857359A (en) * | 2019-02-14 | 2019-06-07 | 深圳前海骁客影像科技设计有限公司 | MIPI data processing method, device and circuit |
| CN110324326A (en) * | 2019-06-20 | 2019-10-11 | 中国科学院信息工程研究所 | A kind of network data transmission control method and device based on service security label |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040024757A1 (en) * | 2002-07-02 | 2004-02-05 | Park Young-Keun | Internet protocol address look-up device |
| US20040151382A1 (en) * | 2003-02-04 | 2004-08-05 | Tippingpoint Technologies, Inc. | Method and apparatus for data packet pattern matching |
| CN1585375A (en) * | 2003-08-22 | 2005-02-23 | 中国科学院研究生院 | Dispatching method for virtual destination queuing exchanging system |
| CN1674557A (en) * | 2005-04-01 | 2005-09-28 | 清华大学 | Parallel IP packet sorter matched with settling range based on TCAM and method thereof |
| CN101035131A (en) * | 2007-02-16 | 2007-09-12 | 杭州华为三康技术有限公司 | Protocol recognition method and device |
| CN101499875A (en) * | 2008-02-02 | 2009-08-05 | 三星电子株式会社 | Variant processing rate supporting apparatus for LTE rate de-matching and de-interleaving |
| CN101610587A (en) * | 2009-07-13 | 2009-12-23 | 中兴通讯股份有限公司 | A kind of data transmission method and device based on the TDD standard |
| US20100254399A1 (en) * | 2007-11-27 | 2010-10-07 | Samsung Electronics Co., Ltd. | Method of uplink ip packet filtering control in mobile terminal |
| CN102761393A (en) * | 2012-07-05 | 2012-10-31 | 中兴通讯股份有限公司 | Method and device for processing data message |
-
2011
- 2011-12-31 CN CN201110459754.XA patent/CN103188042B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040024757A1 (en) * | 2002-07-02 | 2004-02-05 | Park Young-Keun | Internet protocol address look-up device |
| US20040151382A1 (en) * | 2003-02-04 | 2004-08-05 | Tippingpoint Technologies, Inc. | Method and apparatus for data packet pattern matching |
| CN1585375A (en) * | 2003-08-22 | 2005-02-23 | 中国科学院研究生院 | Dispatching method for virtual destination queuing exchanging system |
| CN1674557A (en) * | 2005-04-01 | 2005-09-28 | 清华大学 | Parallel IP packet sorter matched with settling range based on TCAM and method thereof |
| CN101035131A (en) * | 2007-02-16 | 2007-09-12 | 杭州华为三康技术有限公司 | Protocol recognition method and device |
| US20100254399A1 (en) * | 2007-11-27 | 2010-10-07 | Samsung Electronics Co., Ltd. | Method of uplink ip packet filtering control in mobile terminal |
| CN101499875A (en) * | 2008-02-02 | 2009-08-05 | 三星电子株式会社 | Variant processing rate supporting apparatus for LTE rate de-matching and de-interleaving |
| CN101610587A (en) * | 2009-07-13 | 2009-12-23 | 中兴通讯股份有限公司 | A kind of data transmission method and device based on the TDD standard |
| CN102761393A (en) * | 2012-07-05 | 2012-10-31 | 中兴通讯股份有限公司 | Method and device for processing data message |
Cited By (14)
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|---|---|---|---|---|
| CN103491008A (en) * | 2013-09-22 | 2014-01-01 | 福建星网锐捷网络有限公司 | MAC address matching processing device and method |
| CN103491008B (en) * | 2013-09-22 | 2016-08-24 | 福建星网锐捷网络有限公司 | MAC Address matching treatment device and method |
| CN104113554A (en) * | 2014-07-30 | 2014-10-22 | 中国联合网络通信集团有限公司 | Processing method and device of filters |
| CN104113554B (en) * | 2014-07-30 | 2017-06-16 | 中国联合网络通信集团有限公司 | A kind of processing method and processing device of filter |
| CN106717051A (en) * | 2014-09-24 | 2017-05-24 | 瑞典爱立信有限公司 | A method and user equipment for uplink traffic mapping |
| CN105916176A (en) * | 2016-04-18 | 2016-08-31 | 全球能源互联网研究院 | Power service bearing mapping method based on LTE system |
| CN109376546A (en) * | 2018-09-28 | 2019-02-22 | 深信服科技股份有限公司 | Data packet auditing method, system, device and storage medium based on global rule |
| CN109857359A (en) * | 2019-02-14 | 2019-06-07 | 深圳前海骁客影像科技设计有限公司 | MIPI data processing method, device and circuit |
| CN109857359B (en) * | 2019-02-14 | 2023-12-26 | 深圳前海骁客影像科技设计有限公司 | MIPI data processing method, device and circuit |
| CN110324326A (en) * | 2019-06-20 | 2019-10-11 | 中国科学院信息工程研究所 | A kind of network data transmission control method and device based on service security label |
| CN110324326B (en) * | 2019-06-20 | 2020-12-22 | 中国科学院信息工程研究所 | Network data transmission control method and device based on service security marker |
| CN113438097A (en) * | 2021-05-21 | 2021-09-24 | 翱捷科技股份有限公司 | Method and device for realizing network acceleration |
| CN113438097B (en) * | 2021-05-21 | 2022-08-23 | 翱捷科技股份有限公司 | Method and device for realizing network acceleration |
| CN113369173A (en) * | 2021-06-29 | 2021-09-10 | 上海希翎智能科技有限公司 | Full-automatic plastic bottle color sorting equipment |
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