CN103187932A - Power amplifier and predistorter thereof - Google Patents

Abstract

The invention discloses a power amplifier and a predistorter thereof, wherein the predistorter comprises sub predistorters with predetermined quantity; each sub predistorter comprises a basis function having no time delay, and one or more basis functions with time delay; the linear combination of the output of the basis functions having no time delay and the output of the basis functions with time delay forms the outputs of the sub predistorters; the sum of the outputs of the sub predistorters with the predetermined quantity forms the output of the predistorters; and basis functions having no time delay inside each sub predistorter and the basis functions with time delay are in mutual orthogonality.

Description

Power amplifier and predistorter thereof

Technical field

The nonlinear power amplifier that uses in the transmitter of relate generally to non linear system, particularly nonlinear power amplifier, especially wireless communication system of the present invention (such as base station and travelling carriage).More particularly, the present invention relates to for the predistorter of nonlinear power amplifier and the power amplification device that uses predistorter, it mainly utilizes digital technology to realize predistortion in base band, to remedy memoryless nonlinear characteristic and the memory characteristic of nonlinear power amplifier.

Background technology

As typical case's representative of non linear system, power amplifier is the important component part of a lot of electronic equipments, and it can amplify the faint signal of telecommunication, to satisfy the needs of remote transmission.Wherein, the energy of amplification comes from DC power supply, and namely power amplifier can be converted into AC signal with dc energy, makes the power level of AC signal satisfy the demand.The ratio that power amplifier is converted to AC energy with dc energy is known as the efficient of power amplifier.

According to the physical characteristic of power amplifier, along with the power of input signal is ascending, the characteristic curve of the input signal of reflection power amplifier and the power relation of output signal can be divided into linear zone, inelastic region and saturation region.Fig. 1 illustrates the non-linear input/output signal characteristic of power amplifier.At input signal V _INThe zone that amplitude is less, the output V of power amplifier PA _OUTAlmost be input signal V _INLinearity amplify, but along with input signal V _INThe increase of amplitude, the nonlinear characteristic of power amplifier are obviously to the last saturated gradually.This non-linear behavior is on time domain, and output signal is not that the ideal of input signal is amplified; This non-linear behavior is on frequency domain, because the intermodulation effect, video stretching (secondary lobe rising) appears outward in the band of the signal that is exaggerated, and then occurs distortion (main lobe distortion) in the band, as shown in Figure 2, has shown by the caused video stretching of nonlinear power amplifier.Video stretching can influence the normal operation of the miscellaneous equipment that works in adjacent channel.

Ideally, wish that power amplifier only plays linear effect of amplifying, namely output signal is the simple linear amplification of input signal, therefore allows power amplifier be operated in linear zone.But this moment, power amplifier was very low with the efficient that direct current signal is converted to AC signal, caused the waste of big energy, and needed to increase extra heat dissipation equipment.Because physically, when the envelope fluctuation of input signal deeply to the inelastic region, the efficient of power amplifier will be far above the situation when linear zone fluctuates only.And along with the appearance of new-type modulation system, the dynamic range of signal envelope is increasing, and it is inevitable therefore nonlinear distortion to take place.

Therefore, on the one hand in order to improve the efficient of power amplifier, on the other hand because the signal in a lot of Modern Communication System has very big dynamic range (peak-to-average power ratio), so power amplifier often need be in inelastic region work, thereby cause the distortion of output signal (on frequency domain, the outer video stretching that then occurs of band distortion appears) in the band.In power amplifier field, usually this current output only is subjected to the distortion of the nonlinear power amplifier that current input influences to be called the memoryless nonlinear characteristic of power amplifier.

In numerous methods that overcome the non-linearity of power amplifier characteristic, base band predistortion is a kind of method that receives much concern.As shown in Figure 3, schematic diagram for the input/output signal characteristic of the predistorter that is used for power amplifier of offsetting nonlinear characteristic shown in Figure 1 is shown.The base band predistortion technology makes original input signal V by using the contrary characteristic of predistorter PD simulated power amplifier _INPredistortion took place, thereby compensating power amplifier is non-linear before being input to power amplifier, and obtaining not have the amplification output signal V that distorts at the output of power amplifier _OUTHave the input/output signal characteristic of power amplifier of pre-distortion function up near all showing extraordinary linear characteristic before the saturation region, as shown in Figure 4, the schematic diagram of the input/output signal characteristic of the power amplifier that is provided with predistorter is shown.

But the good predistorter of much working is all at tone signal or narrow band frequency signal.That is to say, mostly be used for the memoryless non-linear of the power amplifier mentioned above the compensation.Yet, along with the bandwidth of signal is more and more wideer, power amplifier shows certain memory characteristic (frequency selectivity) again, be that current output signal is not only relevant with current input signal, also relevant with input signal before, the schematic diagram of the input/output signal characteristic of the nonlinear power amplifier with memory characteristic is shown as shown in Figure 5.Near the non-symmetrical spectrum of the memory characteristic of power amplifier its output shows as carrier wave as shown in Figure 6, illustrates the spectrum diagram by the nonlinear power amplifier institute amplifying signal with memory characteristic.That is to say that the frequency spectrum that distortion causes is asymmetric for centered carrier.

Therefore, in order to simulate the contrary characteristic of the power amplifier with above-mentioned memory characteristic exactly, come the contrary characteristic of power amplifier is carried out modeling and parameter Estimation with regard to adopting more complicated structure and method, in order to realize predistortion.Be used for the memoryless nonlinear characteristic of while compensating power amplifier and the technology of memory characteristic at present and mainly comprise memory multinomial model and look-up-table method.

The memory multinomial model is Volterra simplified models model.The Volterra model adopts Volterra progression to come non linear system is carried out accurate modeling, can offset memoryless nonlinear characteristic and the memory characteristic of power amplifier theoretically by the contrary Volterra progression model of emulation power amplifier.Though the Volterra model is very effective for memoryless nonlinear characteristic and the memory characteristic of offsetting power amplifier, its physics realization almost is impossible, because need to use complicated formula, and needs the mathematical operation of flood tide.For this reason, the Volterra model of simplifying has been proposed, that is, and the memory multinomial model.As shown in Figure 7, illustrate according to prior art and use the memory multinomial model that the input signal of nonlinear power amplifier with memory characteristic is carried out the schematic diagram of pre-distortion, wherein remember multinomial model and use the polynomial function relevant with previous input with current input to represent to export.The nonlinear ability of offsetting power amplifier depends on quantity and the polynomial exponent number of employed previous input.Non-linear polynomial non-linear (multistage) can describe the nonlinear characteristic of power amplifier, and the repeated use of multinomial on different delay point can be described the memory characteristic of power amplifier.Yet the correlation between the multinomial on the different delay point can have a strong impact on the training of predistorter, finally has influence on the memoryless nonlinear characteristic of power amplifier and the compensation ability of memory characteristic.

Look-up-table method then is according to the relation between the current output of power amplifier and its current input and the previous input, the contrary characteristic of power amplifier is made question blank, thereby before input signal is carried out power amplification, utilize the weight coefficient that from question blank, obtains that input signal is carried out predistortion, offset nonlinear characteristic and the memory characteristic of power amplifier thus.As shown in Figure 8, illustrate according to prior art and use two-dimensional polling list the input signal of nonlinear power amplifier with memory characteristic to be carried out the schematic diagram of pre-distortion.By using question blank, improved the processing speed of predistorter effectively, and be conducive to the realization of software.But therefore the data source of question blank also is subjected to the influence of the correlation between the multinomial on the different delay point from the training result to predistorter.

Also there is above similar techniques problem for other non linear system that is similar to nonlinear power amplifier.

Summary of the invention

Provided hereinafter about brief overview of the present invention, in order to basic comprehension about some aspect of the present invention is provided.Should be appreciated that this general introduction is not about exhaustive general introduction of the present invention.It is not that intention is determined key of the present invention or pith, neither be intended to limit scope of the present invention.Its purpose only is that the form of simplifying provides some concept, with this as the preorder of discussing after a while in greater detail

The purpose of this invention is to provide a kind of predistorter for power amplifier, can improve predistorter to the memoryless nonlinear characteristic of power amplifier and the compensation ability of memory characteristic.

To achieve these goals, according to an aspect of the present invention, provide a kind of predistorter for power amplifier, described predistorter comprises the sub-predistorter of predetermined quantity; Each described sub-predistorter comprises basic function, one or more basic function that time delay is arranged of no time delay, and the linear combination of the output of the output of the basic function of described no time delay and the described basic function that time delay arranged constitutes the output of sub-predistorter; The output sum of the sub-predistorter of described predetermined quantity constitutes the output of predistorter; Wherein, the basic function of the no time delay in each sub-predistorter with have the basic function of time delay orthogonal.

According to a specific embodiment of the present invention, the basic function that time delay is arranged in each sub-predistorter is the basic function of the no time delay in the same sub-predistorter and the linear combination of the time delay pattern of the basic function of described no time delay, the coefficient of described linear combination make the no time delay in each sub-predistorter basic function and have the basic function of time delay orthogonal.

According to a specific embodiment of the present invention, by the minimization covariance matrix

Off-diagonal element or the conditional number coefficient u that obtains described linear combination, wherein,

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right),$

Be basic function ψ _PkExpansion on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, P is the quantity of the basic function that time delay is arranged in each sub-predistorter, when p=0, ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged

Expansion on time shaft, 1≤i≤P, 1≤m≤K, U are the matrixes that described linear combination coefficient u constitutes.

According to a further aspect in the invention, provide a kind of power amplification device, having comprised: predistorter is used for original input signal is carried out predistortion the output predistorted input signal; Digital to analog converter, the predistorted input signal that is used for predistorter is exported is converted to analog signal; Upconverter is used for and will up-converts to radiofrequency signal from the analog signal of digital to analog converter output; Power amplifier is used for the radiofrequency signal of upconverter output is carried out signal after power amplification and power output are amplified as output signal; Wherein, the structure of described predistorter is identical with the structure of aforesaid predistorter for power amplifier.

In accordance with a further aspect of the present invention, a kind of pre-distortion method for power amplifier is provided, described method comprises the steps: to use the sub-predistortion module of predetermined quantity that input signal is handled, and the output sum of each sub-predistortion module is exported to power amplifier; Wherein, each described sub-predistortion module comprises no time delay module, one or more has the time delay module, and described processing comprises: the basic function that described no time delay module is calculated no time delay acts on the result of input signal as the output of described no time delay module; Described have the calculating of time delay module to have the basic function of time delay to act on the result of input signal as the described output that the time delay module is arranged; And calculate the output of the described no time delay module in the described sub-predistortion module and the described linear combination of output that one or more has the time delay module as the output of described sub-predistortion module; Wherein, the basic function of the no time delay in each sub-predistortion module with have the basic function of time delay orthogonal.

According to a specific embodiment of the present invention, the basic function that time delay is arranged in each sub-predistortion module is the basic function of the no time delay in the same sub-predistortion module and the linear combination of the time delay pattern of the basic function of described no time delay, the coefficient of described linear combination make the no time delay in each sub-predistortion module basic function and have the basic function of time delay orthogonal.

According to a specific embodiment of the present invention, by the minimization covariance matrix

Off-diagonal element or the conditional number coefficient u that obtains described linear combination, wherein,

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right),$

Be basic function ψ _PkExpansion on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, P is the quantity that the time delay module is arranged in each sub-predistortion module, when p=0, ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged

Expansion on time shaft, 1≤i≤P, 1≤m≤K, U are the matrixes that described linear combination coefficient u constitutes.

In accordance with a further aspect of the present invention, provide a kind of power-magnifying method, described method comprises carries out predistortion to original input signal, the output predistorted input signal; Predistorted input signal is converted to analog signal; Analog signal is up-converted to radiofrequency signal; And radiofrequency signal carried out signal after power amplification and power output are amplified as output signal; Wherein, described predistortion step adopts aforesaid pre-distortion method.

In addition, according to a further aspect in the invention, also provide a kind of storage medium.Described storage medium comprises machine-readable program code, and when when messaging device is carried out described program code, described program code makes described messaging device carry out according to said method of the present invention.

In addition, in accordance with a further aspect of the present invention, also provide a kind of program product.Described program product comprises the executable instruction of machine, and when when messaging device is carried out described instruction, described instruction makes described messaging device carry out according to said method of the present invention.

According to above-mentioned predistorter for power amplifier of the present invention, the power amplification device that uses this predistorter, pre-distortion method and power-magnifying method, avoided because the adverse effect to the predistorter training that the correlation between the multinomial on the different delay point causes improves predistorter to the memoryless nonlinear characteristic of power amplifier and the compensation performance of memory characteristic.

Provide other aspects of the present invention in the specification part below, wherein, detailed description is used for fully openly the preferred embodiments of the present invention, and it is not applied restriction.

Description of drawings

With reference to below in conjunction with the explanation of accompanying drawing to the embodiment of the invention, can understand above and other purpose of the present invention, characteristics and advantage more easily.Parts in the accompanying drawing are just in order to illustrate principle of the present invention.In the accompanying drawings, same or similar technical characterictic or parts will adopt identical or similar Reference numeral to represent.In the accompanying drawing:

Fig. 1 is the schematic diagram of nonlinear characteristic that the input/output signal of nonlinear power amplifier is shown;

Fig. 2 is the spectrum diagram that illustrates by nonlinear power amplifier institute amplifying signal;

Fig. 3 is the schematic diagram that illustrates for the input/output signal characteristic of the power amplifier pre-distortion device of offsetting nonlinear characteristic shown in Figure 1;

Fig. 4 is the schematic diagram that the input/output signal characteristic of the power amplifier that is provided with predistorter is shown;

Fig. 5 is the schematic diagram that the input/output signal characteristic of the nonlinear power amplifier with memory characteristic is shown;

Fig. 6 is the spectrum diagram that illustrates by the nonlinear power amplifier institute amplifying signal with memory characteristic;

Fig. 7 illustrates according to prior art to use the memory multinomial model input signal of nonlinear power amplifier with memory characteristic to be carried out the schematic diagram of pre-distortion;

Fig. 8 illustrates the schematic diagram that carries out pre-distortion according to the input signal that uses question blank to nonlinear power amplifier with memory characteristic;

Fig. 9 is the figure that the relation of power amplifier and predistorter is shown;

Figure 10 is be used to the schematic diagram that obtains and adjust the indirect structure of predistorter coefficient according to of the present invention;

Figure 11 shows the schematic diagram of predistorter of the prior art;

Figure 12 shows the schematic diagram according to predistorter of the present invention;

Figure 13 illustrates the block diagram that can realize the non-linear power multiplying arrangement of predistortion according to of the present invention; And

Figure 14 is the block diagram that the example arrangement of personal computer is shown.

Embodiment

To be described in detail one exemplary embodiment of the present invention by reference to the accompanying drawings hereinafter.For clarity and conciseness, all features of actual execution mode are not described in specification.Yet, should understand, in the process of any this practical embodiments of exploitation, must make a lot of decisions specific to execution mode, in order to realize developer's objectives, for example, meet and system and professional those relevant restrictive conditions, and these restrictive conditions may change to some extent along with the difference of execution mode.In addition, might be very complicated and time-consuming though will also be appreciated that development, concerning the those skilled in the art that have benefited from present disclosure, this development only is routine task.

At this, what also need to illustrate a bit is, for fear of having blured the present invention because of unnecessary details, only show in the accompanying drawings with according to the closely-related apparatus structure of the solution of the present invention and/or treatment step, and omitted other details little with relation of the present invention.In addition, it is pointed out that also element and the feature described can combine with element and the feature shown in one or more other accompanying drawing or the execution mode in an accompanying drawing of the present invention or a kind of execution mode.

Embodiments of the invention are described with reference to the accompanying drawings.

Fig. 9 is the figure that the relation of power amplifier and predistorter is shown.

The input of pre-distorter is x (t), and output is z (t), and the input of power amplifier is the output z (t) of predistorter, and output is y (t).

The response of predistorter is described by following formula (1).

$z\left(t\right)=\underset{p=0}{\overset{P}{\mathrm{\Σ}}}\underset{k=1}{\overset{K}{\mathrm{\Σ}}}{w}_{\mathrm{pk}}{\mathrm{\ψ}}_k\left(x(t-p)\right)---\left(1\right)$

Wherein, x (t-p) is the time delay item of input x (t), ψ _kThe polynomial basis function of expression structure predistorter, ψ _k(x (t)) is the basic function of no time delay to the response of x (t) (is that x (t) is through the basic function ψ of no time delay _kOutput after the effect), ψ _k(x (t-p)) has the basic function of time delay to the response of x (t), and K is the number that constitutes the sub-predistorter of predistorter, and P is the quantity of the basic function that time delay is arranged in each sub-predistorter, w _PkBe the predistorter coefficient, the weight coefficient that time delay basic function and no time delay basic function are arranged that namely predistorter is interior.As indicated above, the exponent number of basic function has embodied the compensation to memoryless nonlinear characteristic, and the time delay of basic function has embodied the compensation to memory characteristic.

Usually, expectation is by training and adjustment predistorter coefficient w _PkMake

y(t)＝Gx(t) (2)

Wherein G is a constant, the multiple that the expectation of expression signal is exaggerated.

The present invention adopts indirect structure to train, to obtain and to adjust predistorter coefficient w _Pk

Figure 10 is be used to the schematic diagram that obtains and adjust the indirect structure of predistorter coefficient according to of the present invention.

Generally, the characteristic of non linear system can not change in time continually, therefore can carry out off-line data after collecting some input and output data samples and handle.After training, new argument (predistorter coefficient) is sent to the predistorter of non linear system, in order to the non-linear and memory characteristic of non linear system is compensated.In Figure 10, x (t) is the input of non linear system, and y (t) is the output of non linear system, and G is the expected gain coefficient of non linear system, and y (t) props up for y (t)/G is imported into training as input through attenuator weakening.Therefore, the training output shown in following formula (3).

$\hat{z}\left(t\right)=\underset{p=0}{\overset{P}{\mathrm{\Σ}}}\underset{k=1}{\overset{K}{\mathrm{\Σ}}}{w}_{\mathrm{pk}}{\mathrm{\ψ}}_k(y(t-p)/G)---\left(3\right)$

The expectation of the e (t) that calculates by the following formula of adaptive algorithm minimization (4) can be trained to obtain predistorter coefficient w _Pk, give predistorter with it then, finish predistortion.Dotted line among the figure shows that in the adaptive algorithm process by the parameter transmission, the parameter that makes the training of predistorter and predistorter prop up is consistent.

$e\left(t\right)=\hat{z}\left(t\right)-z\left(t\right)---\left(4\right)$

For ease of describing, with ψ _k(y (t-p)/G) writes a Chinese character in simplified form and makes ψ _Pk, its expansion writing vector on time shaft ${\stackrel{\→}{\mathrm{\ψ}}}_{\mathrm{pk}}({\stackrel{\→}{\mathrm{\ψ}}}_{\mathrm{pk}}={[{\mathrm{\ψ}}_k\left(x(t_1-p)\right),...,{\mathrm{\ψ}}_k\left(x(t_n-p)\right)]}^T,$ T1 ..., the different time point of tn representative), can obtain data matrix thus:

$\mathrm{\Ψ}=[{\stackrel{\→}{\mathrm{\ψ}}}_{01},...,{\stackrel{\→}{\mathrm{\ψ}}}_{0K},{\stackrel{\→}{\mathrm{\ψ}}}_{11},...,{\stackrel{\→}{\mathrm{\ψ}}}_{1K},...,{\stackrel{\→}{\mathrm{\ψ}}}_{\mathrm{PK}}]---\left(5\right)$

The characteristic of matrix Ψ can have a strong impact on the performance for the adaptive algorithm of the above-mentioned e of minimization (t), and then has influence on the acquisition of pre-distortion coefficients.Wherein, the correlation of each column vector of matrix Ψ and the covariance matrix Ψ that constituted by matrix Ψ ^HThe characteristic value diffusion (conditional number) of Ψ is to describe the common index of the characteristic of matrix Ψ.

Correlation about each column vector of matrix Ψ it is desirable to each vectorial quadrature, namely wishes covariance matrix Ψ ^HAll off-diagonal elements among the Ψ go to zero.

About conditional number, it is defined as follows shown in the formula (6).

$\mathrm{\ρ}=\frac{{\mathrm{\λ}}_{\max }}{{\mathrm{\λ}}_{\min }}---\left(6\right)$

That is, conditional number equals covariance matrix Ψ ^HThe eigenvalue of maximum λ of Ψ _MaxWith minimal eigenvalue λ _MinThe ratio.It is desirable to conditional number and level off to 1, this characterization value diffusion is very slight.

As mentioned above, correlation between the multinomial in the prior art on the different delay point can have a strong impact on the training (being difficult to obtain the proper predistorter coefficient) of predistorter, finally has influence on the memoryless nonlinear characteristic of power amplifier and the compensation ability of memory characteristic.

Particularly, since relativity of time domain, Ψ ^HThe off-diagonal element of Ψ and conditional number all can increase along with the increase of time domain tap number (quantity of the basic function that time delay is arranged in each sub-predistorter) P.

For overcoming the influence that relativity of time domain causes, the data matrix of predistorter correspondence according to an embodiment of the invention

Shown in following formula (7).

Wherein,

In the formula (7),

Be basic function ψ _PkExpansion on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, P is the quantity of the basic function that time delay is arranged in each sub-predistorter, when p=0, ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged

Expansion on time shaft, 1≤i≤P, 1≤m≤K.

Formula (8) shows the basic function of time delay

Formation.

Orthogonalization coefficient matrix U is shown in following formula (9).

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right)---\left(9\right)$

By design matrix U, can be so that new covariance matrix

Diagonal angle and conditional number improve (off-diagonal element goes to zero, and conditional number is lower), and then improve the performance of adaptive training algorithm and the effect of predistorter.

Wherein, new covariance matrix ${\widehat{\mathrm{\Ψ}}}^H\widehat{\mathrm{\Ψ}}=U^H{\mathrm{\Ψ}}^H\mathrm{\ΨU}---\left(10\right)$

That is to say that the basic function of the no time delay in each sub-predistorter that has its source in of the problems referred to above and the basic function that all have time delay are not orthogonal.From above-mentioned formula (7)-(9) as can be seen, can solve the problems of the prior art by following manner: the basic function that time delay is arranged in each sub-predistorter is configured to the linear combination of time delay pattern of the basic function of the basic function of the no time delay in the same sub-predistorter and described no time delay, and is designed to make the basic function of the no time delay in each sub-predistorter and all basic function that time delay is arranged orthogonal the coefficient of described linear combination.

The structure of predistorter is described with reference to Figure 11,12 hereinafter.

Figure 11 shows a kind of predistorter of the prior art, and it comprises sub-predistorter I, II, III, IV...... of predetermined quantity etc.The output of sub-predistorter (z1 (t), z2 (t), z3 (t) ...) sum constitutes the output z (t) of predistorter.The structure of each sub-predistorter is identical, is example with sub-predistorter I, and it comprises the basic function branch road of a no time delay and the basic function branch road that one or more has time delay.The output sum of each branch road constitutes the output of sub-predistorter.

Input signal x (t) namely enters the basic function branch road of no time delay without time-delay, and wherein, input signal x (t) multiply by weight coefficient ω 01 after acting on through basic function ψ 01, as the output of the basic function branch road of no time delay.

At the first basic function branch road that time delay arranged, input signal x (t) through basic function ψ 11 effects after, multiply by weight coefficient ω 11, as first output that the basic function branch road of time delay arranged.Notice that delayer D only is the size that the purpose expressed illustrates the time-delay of this branch road herein.In fact, as mentioned above, there is the basic function ψ 11 of time delay itself namely to represent the time-delay with p=1.Therefore, and do not mean that input signal both through delayer D time-delay, also can experience time-delay again doing the time spent via the basic function ψ 11 that time delay is arranged again here.This first transfer function of integral body that the basic function branch road of time delay arranged of basic function ψ 11 expression shown in the figure.

Each has the time delay branch road to increase a timer on the basis of last branch road.

At the second basic function branch road that time delay arranged, input signal x (t) through basic function ψ 21 effects after, multiply by weight coefficient ω 21, as second output that the basic function branch road of time delay arranged.

By that analogy, the output sum of each branch road constitutes the output of sub-predistorter.

The structure of sub-predistorter II is identical with the structure of sub-predistorter I, and difference is that sub-predistorter II has the basic function different with sub-predistorter I (ψ 02, ψ 12, ψ 22......) and weight coefficient (ω 02, ω 12, ω 22......).

As mentioned above, in the prior art, the basic function of no time delay is orthogonal.Yet, belong between the basic function of no time delay of same sub-predistorter and each basic function that time delay is arranged owing to only increased time delay, thus not orthogonal.

Correlation between the multinomial on the different delay point can have a strong impact on the training of predistorter, finally has influence on the memoryless nonlinear characteristic of power amplifier and the compensation ability of memory characteristic.Particularly, the basic function of each branch road in the predistorter is not orthogonal will cause being difficult to calculate weight coefficient ω ij.

Therefore, as long as make the basic function of each branch road in the predistorter orthogonal (especially belong to the basic function of no time delay of same sub-predistorter and all have the basic function of time delay orthogonal), just can overcome problems of the prior art.By above-mentioned formula (7)-(9) as can be known, make that one of means that multinomial on the different delay point is orthogonal are the linear combination of time delay pattern that the basic function that time delay is arranged in each sub-predistorter is configured to the basic function of the basic function of the no time delay in the same sub-predistorter and described no time delay, and be designed to make the basic function of the no time delay that belongs to same sub-predistorter and all basic function that time delay is arranged orthogonal the coefficient of described linear combination.According to the present invention, orthogonal between all basic functions in sub-predistorter (basic function of no time delay, all the basic function that time delay is arranged), and then interior all basic functions of predistorter are orthogonal.

To corresponding circuit structure be described referring to Figure 12 below.

Figure 12 shows the schematic diagram according to predistorter of the present invention.Predistorter according to an embodiment of the invention has the structure identical with predistorter shown in Figure 11, and its difference is that basic function ψ ij (i＞0) is replaced by new basic function

Be ψ 0j and ψ qj (linear combination of 0＜q＜i), the coefficient of design linear combination make the no time delay in each sub-predistorter basic function with have the basic function of time delay orthogonal.

With

Be example,

Design u101 and u111 make

With ψ 01 quadrature.

Similarly, for

The design u201,211, u221 make ψ 01, Orthogonal.By that analogy.

The coefficient u of above-mentioned linear combination has constituted the orthogonalization coefficient matrix U in the aforesaid formula 9.

Computational methods as shown in Equation 8.

Covariance matrix

Diagonal angle and conditional number can reflect correlation between the multinomial on the different delay point, off-diagonal element more goes to zero, conditional number is more low, then orthogonality is more good.Therefore, the coefficient u of above-mentioned linear combination (element among the orthogonalization coefficient matrix U) can pass through the minimization covariance matrix

Off-diagonal element or conditional number find the solution and draw.

Except can adopting the look-up-table method of introducing previously to realize the present invention with the above-mentioned circuit structure structure predistorter.That is, can calculate output signal, and the mapping relations of input signal and output signal are stored in the question blank in advance according to input signal, basic function and orthogonalization coefficient, wherein, input signal has specific span, and can be quantified as limited value.When receiving real input signal, obtain output signal by the mode of searching question blank and get final product.By using question blank, improved the processing speed of predistorter effectively, and be conducive to the realization of software.

Figure 13 shows the block diagram that can realize the power amplification device of predistortion according to embodiments of the invention.

As shown in figure 13, this power amplification device 1300 that can realize predistortion comprises: predistortion module 1301 is used for input signal x (t) is carried out predistortion the output pre-distorted signals; Digital to analog converter 1302 is used for the pre-distorted signals that predistortion module 1301 is exported is converted to analog signal (for baseband signal); Upconverter 1303 is used for and will up-converts to radiofrequency signal from the baseband signal of digital to analog converter 1302 outputs; And power amplifier 1304, for the output signal y (t) that the radiofrequency signal of upconverter 1303 outputs is carried out after power amplification and power output are amplified.At this moment, the signal y (t) that power amplification device is exported has eliminated memoryless nonlinear characteristic and the memory characteristic of power amplifier, has the favorable linearity characteristic.

The power amplification device with predistorter module according to as above disposing utilizes digital technology to realize predistortion in base band, can remedy memoryless nonlinear characteristic and the memory characteristic of nonlinear power amplifier.

By above description as can be seen, according to embodiments of the invention, it is as follows also can to obtain pre-distortion method and the power-magnifying method corresponding with aforesaid predistorter and power amplification device:

A kind of pre-distortion method for power amplifier comprises the steps: to use the sub-predistortion module of predetermined quantity that input signal is handled, and the output sum of each sub-predistortion module is exported to power amplifier; Wherein, each described sub-predistortion module comprises no time delay module, one or more has the time delay module, and described processing comprises: the basic function that described no time delay module is calculated no time delay acts on the result of input signal as the output of described no time delay module; Described have the calculating of time delay module to have the basic function of time delay to act on the result of input signal as the described output that the time delay module is arranged; And calculate the output of the described no time delay module in the described sub-predistortion module and the described linear combination of output that one or more has the time delay module as the output of described sub-predistortion module; Wherein, the basic function of the no time delay in each sub-predistortion module with have the basic function of time delay orthogonal.

As one of execution mode, the basic function that time delay is arranged in each sub-predistortion module is the basic function of the no time delay in the same sub-predistortion module and the linear combination of the time delay pattern of the basic function of described no time delay, the coefficient of described linear combination make the no time delay in each sub-predistortion module basic function and have the basic function of time delay orthogonal.

As one of execution mode, can pass through the minimization covariance matrix Off-diagonal element or the conditional number coefficient u that obtains described linear combination, wherein,

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right),$

Be basic function ψ _PkExpansion on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, P is the quantity that the time delay module is arranged in each sub-predistortion module, when p=0, ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged Expansion on time shaft, 1≤i≤P, 1≤m≤K, U are the matrixes that described linear combination coefficient u constitutes.

A kind of power-magnifying method comprises: original input signal is carried out predistortion, the output predistorted input signal; Predistorted input signal is converted to analog signal; Analog signal is up-converted to radiofrequency signal; And radiofrequency signal carried out signal after power amplification and power output are amplified as output signal; Wherein, described predistortion step adopts aforesaid pre-distortion method.

In addition, should also be noted that each forms module in the said apparatus, the unit can be configured by the mode of software, firmware, hardware or its combination.Dispose spendable concrete means or mode and be well known to those skilled in the art, do not repeat them here.Under situation about realizing by software and/or firmware, from storage medium or network to the computer with specialized hardware structure, general purpose personal computer 1400 for example shown in Figure 14 is installed the program that constitutes this software, and this computer can be carried out various functions etc. when various program is installed.

In Figure 14, CPU (CPU) 1401 carries out various processing according to program stored among read-only memory (ROM) 1402 or from the program that storage area 1408 is loaded into random-access memory (ram) 1403.In RAM 1403, also store data required when CPU 1401 carries out various processing etc. as required.

CPU 1401, ROM 1402 and RAM 1403 are connected to each other via bus 1404.Input/output interface 1405 also is connected to bus 1404.

Following parts are connected to input/output interface 1405: importation 1406 comprises keyboard, mouse etc.; Output 1407 comprises display, such as cathode ray tube (CRT), LCD (LCD) etc. and loud speaker etc.; Storage area 1408 comprises hard disk etc.; With communications portion 1409, comprise that network interface unit is such as LAN card, modulator-demodulator etc.Communications portion 1409 is handled such as the internet executive communication via network.

As required, driver 1410 also is connected to input/output interface 1405.Detachable media 1411 is installed on the driver 1410 as required such as disk, CD, magneto optical disk, semiconductor memory etc., makes the computer program of therefrom reading be installed to as required in the storage area 1408.

Realizing by software under the situation of above-mentioned series of processes, such as detachable media 1411 program that constitutes software is being installed such as internet or storage medium from network.

It will be understood by those of skill in the art that this storage medium is not limited to shown in Figure 14 wherein has program stored therein, distributes to provide the detachable media 1411 of program to the user separately with equipment.The example of detachable media 1411 comprises disk (comprising floppy disk (registered trade mark)), CD (comprising compact disc read-only memory (CD-ROM) and digital universal disc (DVD)), magneto optical disk (comprising mini-disk (MD) (registered trade mark)) and semiconductor memory.Perhaps, storage medium can be hard disk that comprises in ROM 1402, the storage area 1408 etc., computer program stored wherein, and be distributed to the user with the equipment that comprises them.

The present invention also proposes a kind of program product that stores the instruction code that machine readable gets.When described instruction code is read and carried out by machine, can carry out above-mentioned method according to the embodiment of the invention.

Correspondingly, being used for the above-mentioned storage medium that stores the program product of the instruction code that machine readable gets of carrying is also included within of the present invention open.Described storage medium includes but not limited to floppy disk, CD, magneto optical disk, storage card, memory stick etc.

In the above in the description to the specific embodiment of the invention, can in one or more other execution mode, use in identical or similar mode at the feature that a kind of execution mode is described and/or illustrated, combined with the feature in other execution mode, or the feature in alternative other execution mode.

Should emphasize that term " comprises/comprise " existence that refers to feature, key element, step or assembly when this paper uses, but not get rid of the existence of one or more further feature, key element, step or assembly or additional.

In addition, the time sequencing of describing during method of the present invention is not limited to is to specifications carried out, also can according to other time sequencing ground, carry out concurrently or independently.Therefore, the execution sequence of the method for describing in this specification is not construed as limiting technical scope of the present invention.

Though described the present invention and advantage thereof in detail, be to be understood that and under the situation that does not break away from the spirit and scope of the present invention that limited by appended claim, can carry out various changes, alternative and conversion.And, the application's term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thereby make and comprise that process, method, article or the equipment of a series of key elements not only comprise those key elements, but also comprise other key elements of clearly not listing, or also be included as the intrinsic key element of this process, method, article or equipment.Do not having under the situation of more restrictions, the key element that is limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment that comprises described key element and also have other identical element.

Claims (8)

1. predistorter that is used for power amplifier, described predistorter comprises the sub-predistorter of predetermined quantity; Each described sub-predistorter comprises basic function, one or more basic function that time delay is arranged of no time delay, and the linear combination of the output of the output of the basic function of described no time delay and the described basic function that time delay arranged constitutes the output of sub-predistorter; The output sum of the sub-predistorter of described predetermined quantity constitutes the output of predistorter; It is characterized in that, the basic function of the no time delay in each sub-predistorter with have the basic function of time delay orthogonal.

2. predistorter as claimed in claim 1, wherein, the basic function that time delay is arranged in each sub-predistorter is the basic function of the no time delay in the same sub-predistorter and the linear combination of the time delay pattern of the basic function of described no time delay, the coefficient of described linear combination make the no time delay in each sub-predistorter basic function and have the basic function of time delay orthogonal.

3. predistorter as claimed in claim 2, wherein, by the minimization covariance matrix

Off-diagonal element or the conditional number coefficient u that obtains described linear combination, wherein,

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right),$

Be basic function ψ _PkExpansion on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, P is the quantity of the basic function that time delay is arranged in each sub-predistorter, when p=0, ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged

Expansion on time shaft, 1≤i≤P, 1≤m≤K, U are the matrixes that described linear combination coefficient u constitutes.

4. power amplification device comprises:

Predistorter is used for original input signal is carried out predistortion, the output predistorted input signal;

Digital to analog converter, the predistorted input signal that is used for predistorter is exported is converted to analog signal;

Upconverter is used for and will up-converts to radiofrequency signal from the analog signal of digital to analog converter output; And

Power amplifier is used for the radiofrequency signal of upconverter output is carried out signal after power amplification and power output are amplified as output signal;

Wherein, the structure of described predistorter is with identical according to the structure of the described predistorter for power amplifier of one of claim 1-3.

5. a pre-distortion method that is used for power amplifier comprises the steps:

Use the sub-predistortion module of predetermined quantity that input signal is handled, and the output sum of each sub-predistortion module is exported to power amplifier;

Wherein, each described sub-predistortion module comprises no time delay module, one or more has the time delay module, and described processing comprises:

The basic function that described no time delay module is calculated no time delay acts on the result of input signal as the output of described no time delay module;

Described have the calculating of time delay module to have the basic function of time delay to act on the result of input signal as the described output that the time delay module is arranged; And

Calculate the output of the described no time delay module in the described sub-predistortion module and the described linear combination of output that one or more has the time delay module as the output of described sub-predistortion module;

It is characterized in that, the basic function of the no time delay in each sub-predistortion module with have the basic function of time delay orthogonal.

6. pre-distortion method as claimed in claim 5, wherein, the basic function that time delay is arranged in each sub-predistortion module is the basic function of the no time delay in the same sub-predistortion module and the linear combination of the time delay pattern of the basic function of described no time delay, the coefficient of described linear combination make the no time delay in each sub-predistortion module basic function and have the basic function of time delay orthogonal.

7. pre-distortion method as claimed in claim 6, wherein, by the minimization covariance matrix

Off-diagonal element or the conditional number coefficient u that obtains described linear combination, wherein,

$U=\left(\begin{array}{cccccccc}1& 0& 0& ...& u_{101}& 0& ...& 0\\ 0& 1& 0& ...& 0& u_{102}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& u_{111}& 0& ...& 0\\ 0& 0& 0& ...& 0& u_{112}& ...& 0\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ .& .& .& & .& .& & .\\ 0& 0& 0& ...& 0& 0& ...& u_{\mathrm{PPK}}\end{array}\right),$

Be the expansion of basic function ψ pk on time shaft, 0≤p≤P, 1≤k≤K, K are described predetermined quantities, and P is the quantity that the time delay module is arranged in each sub-predistortion module, when p=0, and ψ _PkBe the basic function of no time delay, when p ≠ 0, ψ _PkBe the time delay pattern of the basic function of no time delay,

It is the basic function that time delay is arranged

Expansion on time shaft, 1≤i≤P, 1≤m≤K, U are the matrixes that described linear combination coefficient u constitutes.

8. power-magnifying method comprises:

Original input signal is carried out predistortion, the output predistorted input signal;

Predistorted input signal is converted to analog signal;

Analog signal is up-converted to radiofrequency signal; And

Radiofrequency signal is carried out signal after power amplification and power output are amplified as output signal;

Wherein, described predistortion step adopts according to the described pre-distortion method of one of claim 5-7.

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