CN103187038A - Double-gate liquid crystal display device and driving method thereof - Google Patents

Double-gate liquid crystal display device and driving method thereof Download PDF

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CN103187038A
CN103187038A CN2011104599352A CN201110459935A CN103187038A CN 103187038 A CN103187038 A CN 103187038A CN 2011104599352 A CN2011104599352 A CN 2011104599352A CN 201110459935 A CN201110459935 A CN 201110459935A CN 103187038 A CN103187038 A CN 103187038A
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pixel
data
gate
line
data line
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CN103187038B (en
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徐晓伟
蒋顺
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Shanghai AVIC Optoelectronics Co Ltd
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Shanghai AVIC Optoelectronics Co Ltd
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Abstract

The invention discloses a double-gate liquid crystal display device and a driving method of the double-gate liquid crystal display device. The driving method of the double-gate liquid crystal display device comprises the steps of using two adjacent lines of pixels as a unit, in each unit, firstly opening two gate lines in sequence, and keeping for a preset time, wherein polarities of data signals which are received by a source electrode of a pixel transistor connected with the two gate lines, and are transmitted through the same data line in the preset time period when the two gate lines are opened are identical, and polarities of data signals which are transmitted by two adjacent data lines in the same time period when gates are opened are opposite; enabling polarities of data lines to be overturned once, and opening another two gate lines; in two perpendicular adjacent units, enabling polarities of data signals transmitted by data lines to remain unchanged until gates of a pixel transistor connected with two gate lines in a next unit are opened when scanning of gate lines in a former unit is finished. Compared with an existing double-gate liquid crystal display device, the double-gate liquid crystal display device is power-saving in work.

Description

A kind of double grid liquid crystal indicator and driving method thereof
Technical field
The present invention relates to the liquid crystal indicator technical field, relate in particular to a kind of double grid liquid crystal indicator and driving method thereof.
Background technology
Existing liquid crystal indicator generally comprises the working method that single grid drive, double grid drives and three grid drive, and the most frequently used be preceding two kinds.Under identical resolution, compared to the liquid crystal indicator (being called for short single grid liquid crystal indicator) that single grid drive, the liquid crystal indicator that double grid drives (being called for short the double grid liquid crystal indicator) uses more grid drive chip and less source driving chip.Because the cost of grid drive chip and power consumption are all less than cost and the power consumption of source driving chip, therefore, the double grid liquid crystal indicator has lower cost and power consumption.
With reference to figure 1, Fig. 1 is the structural representation of a kind of double grid liquid crystal indicator common in the prior art, there is shown the pel array of being made up of a plurality of pixels and gate driver circuit and the source electrode drive circuit that links to each other with described pel array; Wherein, each pixel includes R, G, B sub-pixel; The pixel of each row connects two gate lines, and described two gate lines connect odd column sub-pixel and the even column sub-pixel in the corresponding row pixel respectively; Adjacent two row sub-pixels connect same data line, and interval two row sub-pixels between adjacent two data lines.
The concrete course of work is: gate driver circuit is controlled a gate line at every turn and is opened, at first give the gate lines G No. of delivering letters 1, open the transistorized grid of sub-pixel that gate lines G 1 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data for the R sub-pixel of first pixel, data line S2 writes data for the B sub-pixel of first pixel, data line S3 writes data for the G sub-pixel of second pixel, data line S4 writes data for the R sub-pixel of the 3rd pixel, data line S5 writes data for the B sub-pixel of the 3rd pixel, data line S6 writes data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.Secondly gate driver circuit gives the gate lines G No. of delivering letters 2, open the transistorized grid of sub-pixel that gate lines G 2 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data for the G sub-pixel of first pixel, data line S2 writes data for the R sub-pixel of second pixel, data line S3 writes data for the B sub-pixel of second pixel, data line S4 writes data for the G sub-pixel of the 3rd pixel, data line S5 writes data for the R sub-pixel of the 4th pixel, data line S6 writes data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.Gate lines G 3, G4 etc. open the coupled transistorized grid of each sub-pixel successively under the control of gate driver circuit.
Open at gate driver circuit control gate polar curve, carried in the process of data-signal by source electrode drive circuit afterwards, the polarity of the data-signal of carrying is different, be specially: with reference to figure 2, the polarity of the data-signal that adjacent two column data lines are carried to different crystal pipe source electrode simultaneously is opposite, and the Z-shaped trend of the data-signal that same data line is carried flows to different pixels respectively at different time, when gate driver circuit is given the gate lines G No. of delivering letters 1, after opening the transistorized grid of sub-pixel that gate lines G 1 connects, data line S1 writes the positive polarity data for the R sub-pixel of first pixel, data line S2 writes the negative polarity data for the B sub-pixel of first pixel, data line S3 writes the positive polarity data for the G sub-pixel of second pixel, data line S4 writes the negative polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the negative polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
After finishing the transistor that connects to gate lines G 1 and writing data, source electrode drive circuit control data line polarity changes, make data line S1 become negative polarity by original positive polarity, make data line S2 become positive polarity by original negative polarity, and any adjacent two data line polarity are opposite.
Secondly give the gate lines G No. of delivering letters 2, open the transistorized grid that gate lines G 2 connects, write the negative polarity data for the G sub-pixel of first pixel by data line S1 afterwards, data line S2 writes the positive polarity data for the R sub-pixel of second pixel, data line S3 writes the negative polarity data for the B sub-pixel of second pixel, data line S4 writes the positive polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the positive polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Send signal next for gate lines G 3, open the transistorized grid that gate lines G 3 connects, write the negative polarity data for the R sub-pixel of first pixel by data line S1 afterwards, data line S2 writes the positive polarity data for the B sub-pixel of first pixel, data line S3 writes the negative polarity data for the G sub-pixel of second pixel, data line S4 writes the positive polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the positive polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
After finishing the transistor that connects to gate lines G 2, G3 and writing data, source electrode drive circuit control data line polarity changes, make data line S1 become positive polarity by original negative polarity, make data line S2 become negative polarity by original positive polarity, and any adjacent two data line polarity are opposite.
Secondly give the gate lines G No. of delivering letters 4, open the transistorized grid that gate lines G 4 connects, data line S1 writes the positive polarity data for the G sub-pixel of first pixel afterwards, data line S2 writes the negative polarity data for the R sub-pixel of second pixel, data line S3 writes the positive polarity data for the B sub-pixel of second pixel, data line S4 writes the negative polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the negative polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Gate driver circuit is opened gate lines G 1, G2, G3, G4, G5, G6, G7, G8 etc. successively, and source electrode drive circuit is write the data of opposed polarity and given liquid crystal indicator according to the control signal of gate driver circuit, realizes different liquid crystal polarity upset modes.
But the source electrode drive circuit of above-mentioned type of drive whenever writes two sub-pixels need control the data line polarity upset once, and this polarity upset frequency requirement for source electrode drive circuit is higher, and power consumption is bigger.
Summary of the invention
In view of this, the embodiment of the invention provides a kind of double grid liquid crystal indicator and driving method thereof, this double grid liquid crystal indicator when work than the more power saving of existing double grid liquid crystal indicator.
For addressing the above problem, the embodiment of the invention provides following technical scheme:
A kind of driving method of double grid liquid crystal indicator, this method specifically comprises:
Be a unit with adjacent two row pixels and continuous gate line, data lines thereof, comprise different capable pixels in each unit, open the grid of the pixel transistor that each gate line connects in each unit from top to bottom in regular turn;
And in each unit, open the grid of the pixel transistor that two gate lines connect at first in regular turn, keep a Preset Time, and polarity that the source electrode of the pixel transistor that these two gate lines connect receives, through same data line institute data signals transmitted in the Preset Time that described two grids are opened is identical, and is opposite through the polarity of adjacent two data line institute data signals transmitted in the same time that described grid is opened; Make the polarity upset of each data line institute data signals transmitted afterwards once, open in addition the grid of the pixel transistor that two gate lines connect again successively;
And in vertical two adjacent unit, when the gate line scanning of a last unit is finished, this moment data line institute data signals transmitted polarity, remain unchanged in the time of after next unit is opened the grid of the pixel transistor that two gate lines connect.
Preferably, in the said method, in described unit, receive vertically adjacent arranging of sub-pixel that same data line opens time transmission polarity equalized data signal at different grids.
Preferably, in the said method, in each unit according to G 4m-3, G 4m-1, G 4m-2, G 4mOrder open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be N-type, anti-N-type or both any combinations and move towards to arrive the respective column pixel; Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe four gate lines arranging in regular turn in each unit, m is the positive integer more than or equal to 1.
Preferably, in the said method, in vertical two adjacent unit, open each gate line respectively in the following manner successively:
One of them unit is according to G 4m-3, G 4m, G 4m-1, G 4m-2Order open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be down " again " font and move towards to arrive the respective column pixel;
Another unit is according to G 4m+2, G 4m+3, G 4m+4, G 4m+1Order open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be down " again " font and move towards to arrive the respective column pixel;
Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe four gate lines arranging in regular turn in the last unit, G 4m+1, G 4m+2, G 4m+3, G 4m+4Be four gate lines arranging in regular turn in the next unit, m is the positive integer more than or equal to 1.
The present invention also provides a kind of double grid liquid crystal indicator, and this double grid liquid crystal indicator comprises:
The pel array of being formed by a plurality of pixels;
Many gate lines that link to each other with capable pixel in the described pel array;
Many data lines that link to each other with row pixel in the described pel array;
Wherein, each the row pixel in the described pel array connects two gate lines, and described two gate lines connect the different lines pixel in this row pixel; Each row pixel in the described pel array connects a data line, and adjacent two row pixels connect same data line, interval two row pixels between adjacent two data lines;
The driving method of this double grid liquid crystal indicator according to claim 1.
Preferably, in the above-mentioned double grid liquid crystal indicator, be connected to two row pixels of same data line, a row pixel is connected with the odd-numbered line gate line, and another row pixel is connected with the even number line gate line.
Preferably, in the above-mentioned double grid liquid crystal indicator, when providing signal to described gate line successively according to described many gate lines arrangement mode from top to bottom, move towards to arrive the respective column pixel to Z-shaped, the anti-Z type of the data-signal that same data line provides or both any combinations.
Preferably, in the above-mentioned double grid liquid crystal indicator, when according to G 4m-3, G 4m-1, G 4m-2, G 4mOrder when providing signal to each gate line successively, the data-signal that provides to same data line is N-type, anti-N-type or both any combinations and moves towards to arrive the respective column pixel;
Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe the gate line of arranging in regular turn, m is the positive integer more than or equal to 1.
From technique scheme as can be seen, the driving method of the double grid liquid crystal indicator that the embodiment of the invention provides is: be a unit with adjacent two row pixels and continuous gate line, data lines thereof, comprise different capable pixels in each unit, open the grid of the pixel transistor that each gate line connects in each unit from top to bottom in regular turn; And in each unit, open the grid of the pixel transistor that two gate lines connect at first in regular turn, keep a Preset Time, and polarity that the source electrode of the pixel transistor that these two gate lines connect receives, through same data line institute data signals transmitted in the Preset Time that described two grids are opened is identical, and is opposite through the polarity of adjacent two data line institute data signals transmitted in the same time that described grid is opened; Make the polarity upset of each data line institute data signals transmitted afterwards once, open in addition the grid of the pixel transistor that two gate lines connect again; And in vertical two adjacent unit, when the gate line scanning of a last unit is finished, this moment data line institute data signals transmitted polarity, remain unchanged in the time of after next unit is opened the grid of the pixel transistor that described two gate lines connect.The driving method of double grid liquid crystal indicator provided by the present invention, because after in each unit, opening the grid of the pixel transistor that two gate lines connect, make the polarity upset of each data line institute data signals transmitted once, therefore, for entire pixel array, finish provide signal to four gate lines after, the polarity generation once inside out of the data-signal that provides to each data line is provided, so open the polarity generation once inside out that makes each data line behind two gate lines compared to existing technology, can reduce the polarity upset frequency of source electrode drive circuit, save power consumption.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structural representation of a kind of double grid liquid crystal indicator common in the prior art;
The polarity distribution schematic diagram of the data-signal that Fig. 2 receives for each pixel in the double grid liquid crystal indicator common in the prior art;
Fig. 3 is the structural representation of a kind of double grid liquid crystal indicator provided by the present invention;
Fig. 4 is the polarity distribution schematic diagram of the data-signal that each pixel receives in a kind of double grid liquid crystal indicator provided by the present invention;
Fig. 5 is the polarity distribution schematic diagram of the data-signal that each pixel receives in the another kind of double grid liquid crystal indicator provided by the present invention;
Fig. 6 provides the sequential circuit figure of signal to each gate line for gate driver circuit in the double grid liquid crystal indicator provided by the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
A lot of details have been set forth in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here and implement, those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public specific embodiment.
With reference to figure 3, Fig. 3 is the structural representation of a kind of double grid liquid crystal indicator provided by the present invention, there is shown the pel array of being made up of a plurality of pixels, and the gate driver circuit and the source electrode drive circuit that link to each other with described pel array.
Described gate driver circuit by many gate lines G 1, G2, G3, G4 ..., G4m-3, G4m-2, G4m-1, G4m (wherein m is the positive integer more than or equal to 1) link to each other with capable pixel in the pel array, and each row pixel connects two gate lines, and described two gate lines connect with the different lines pixel in delegation's pixel; As shown in Figure 3, two gate lines G 1 and the G2 that are connected with the first row pixel are that example describes, gate lines G 1 connect first pixel in the first row pixel, the 4th pixel, the 5th pixel, the 8th pixel, the 9th pixel ... etc., gate lines G 2 connect second pixel in the first row pixel, the 3rd pixel, the 6th pixel, the 7th pixel, the tenth pixel ... etc., in like manner, the annexation between other row pixels two gate lines corresponding with it is same as described above.
Described source electrode drive circuit by many data line S1, S2, S3, S4 ..., S6n-2, S6n-1, S6n (wherein n is the positive integer more than or equal to 1) link to each other with row pixel in the pel array, and each row pixel connects a data line, adjacent two row pixels connect same data line, interval two row pixels between adjacent two data lines.Be connected to two row pixels of same data line, a row pixel is connected with the odd-numbered line gate line, and another row pixel is connected with the even number line gate line.
In the embodiment of the invention, if according to gate lines G 1, G2, G3, G4, ... the arrangement mode that waits provides signal to it successively, then correspondingly, when having signal on a certain gate line, thin film transistor (TFT) in its pixel that connects (abbreviation pixel transistor) is opened, thereby make the data line that links to each other with this pixel data-signal can be offered this pixel, so, for data line S1, its data-signal that provides will be successively to first first pixel of going, second pixel of first row, first pixel of second row, second pixel of second row, first pixel of the third line, second pixel of the third line, ... etc., therefore, the Z-shaped trend of data-signal that provides of data line S1 arrives corresponding row pixel respectively at different time; For data line S2, its data-signal that provides will be successively to the 3rd pixel of the 4th pixel of the 3rd pixel of the 4th pixel of the 3rd pixel of the 4th pixel of first row, first row, second row, second row, the third line, the third line ... etc., therefore, the data-signal that provides of data line S2 is anti-Z type (or claiming S type) trend and arrives corresponding row pixel respectively at different time; In like manner, the Z-shaped trend of data-signal that provides of odd column data lines such as data line S3, S5, S7 arrives corresponding row pixel respectively at different time; The data-signal that even column data lines such as data line S4, S6, S8 provide is anti-Z type (or claiming the S type) trend and arrives corresponding row pixel respectively at different time; Thereby the Z-shaped and anti-Z type of data-signal difference that makes adjacent two data lines provide moves towards to arrive the respective column pixel.
In like manner, if according to G 4m-3, G 4m-1, G 4m-2, G 4mThe order of (m for more than or equal to 1 positive integer) provides signal to each gate line successively, and then the data-signal that provides to adjacent two data lines is N-type respectively and anti-N-type move towards arrival respective column pixel.
Need to prove that the connected mode between above-mentioned gate line and pixel only is a kind of embodiment of the present invention, connect two gate lines as long as satisfy the pixel of each row, described two gate lines connect the different lines pixel in the corresponding row pixel respectively; Adjacent two row pixels connect same data line, and interval two row pixels between adjacent two data lines; Be connected to two row pixels of same data line, a row pixel is connected with the odd-numbered line gate line, and another row pixel is connected with the even number line gate line and gets final product.
For example, gate lines G 1 connect first pixel in the first row pixel, the 3rd pixel, the 5th pixel, the 7th pixel, the 9th pixel ... etc., gate lines G 2 connect second pixel in the first row pixel, the 4th pixel, the 6th pixel, the 8th pixel, the tenth pixel ... etc., in like manner, the annexation between other row pixels two gate lines corresponding with it is same as described above.
Therefore, for double grid liquid crystal indicator provided by the present invention, when providing signal to each gate line successively according to many gate lines arrangement mode from top to bottom, the data-signal that provides to same data line can Z-shaped, anti-Z type or both any combinations move towards to arrive the respective column pixel.
When according to G 4m-3, G 4m-1, G 4m-2, G 4mOrder when providing signal to each gate line successively, the data-signal that provides to same data line is N-type, anti-N-type or both any combinations and moves towards to arrive the respective column pixel; Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe the gate line of arranging in regular turn, m is the positive integer more than or equal to 1.
Double grid liquid crystal indicator provided by the present invention, its driving method that adopts is specific as follows:
The driving method of double grid liquid crystal indicator provided by the present invention, when providing signal to each gate line, should follow following principle: with adjacent two row pixel and continuous gate lines thereof, data line is a unit, comprise different capable pixels in each unit, open the grid of the pixel transistor that each gate line connects in each unit from top to bottom in regular turn, be to drive in order between unit and the unit, but, four gate lines in the same unit but not necessarily provide signal to it in order, in any case but should satisfy: in same unit, at first open the grid of the pixel transistor that two gate lines connect, keep a Preset Time, this Preset Time is opening the time of grid, and at first the source electrode of the pixel transistor that connects of two gate lines of this that open receives, polarity through same data line institute data signals transmitted in the Preset Time that described two grids are opened is identical, opposite through the polarity of adjacent two data line institute data signals transmitted in the same time that gate line is opened, namely satisfy: in each unit, behind the grid of opening the pixel transistor that two gate lines connect, make the polarity generation once inside out of the data-signal that each data line provides, therefore, in same unit, article four, gate line is divided into two groups, every group of two gate lines, after two gate lines in each group are opened, same data line is identical in the polarity of different time (namely opening the time of corresponding two gate lines) respectively institute's data signals transmitted, but after the gate line in was not on the same group opened, the polarity of same data line institute data signals transmitted was opposite; In addition also should satisfy: in each unit, after arbitrary gate line is opened, arbitrarily the polarity of institute's data signals transmitted is opposite at one time for adjacent two data lines, simultaneously, in vertical two adjacent unit, when the gate line scanning of a last unit is finished, the polarity of the data line institute data signals transmitted of this moment remains unchanged, open the grid of the pixel transistor that two gate lines connect up to next unit after, once inside out takes place in the polarity of the data-signal that each data line provides again, successively circulation.Therefore, in entire pixel array, when finish provide signal to four gate lines after, the polarity generation once inside out of the data-signal that each data line provides, so open the polarity generation once inside out that makes each data line behind two gate lines compared to existing technology, can reduce the polarity upset frequency of source electrode drive circuit, save power consumption.
Describe the driving method of double grid liquid crystal indicator provided by the present invention in detail below in conjunction with specific embodiment.
With reference to figure 3, every capable pixel is arranged in regular turn and is formed by a plurality of R, G, B pixel among the figure, here, R, G adjacent in every capable pixel, B pixel are called a pixel, R, G and B pixel are called the sub-pixel of this pixel, then for gate lines G 1, it links to each other with the R sub-pixel, the R sub-pixel of second pixel, the G sub-pixel of second pixel, the G sub-pixel of the 3rd pixel etc. of first pixel in the first row pixel; For gate lines G 2, it links to each other with the G sub-pixel, the B sub-pixel of first pixel, the B sub-pixel of second pixel, the R sub-pixel of the 3rd pixel etc. of first pixel in the first row pixel; Other gate lines are similar therewith, repeat no more.
Be a unit with adjacent two row pixels and continuous gate line, data lines thereof, comprise different capable pixels in each unit, from top to bottom the gate line in each unit provides signal in regular turn; And from top to bottom the order by article one gate line, the 3rd gate line, second gate line and the 4th gate line provides signal to each gate line in each unit, makes the data-signal that is provided by adjacent two data lines in each unit be N-type respectively and anti-N-type moves towards to arrive the respective column pixel.As shown in Figure 3 and Figure 4, article one gate line in the first module, second gate line, the 3rd gate line and the 4th gate line are respectively gate lines G 1, G2, G3 and G4, and article one gate line in Unit second, second gate line, the 3rd gate line and the 4th gate line are respectively gate lines G 5, G6, G7 and G8.
The concrete course of work of this double grid liquid crystal indicator is as follows: gate driver circuit is controlled a gate line at every turn and is opened, at first give the gate lines G No. of delivering letters 1, open the transistorized grid of sub-pixel that gate lines G 1 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data (being transmission of data signals) to the R sub-pixel of first pixel in the first row pixel, data line S2 writes data for the R sub-pixel of second pixel, data line S3 writes data for the G sub-pixel of second pixel, data line S4 writes data for the G sub-pixel of the 3rd pixel, data line S5 writes data for the B sub-pixel of the 3rd pixel, data line S6 writes data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Secondly gate driver circuit gives the gate lines G No. of delivering letters 3, open the transistorized grid of sub-pixel that gate lines G 3 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data to the R sub-pixel of first pixel in the second row pixel, data line S2 writes data for the R sub-pixel of second pixel, data line S3 writes data for the G sub-pixel of second pixel, data line S4 writes data for the G sub-pixel of the 3rd pixel, data line S5 writes data for the B sub-pixel of the 3rd pixel, data line S6 writes data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Next give the gate lines G No. of delivering letters 2, open the transistorized grid of sub-pixel that gate lines G 2 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data to the G sub-pixel of first pixel in the first row pixel, data line S2 writes data for the B sub-pixel of first pixel, data line S3 writes data for the B sub-pixel of second pixel, data line S4 writes data for the R sub-pixel of the 3rd pixel, data line S5 writes data for the R sub-pixel of the 4th pixel, data line S6 writes data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
Next give the gate lines G No. of delivering letters 4, open the transistorized grid of sub-pixel that gate lines G 4 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes data to the G sub-pixel of first pixel in the second row pixel, data line S2 writes data for the B sub-pixel of first pixel, data line S3 writes data for the B sub-pixel of second pixel, data line S4 writes data for the R sub-pixel of the 3rd pixel, data line S5 writes data for the R sub-pixel of the 4th pixel, data line S6 writes data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
With reference to figure 6, gate driver circuit has been shown among Fig. 6 provides the sequential circuit figure of signal to each gate line, among the figure for every gate line, noble potential represents gate driver circuit and provides signal to it, constitute a unit (and comprising different gate lines in each unit) by adjacent four gate lines, then in each unit, gate driver circuit (is gate lines G 1 in first module to article one gate line successively, it is gate lines G 5 in Unit second, ..., be gate lines G in the m unit 4m-3), the 3rd gate line (being gate lines G 3 in first module, is gate lines G 7 in Unit second ..., be gate lines G in the m unit 4m-1), the second gate line (being gate lines G 2 in first module, is gate lines G 6 in Unit second ..., be gate lines G in the m unit 4m-2) and the 4th gate line (being gate lines G 4 in first module, is gate lines G 8 in Unit second ..., be gate lines G in the m unit 4m) signal (m for more than or equal to 1 positive integer) is provided.And described gate driver circuit provides signal to be undertaken by unit ordering to each gate line in each unit, that is: after finishing each gate line in the first module and all providing signal, just each gate line in Unit second provides signal.Be that example describes with the first eight bar gate line just among Fig. 6, other gate line is similar therewith.
With reference to figure 3 and Fig. 4, provide signal according to above-mentioned driving method to each gate line, then the data-signal that provides to data line S1 of source electrode drive circuit is anti-N-type trend and arrives corresponding row pixel respectively at different time, the data-signal that provides to data line S2 is the N-type trend and arrives corresponding row pixel respectively at different time, in like manner, to data line S3, the data-signal that odd column data lines such as S5 provide is anti-N-type trend and arrives corresponding row pixel respectively at different time, to data line S4, the data-signal that even column data lines such as S6 provide is N-type trend and arrives corresponding row pixel respectively at different time, that is: the data line signal that provides to adjacent two data lines is N-type respectively and anti-N-type trend arrives corresponding row pixel respectively at different time.
With reference to figure 3 and Fig. 4, after gate driver circuit at a time provides signal to a certain gate line, source electrode drive circuit correspondingly provides data-signal to each data line, and the polarity of the data-signal that provides to adjacent two data lines at one time is opposite; And, in each unit, when by data line to article one gate line with after the 3rd sub-pixel that gate line links to each other provides data-signal, the polarity generation once inside out of the data-signal that provides to each data line is provided the control by source electrode drive circuit.
The control mode of the polarity of each data-signal is as follows: at first give the gate lines G No. of delivering letters 1 in the first module by gate driver circuit, open the transistorized grid of sub-pixel that gate lines G 1 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes positive polarity data (namely transmitting the data-signal of positive polarity) to the R sub-pixel of first pixel in the first row pixel, data line S2 writes the negative polarity data for the R sub-pixel of second pixel, data line S3 writes the positive polarity data for the G sub-pixel of second pixel, data line S4 writes the negative polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the negative polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Secondly gate driver circuit gives the gate lines G No. of delivering letters 3, open the transistorized grid of sub-pixel that gate lines G 3 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the positive polarity data to the R sub-pixel of first pixel in the second row pixel, data line S2 writes the negative polarity data for the R sub-pixel of second pixel, data line S3 writes the positive polarity data for the G sub-pixel of second pixel, data line S4 writes the negative polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the negative polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
After the writing of the transistorized data-signal of sub-pixel that in finishing first module, links to each other with G3 with gate lines G 1, the polarity generation once inside out of the data-signal that source electrode drive circuit provides to each data line, that is: the polarity of the data-signal that provides to data line S1 becomes negative polarity by positive polarity, the polarity of the data-signal that provides to data line S2 becomes positive polarity by negative polarity, the polarity of the data-signal that provides to other each data lines is all overturn (or change), and the polarity of the data-signal that provides to adjacent two data lines is opposite.
Next give the gate lines G No. of delivering letters 2 in the first module, open the transistorized grid of sub-pixel that gate lines G 2 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the negative polarity data to the G sub-pixel of first pixel in the first row pixel, data line S2 writes the positive polarity data for the B sub-pixel of first pixel, data line S3 writes the negative polarity data for the B sub-pixel of second pixel, data line S4 writes the positive polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the positive polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
Next give the gate lines G No. of delivering letters 4, open the transistorized grid of sub-pixel that gate lines G 4 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the negative polarity data to the G sub-pixel of first pixel in the second row pixel, data line S2 writes the positive polarity data for the B sub-pixel of first pixel, data line S3 writes the negative polarity data for the B sub-pixel of second pixel, data line S4 writes the positive polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the positive polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
After the writing of the transistorized data-signal of sub-pixel that links to each other with G4 with gate lines G 2 in finishing first module, source electrode drive circuit is constant to the polarity of the data-signal that each data line provides.
Afterwards by gate lines G the deliver letters No. 5 of gate driver circuit in Unit second, open the transistorized grid of sub-pixel that gate lines G 5 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the negative polarity data for the R sub-pixel of first pixel in the third line pixel, data line S2 writes the positive polarity data for the R sub-pixel of second pixel, data line S3 writes the negative polarity data for the G sub-pixel of second pixel, data line S4 writes the positive polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the positive polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
Secondly gate driver circuit gives the gate lines G No. of delivering letters 7, open the transistorized grid of sub-pixel that gate lines G 7 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the negative polarity data for the R sub-pixel of first pixel in the fourth line pixel, data line S2 writes the positive polarity data for the R sub-pixel of second pixel, data line S3 writes the negative polarity data for the G sub-pixel of second pixel, data line S4 writes the positive polarity data for the G sub-pixel of the 3rd pixel, data line S5 writes the negative polarity data for the B sub-pixel of the 3rd pixel, data line S6 writes the positive polarity data for the B sub-pixel of the 4th pixel, and data are write in circulation successively.
After the writing of the transistorized data-signal of sub-pixel that in finishing Unit second, links to each other with G7 with gate lines G 5, the polarity generation once inside out of the data-signal that source electrode drive circuit provides to each data line, that is: the polarity of the data-signal that provides to data line S1 becomes positive polarity by negative polarity, the polarity of the data-signal that provides to data line S2 becomes negative polarity by positive polarity, the polarity of the data-signal that provides to other each data lines is all overturn (or change), and the polarity of the data-signal that provides to adjacent two data lines is opposite.
Next give the gate lines G No. of delivering letters 6 in Unit second, open the transistorized grid of sub-pixel that gate lines G 6 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the positive polarity data for the G sub-pixel of first pixel in the third line pixel, data line S2 writes the negative polarity data for the B sub-pixel of first pixel, data line S3 writes the positive polarity data for the B sub-pixel of second pixel, data line S4 writes the negative polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the negative polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
Next give the gate lines G No. of delivering letters 8, open the transistorized grid of sub-pixel that gate lines G 8 connects, source electrode drive circuit send data-signal to give corresponding sub-pixel transistor by data line, that is: data line S1 writes the positive polarity data for the G sub-pixel of first pixel in the fourth line pixel, data line S2 writes the negative polarity data for the B sub-pixel of first pixel, data line S3 writes the positive polarity data for the B sub-pixel of second pixel, data line S4 writes the negative polarity data for the R sub-pixel of the 3rd pixel, data line S5 writes the positive polarity data for the R sub-pixel of the 4th pixel, data line S6 writes the negative polarity data for the G sub-pixel of the 4th pixel, and data are write in circulation successively.
After the writing of the transistorized data-signal of sub-pixel that in finishing Unit second, links to each other with G8 with gate lines G 6, source electrode drive circuit is constant to the polarity of the data-signal that each data line provides, each gate line that begins afterwards in Unit the 3rd provides signal, and each pixel provides data-signal in Unit the 3rd, the change of the polarity of the data-signal that provides to each pixel is same as described above, gives unnecessary details no longer one by one.
Foregoing description is a specific embodiment, certainly, and when in each unit, providing signal to four gate lines, needn't be according to order described above, also can be as shown in Figure 5, be a circulation with vertical two adjacent unit, wherein go up a unit in regular turn to gate lines G 4m-3, G 4m, G 4m-1, G 4m-2Signal is provided, and next unit is in regular turn to gate lines G 4m+2, G 4m+3, G 4m+4, G 4m+1Signal is provided; The data line signal that provide to adjacent two data lines this moment is down " again " word trend respectively and arrives corresponding row pixel respectively at different time.Just this moment corresponding each pixel that is transported to the polarity of data-signal will be with different shown in Fig. 4, in any case but, should follow the principle of double grid liquid crystal display apparatus driving circuit provided by the present invention.
In summary, the driving method of double grid liquid crystal indicator provided by the present invention, source electrode drive circuit provides the mode of signal to each gate line according to gate driver circuit, after in each unit, opening two gate lines, keep a Preset Time, the polarity generation once inside out of the data-signal that provides to each data line is provided, and in the same unit, the source electrode of the pixel transistor that two gate lines opening earlier connect receives, polarity through same data line institute data signals transmitted in the Preset Time that described two grids are opened is identical, and is opposite through the polarity of adjacent two data line institute data signals transmitted in the same time that grid is opened; Therefore, for entire pixel array, when gate driver circuit finish provide signal to four gate lines after, the polarity generation once inside out of the data-signal that is provided to each data line by source electrode drive circuit control, and the driving method of double grid liquid crystal indicator of the prior art, be finish provide signal to two gate lines after, the polarity generation once inside out of the data-signal that provides to each data line is provided, therefore, method provided by the present invention can be saved power consumption compared to existing technologies; And, adopt method provided by the present invention can realize the pixel polarity upset mode that two row one are listed as, and this does not realize in the prior art.
Various piece adopts the mode of going forward one by one to describe in this instructions, and what each part stressed is and the difference of other parts that identical similar part is mutually referring to getting final product between the various piece.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and defined General Principle can realize under the situation that does not break away from the spirit or scope of the present invention in other embodiments herein.Therefore, the present invention will can not be restricted to embodiment illustrated herein, but will meet the wideest scope consistent with principle disclosed herein and features of novelty.

Claims (8)

1. the driving method of a double grid liquid crystal indicator is characterized in that,
Be a unit with adjacent two row pixels and continuous gate line, data lines thereof, comprise different capable pixels in each unit, open the grid of the pixel transistor that each gate line connects in each unit from top to bottom in regular turn;
And in each unit, open the grid of the pixel transistor that two gate lines connect at first in regular turn, keep a Preset Time, and polarity that the source electrode of the pixel transistor that these two gate lines connect receives, through same data line institute data signals transmitted in the Preset Time that described two grids are opened is identical, and is opposite through the polarity of adjacent two data line institute data signals transmitted in the same time that described grid is opened; Make the polarity upset of each data line institute data signals transmitted afterwards once, open in addition the grid of the pixel transistor that two gate lines connect again successively;
And in vertical two adjacent unit, when the gate line scanning of a last unit is finished, this moment data line institute data signals transmitted polarity, remain unchanged in the time of after next unit is opened the grid of the pixel transistor that two gate lines connect.
2. the driving method of double grid liquid crystal indicator according to claim 1 is characterized in that, in described unit, receives vertically adjacent arranging of sub-pixel that same data line opens time transmission polarity equalized data signal at different grids.
3. the driving method of double grid liquid crystal indicator according to claim 1 is characterized in that,
In each unit according to G 4m-3, G 4m-1, G 4m-2, G 4mOrder open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be N-type, anti-N-type or both any combinations and move towards to arrive the respective column pixel;
Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe four gate lines arranging in regular turn in each unit, m is the positive integer more than or equal to 1.
4. the driving method of double grid liquid crystal indicator according to claim 1 is characterized in that,
In vertical two adjacent unit, open each gate line respectively in the following manner successively:
One of them unit is according to G 4m-3, G 4m, G 4m-1, G 4m-2Order open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be down " again " font and move towards to arrive the respective column pixel;
Another unit is according to G 4m+2, G 4m+3, G 4m+4, G 4m+1Order open the grid of the pixel transistor that each gate line connects in regular turn, make the data-signal that provides to same data line in the pel array be down " again " font and move towards to arrive the respective column pixel;
Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe four gate lines arranging in regular turn in the last unit, G 4m+1, G 4m+2, G 4m+3, G 4m+4Be four gate lines arranging in regular turn in the next unit, m is the positive integer more than or equal to 1.
5. a double grid liquid crystal indicator is characterized in that, comprising:
The pel array of being formed by a plurality of pixels;
Many gate lines that link to each other with capable pixel in the described pel array;
Many data lines that link to each other with row pixel in the described pel array;
Wherein, each the row pixel in the described pel array connects two gate lines, and described two gate lines connect the different lines pixel in this row pixel; Each row pixel in the described pel array connects a data line, and adjacent two row pixels connect same data line, interval two row pixels between adjacent two data lines;
The driving method of this double grid liquid crystal indicator according to claim 1.
6. double grid liquid crystal indicator according to claim 5 is characterized in that, is connected to two row pixels of same data line, and a row pixel is connected with the odd-numbered line gate line, and another row pixel is connected with the even number line gate line.
7. double grid liquid crystal indicator according to claim 5, it is characterized in that, when providing signal to described gate line successively according to described many gate lines arrangement mode from top to bottom, move towards to arrive the respective column pixel to Z-shaped, the anti-Z type of the data-signal that same data line provides or both any combinations.
8. double grid liquid crystal indicator according to claim 5 is characterized in that, when according to G 4m-3, G 4m-1, G 4m-2, G 4mOrder when providing signal to each gate line successively, the data-signal that provides to same data line is N-type, anti-N-type or both any combinations and moves towards to arrive the respective column pixel;
Wherein, G 4m-3, G 4m-2, G 4m-1And G 4mBe the gate line of arranging in regular turn, m is the positive integer more than or equal to 1.
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