CN103178853B - Based on the sparse signal lack sampling method of compressed sensing - Google Patents

Abstract

Based on the sparse signal lack sampling method of compressed sensing, relate to a kind of sparse signal lack sampling method.It is in order to the situation decline lower frequency region sparse signal sample rate in guarantee signal recuperation effect.The present invention adopts FPGA to produce triggering signal and m sequence, with tested sparse signal mixing after the conditioning of m sequence, and through low pass filter filtering.Data sampling module is sampled to filtered signal after triggering signal being detected, store sample data.When signal reconstruction, need first to try to achieve system transter, and the m sequence corresponding with sampled data, then apply OMP signal reconstruction algorithm and recover original signal.The present invention is applicable to the lack sampling of frequency-domain sparse analog signal.

Description

Based on the sparse signal lack sampling method of compressed sensing

Technical field

The present invention relates to a kind of sparse signal lack sampling method.

Background technology

Traditional intelligence sample process must follow nyquist sampling theorem, and namely sampling rate is at least greater than 2 times of original signal highest frequency, recovers primary signal without distortion the discrete data that could obtain from sampling like this.But along with the development of information technology, the signal transacting framework based on nyquist sampling theorem proposes higher requirement to the sampling rate of front-end A/D C and processing speed, brings immense pressure also to the link such as transmission, storage of backend information.Solving the common scheme of these pressure is Signal Compression, but, this method compressed afterwards of first sampling does not have the pressure reducing front-end A/D C, and Signal Compression means in sampling process have a large amount of redundant informations, wastes the resources such as a large amount of sensing elements, time and memory space.

Within 2004, propose compressive sensing theory (CompressiveSensing, CS) by people such as Candes and Donoho.Signal Compression and sampling merging can be carried out by this theory, namely while signal acquisition, just suitably compress data, just significantly can reduce signal sampling rate when signal has openness.

Under signal has openness prerequisite, can (every a line of Φ can be regarded as a transducer here with orthogonal basis matrix Ψ incoherent observing matrix Φ: M × N (M N) with one, it and multiplication, obtain the partial information of signal), compression observation is performed to signal x:

y＝Φx(1)

Just can obtain M Systems with Linear Observation value (projection) y ∈ ^m.The enough information of reconstruction signal x is then contained in these a small amount of linear projections.

Then from measured value y, the reconstruction signal of original signal is obtained by special algorithm

Frequency-domain sparse signal has the characteristic of spectrum sparse, is namely sparse on frequency domain, and such orthogonal basis matrix Ψ just can get Fourier transform matrix.If x (t) is an analog signal, Fourier transform is carried out to it, namely the Fourier transform base vector that it is tieed up with N × 1 linear combination represent.Then x (t) can expand into:

$x\left(t\right)=\underset{n=1}{\overset{N}{\Σ}}{\mathrm{\α}}_n{\mathrm{\ψ}}_n\left(t\right)---\left(2\right)$

Wherein: ψ _n(t)=e ^{j2 π t (n-1)/N}.

Fourier Transform Coefficients:

α _n＝<x(t),ψ _n(t)>＝ψ _n ^T(t)x(t)

These coefficients composition coefficient vector α=(α ₁, α ₂..., α _n) ^t, the frequency spectrum of Here it is signal, each element is a spectrum component of signal.If by the element in coefficient vector α by after descending, element value is decayed rapidly, or the larger coefficient number of coefficient vector α intermediate value is K, and K is much less than N, then show that this signal is sparse at frequency domain, claim x (t) to be frequency-domain sparse signal, its degree of rarefication is K.

For frequency-domain sparse signal sampling, utilize compressive sensing theory to break through to be the restriction of Qwest's Sampling Theorem, realize lack sampling.Compressive sensing theory represents, the sampling rate of frequency-domain sparse signal no longer depends on highest frequency or the bandwidth of signal, but depends on the degree of rarefication K of signal.If signal degree of rarefication is K, when signal is discrete signal, can be obtained the scope of minimum sampling number M by formula (3), wherein N is the length of original signal, and c is a very little constant.When signal is continuous analog signal, N be original signal be Qwest's frequency, the scope of Least sampling rate M can be obtained by formula (3).

M≥cKlog(N/K)(3)

Summary of the invention

The present invention is in order to the situation decline lower frequency region sparse signal sample rate in guarantee signal recuperation effect, thus provides a kind of sparse signal lack sampling method based on compressed sensing.

Based on the sparse signal lack sampling method of compressed sensing, it is realized by following steps:

Step one, employing are embedded in m sequencer in FPGA and produce m sequence; And adopt FPGA synchronously to produce triggering signal;

Step 2, m sequence step one produced adopt signal conditioning circuit to carry out signal condition, obtain the m sequence after conditioning;

After step 3, the conditioning that step 2 obtained, m sequence and tested sparse signal adopt multiplier to carry out mixing, acquisition mixed frequency signal;

Step 4, employing low pass filter carry out low-pass filtering to the mixed frequency signal that step 3 obtains, signal after acquisition low-pass filtering;

Step 5, adopt in step one and produce triggering signal and trigger sample circuit, and after the low-pass filtering adopting sample circuit to obtain step 4, signal is sampled, acquisition sampled result;

Step 6, employing host computer carry out signal reconstruction to the sampled result that step 5 obtains, and obtain the reconstruction result of original tested sparse signal.

Employing host computer described in step 6 to the concrete grammar that the sampled result that step 5 obtains carries out signal reconstruction is:

Steps A, according to formula:

H(s)＝H ₁(s)G(s)

Obtain the transfer function H (s) be mixed between sampling;

In formula: H ₁s transfer function that () is low pass filter, described low pass filter is second order Butterworth simulation low-pass filter;

G (s) is for being mixed to the continued product of operational amplification circuit transfer function at different levels between sampling;

H ₁s () is according to formula:

$H_1\left(s\right)=\frac{w_c^2}{s^2+\frac{w_c}{Q}s+w_c^2}$

Obtain;

In formula: w _cbe the cut-off frequency of low pass filter, Q is quality factor; S is-symbol variable;

G (s) is according to formula:

G(s)＝G ₁(s)G ₂(s)…G _n(s)

Obtain;

In formula: G ₁s () is first operational amplification circuit transfer function; G ₂s () is the transfer function of second operational amplification circuit; G _ns () is the transfer function of the n-th operational amplification circuit; N is positive integer;

Step B, employing Bilinear transformation method carry out sliding-model control to the transfer function H (s) be mixed between sampling that steps A obtains, obtain digital filter transfer function H (z), and try to achieve impulse response h (n) of digital filter transfer function H (z);

Step C, impulse response h (n) of the digital filter transfer function H (z) in step B to be overturn, obtain upset result h _r(n);

Step D, by the m sequence p in step one _cn upset result h that () and step C obtain _rn () does convolution algorithm, obtain observing matrix Φ;

Step e, according to formula:

Θ＝ΦΨ

Obtain perception matrix Θ;

In formula: Ψ is orthogonal basis matrix, and described Ψ is according to formula:

Ψ＝dftmtx(N)

Obtain; Described dftmtx be MATLAB software from tape function;

Step F, according to step e obtain perception matrix Θ realize signal reconstruction by orthogonal matching pursuit algorithm.

Based on the implement device of the sparse signal lack sampling method of compressed sensing, it comprises FPGA15, modulate circuit 16, multiplier 11, low pass filter 12, sample circuit 13 and host computer 14;

Described FPGA15 is embedded with m sequencer, and described m sequencer is for generation of m sequence;

The m sequence output of described FPGA15 is connected with the signal input part of signal conditioning circuit 16; The signal output part of described signal conditioning circuit 16 is connected with a signal input part of multiplier 11; No. two signal input parts of described multiplier 11 are for receiving tested sparse signal; The signal output part of described multiplier 11 is connected with the signal input part of low pass filter 12; The signal output part of described low pass filter 12 is connected with the signal input part of sample circuit 13; The signal output part of described sample circuit 13 is connected with the signal input part of host computer 14.

Method of the present invention utilizes the characteristic that frequency-domain sparse signal spectrum is sparse, under the prerequisite ensureing signal recuperation effect, considerably reduce the sample rate of frequency-domain sparse signal, and when contained by signal, the maximum of frequency component is larger, this effect is more obvious, and actual sample rate can be made to be Qwest's frequency much smaller than signal.The requirement that can reduce speed to AD device of the present invention, and sampled data output is little, saves memory space, is conducive to the transmission of data.

Accompanying drawing explanation

Fig. 1 is system configuration schematic diagram of the present invention; Fig. 2 is the m sequencer and control logic schematic diagram that embed in FPGA; Fig. 3 is the connection diagram of subtraction circuit in embodiment five; Fig. 4 is the circuit connection diagram of AD633 analog multiplier in embodiment five; Fig. 5 is MAX275 internal structure and second order Butterworth simulation low-pass filter circuit connection diagram in embodiment five; Fig. 6 is the data point line waveform schematic diagram of original tested sparse signal; Fig. 7 is the spectrum diagram of the original tested sparse signal containing 3kHz, 4kHz two frequency bins; Fig. 8 is the line waveform schematic diagram of data point in signal after reconstruct; Fig. 9 is the experimental result picture containing the original tested sparse signal of 3kHz, 4kHz two frequency bins with the data reconstruction of random demodulation system.

Embodiment

Embodiment one, sparse signal lack sampling method based on compressed sensing, it is realized by following steps:

Step one, employing are embedded in m sequencer in FPGA and produce m sequence; And adopt FPGA synchronously to produce triggering signal;

Step 2, m sequence step one produced adopt signal conditioning circuit to carry out signal condition, obtain the m sequence after conditioning;

After step 3, the conditioning that step 2 obtained, m sequence and tested sparse signal adopt multiplier to carry out mixing, acquisition mixed frequency signal;

Step 4, employing low pass filter carry out low-pass filtering to the mixed frequency signal that step 3 obtains, signal after acquisition low-pass filtering;

Step 5, adopt in step one and produce triggering signal and trigger sample circuit, and after the low-pass filtering adopting sample circuit to obtain step 4, signal is sampled, acquisition sampled result;

Step 6, employing host computer carry out signal reconstruction to the sampled result that step 5 obtains, and obtain the reconstruction result of original tested sparse signal.

Embodiment two, implement device based on the sparse signal lack sampling method of compressed sensing, it comprises FPGA15, modulate circuit 16, multiplier 11, low pass filter 12, sample circuit 13 and host computer 14;

Described FPGA15 is embedded with m sequencer, and described m sequencer is for generation of m sequence;

The m sequence output of described FPGA15 is connected with the signal input part of signal conditioning circuit 16; The signal output part of described signal conditioning circuit 16 is connected with a signal input part of multiplier 11; No. two signal input parts of described multiplier 11 are for receiving tested sparse signal; The signal output part of described multiplier 11 is connected with the signal input part of low pass filter 12; The signal output part of described low pass filter 12 is connected with the signal input part of sample circuit 13; The signal output part of described sample circuit 13 is connected with the signal input part of host computer 14.

The difference of the implement device of the sparse signal lack sampling method based on compressed sensing described in embodiment three, this embodiment and embodiment two is, the model of FPGA15 is EP2C8Q208.

The difference of the implement device of the sparse signal lack sampling method based on compressed sensing described in embodiment four, this embodiment and embodiment two is, multiplier 11 adopt model be AD633 chip realize.

The difference of the implement device of the sparse signal lack sampling method based on compressed sensing described in embodiment five, this embodiment and embodiment two is, low pass filter 12 is adopt model to be the second order Butterworth simulation low-pass filter that the chip of MAX275 is built.

Operation principle: preparation:

Preparation before system cloud gray model is the m sequential value under acquisition a certain group of initial value.Operating procedure is as follows:

1, set one group of initial value to m sequencer, and remain unchanged, each like this when regenerating m sequence all by same rule, ensure that the sequence of each generation is all the same.

2, the data input pin of uniform sampling module is connected to the m sequence output of FPGA, sampling module is set to trigger sampling configuration, and trigger control end is connected to the triggering signal output of FPGA.The sample rate of data acquisition module is set to identical with the jump frequency of m sequence (i.e. the clock frequency of m sequencer), and such as, the clock of m sequence is 10kHz, then sample rate is also set to 10kHz.

3, make control trigger module produce triggering signal, make m block produce m sequence, triggering signal is detected by data acquisition module simultaneously, starts to sample to m sequence.M sequential value complete under obtaining this group initial value after sampling certain hour, is saved in a file for subsequent use.

Actual moving process:

1, set one group of initial value identical with during preparation to m sequencer, and remain unchanged.

2, measured signal is connected to the input of system, i.e. another input of multiplier.

3, the data input pin of uniform sampling module is connected to the output of filter.Sampling module is set to trigger sampling configuration, and trigger control end is still connected to the triggering signal output of FPGA.As long as sample rate arrange than the value calculated by formula (3) greatly.Such as, the degree of rarefication of measured signal is 2, and signal highest frequency component is 4kHz, then calculating sample rate need be greater than 6.6c.Wherein c is a constant, relevant with the error size of real system itself, accuracy, operational environment etc., needs experiment to determine.Generally, the larger quality reconstruction of sample rate is better.

4, control trigger module and produce triggering signal, make m block produce m sequence, triggering signal is detected by data acquisition module simultaneously, starts to sample to filtered signal.Sampled data is transferred in host computer and stores.

5, data collecting module collected to data be measured signal and m sequence through multiplier mixing, the result after low pass filter filtering and conditioning.Because sampling rate is known, by calculating the length can learning the m sequence participating in systemic effect in this period of sampling time, take out corresponding length from the m sequential file kept one section.Such as, sampling rate is 2kHz, intercepts the sampled data of 0 ~ 0.1s, 200 data points namely started.If the jump frequency of m sequence is 10kHz, then the data volume that 0 ~ 0.1s is corresponding is 1000,1000 data intercepting from the m sequential file kept before.In host computer, call the signal reconstruction algorithm finished, utilize the sampled data of intercepting and m sequential value to be reconstructed signal, obtain the frequency position of original signal and corresponding amplitude.If necessary, then reconstruct data are out become analog signal through D/A.

The each module of system describes in detail:

FPGA module, for generation of pseudo random sequence, controls the generation triggering sampled signal simultaneously.

What the present invention adopted when embody rule is this pseudo random sequence of m sequence, utilizes this FPGA of the CycloneII of altera corp series EP2C8Q208 to produce.M sequence is the abbreviation of longest linear feedback shift register sequence, is the sequence produced by the shift register of band linear feedback, and has the longest cycle, and having easy generation, regular many excellent characteristics such as strong, is a kind of important pseudo random sequence.

Also achieve the control logic triggering sampled signal in FPGA, for synchronously producing triggering sampled signal, controlling Back end data acquisition module and end output signal is sampled.

Fig. 2 is 10 grades of m sequencers and triggering signal control logic schematic diagram of realizing in FPGA.

The initial amplitude range of m sequence is 0 ~ 3.3V, in order to produce negative amplitude, adjusts with subtracter, subtraction circuit as shown in Figure 3, make it become-1.6 ~+1.7V from 0 original ~ 3.3V, also significantly reduce simultaneously m sequence at first with larger burr, improve quality.

Multiplier: m sequence is multiplied in analog multiplier with frequency-domain sparse signal after conditioning, realizes mixing.Signal, in time domain multiplication, is the convolution of frequency spectrum at frequency domain representation.Because the spectral range of m sequence is very wide, just frequency-domain sparse signal is modulated by convolution, achieve spread spectrum, the frequency spectrum of original signal is applied to whole frequency axis, the all information of each position containing original signal on frequency spectrum, and, due to the participation of m sequence, be equivalent to carry out signal scrambling to original signal, on frequency spectrum, the information at every bit place is provided with unique mark.

What the present invention adopted when embody rule is AD633 analog multiplier chip, and circuit as shown in Figure 5.AD633 is inner have the signal after being multiplied 1/10 decay, the too little meeting of signal amplitude makes troubles to analyzing and processing below, in order to make up this decay, amplifies the output signal of multiplier.Discharge circuit can use fixed gain amplifier to design, all identical will ensure the signal component gain of different frequency.

Low pass filter: as far as possible the key of this part makes the characteristic of practical filter conform to the transfer function of theory calculate.

Adopt active low-pass filter during specific implementation of the present invention, active filter can adopt amplifier to build, and also can use integrated filter chip to design.Index is better, the more accurate filter of parameter to adopt integrated filter chip generally can obtain, and peripheral circuit is simple, design is convenient, has selected MAX275 active filter chip to build second order Butterworth simulation low-pass filter within the system, as shown in Figure 5.

Sample circuit: for carrying out low speed sampling to filtered signal and storing.

The key of this part ensures that sampling start time and m sequence arrive the timing synchronization of sampling module through system, and the initial time of namely sampling is suitable.Sampling trigger signal is produced by FPGA, inputs to sampling module, and only receive after triggering sampled signal, sampling module just starts to carry out data acquisition and storage.

Host computer 14: signal reconstruction needs first to carry out modeling to observation process, tries to achieve the transfer function of modules, thus tries to achieve corresponding observing matrix Φ, then tries to achieve perception matrix Θ.The data that recycling Θ and low speed uniform sampling obtain recover original signal by signal reconstruction algorithm.

Concrete steps are:

1, the mode by calculating derivation or actual samples obtains the data in one period of sampling time and participates in the m sequence p of systemic effect _c(n); Because sampling rate is known, by calculating the length can learning the m sequence participating in systemic effect in this period of sampling time, take out corresponding length from the m sequential file kept one section.Such as, sampling rate is 2kHz, intercepts the sampled data of 0 ~ 0.1s, 200 data points namely started.If the jump frequency of m sequence is 10kHz, then the data volume that 0 ~ 0.1s is corresponding is 1000,1000 data intercepting from the m sequential file kept before.

2, ask frequency mixing module after the transfer function of modulate circuits at different levels.

There is amplification conditioning module after frequency mixing module, filter module, calculate the transfer function G of these modules ₁(s), G ₂(s) Then, ask the overall transfer function G (s) of these conditioning module, G (s) is the continued product of transfer function at different levels:

G(s)＝G ₁(s)G ₂(s)…(4)

If these amplify conditioning module is all that fixed gain is amplified, then the G (s) tried to achieve is constant.

3, the transfer function of simulation low-pass filter is asked.

The transfer function of second order Butterworth analog filter is:

$H_1\left(s\right)=\frac{w_c^2}{s^2+\frac{w_c}{Q}s+w_c^2}---\left(5\right)$

Wherein w _cbe the cut-off frequency of filter, Q is quality factor.

4, ask frequency mixing module after to the transfer function H (s) between sampling module, namely amplify the overall transfer function of conditioning link and low-pass filtering link, and obtain corresponding unit-sample response h (n).

The overall transfer function of amplifying conditioning link and low-pass filtering link is:

H(s)＝H ₁(s)G(s)(6)

In matlab, pass through c2d () function Bilinear transformation method by H (s) discretization, be transformed to the transfer function H (z) of digital filter, the jump frequency of the desirable m sequence of discrete frequency.Recycling impz () function tries to achieve impulse response h (n) of digital filter.

5, observing matrix Φ is asked, orthogonal dictionary matrix Ψ and perception matrix Θ

Observing matrix Φ is by pseudo random sequence p _cn () and unit-sample response h (n) convolution and obtain, because signal is at frequency-domain sparse, therefore orthogonal dictionary matrix Ψ is Fourier transform matrix.

Ask the flow process of perception matrix Θ as follows:

Step 1: input unit-sample response h (n);

Step 2: to h (n) upset, be that inverted order is carried out to h (n) here, try to achieve h _r(n), that is: h (1)=h _r(N) ..., h (N)=h _r(1).

Step 3: use pseudo random sequence p _c(n) and h (n) convolution, i.e. p _c(n) and h _rn () is shifted successively, be multiplied, sue for peace, and tries to achieve the Φ of M × N.The size of each displacement is T _s=N/M, N are the length of original signal, also equal pseudo random sequence p _cthe length of (n), the data amount check adopted when M is and samples to filtered signal low speed with downsample function.

forj＝1:M

Ifj × T _sthe length of≤h (n)

The jth row of Φ, the 1st row are classified as to jth × T:

Φ(j,1:j×T _s)＝p _c(1:j×T _s).×h _r((n-j×T _s+1):n)(7)

else

The jth row of Φ, jth × T _s-n+1 row are to jth × T _sbe classified as:

Φ(j,(j×T _s-n+1):(j×T _s))＝p _c((j×T _s-n+1):j×T _s).×h _r(1:n)(8)

end

end

Step 4: ask orthogonal basis matrix Ψ.The function dftmtx that Calling MATLAB carries can in the hope of Fourier transform matrix Ψ: the Ψ=dftmtx of N × N (N);

Step 5: ask perception matrix Θ.According to Θ=Φ Ψ, the observing matrix Φ tried to achieve is multiplied with Fourier transform matrix Ψ, obtains the perception matrix Θ of M × N.

6, with OMP signal reconstruction algorithm reconstruct original signal: compressive sensing theory has multi-signal restructing algorithm, and the step of orthogonal matching pursuit (OrthogonalMatchingPursuit, OMP) algorithm is as follows:

Step 1: set algorithm inputs, perception matrix Θ, observation signal y, degree of rarefication K.

Step 2: each parameter of initialization, reconstruction signal residual error r ₀=y, signal support set

Step 3: iteration, the l time circulation (l >=1), runs following (a) ~ (d) step.

A () utilizes correlation computations to find signal and supports index:

λ _l＝argmax _j＝1,…,N|<r _l-1,θ _j>|(9)

B the signal searched out is supported index and adds signal support set by ():

Λ _l＝Λ _l-1∪{λ _l}(10)

C () upgrades residual error:

$r_l=y-{\mathrm{\&theta;}}_{{\mathrm{\&Lambda;}}_l}\left({\mathrm{\&theta;}}_{{\mathrm{\&Lambda;}}_l}^{+}y\right)---\left(11\right)$

D if, () l >=K, algorithm terminates.

Step 4: export reconstruction signal

$\hat{x}={\mathrm{\&theta;}}_{{\mathrm{\&Lambda;}}_l}^{+}y,{\hat{x}}_{\{1,\mathrm{...},N\}-{\mathrm{\&Lambda;}}_l}=0---\left(12\right)$

Below adopt concrete Simulation experiments validate effect of the present invention:

FPGA produces the m sequence that jump frequency is 10kHz, and producing degree of rarefication with signal generator is the test signal of 2, and frequency component is 3kHz and 4kHz.After mixing, low-pass filtering, sampling and signal reconstruction, original signal signal contains 3kHz and 4kHz two frequency bins, and as shown in Figure 6, frequency spectrum as shown in Figure 7 for the waveform that data point line is formed; Shown in.As shown in Figure 8, reconstruction signal frequency spectrum as shown in Figure 9 for reconstruction signal data point line waveform.

From above-mentioned emulation experiment:

1, the present invention utilizes the characteristic that frequency-domain sparse signal spectrum is sparse, under the prerequisite ensureing signal recuperation effect, reduce the sample rate of frequency-domain sparse signal, when contained by signal, the maximum of frequency component is larger, this effect is more obvious, and actual sample rate can be made to be Qwest's frequency much smaller than signal.

2, can reduce the requirement of the speed to AD device, sampled data output is little, saves memory space, reduces costs, be conducive to the transmission of data simultaneously.

Claims (1)

1., based on the sparse signal lack sampling method of compressed sensing, it is realized by following steps:

Step one, employing are embedded in m sequencer in FPGA and produce m sequence; And adopt FPGA synchronously to produce triggering signal;

Step 2, m sequence step one produced adopt signal conditioning circuit to carry out signal condition, obtain the m sequence after conditioning;

After step 3, the conditioning that step 2 obtained, m sequence and tested sparse signal adopt multiplier to carry out mixing, acquisition mixed frequency signal;

Step 4, employing low pass filter carry out low-pass filtering to the mixed frequency signal that step 3 obtains, signal after acquisition low-pass filtering;

Step 5, adopt in step one and produce triggering signal and trigger sample circuit, and after the low-pass filtering adopting sample circuit to obtain step 4, signal is sampled, acquisition sampled result;

Step 6, employing host computer carry out signal reconstruction to the sampled result that step 5 obtains, and obtain the reconstruction result of original tested sparse signal;

It is characterized in that, the employing host computer described in step 6 to the concrete grammar that the sampled result that step 5 obtains carries out signal reconstruction is:

Steps A, according to formula:

H(s)＝H ₁(s)G(s)

Obtain the transfer function H (s) be mixed between sampling;

In formula: H ₁s transfer function that () is low pass filter, described low pass filter is second order Butterworth simulation low-pass filter;

G (s) is for being mixed to the continued product of operational amplification circuit transfer function at different levels between sampling;

H ₁s () is according to formula:

$H_1\left(s\right)=\frac{w_c^2}{s^2+\frac{w_c}{Q}s+w_c^2}$

Obtain;

In formula: w _cbe the cut-off frequency of low pass filter, Q is quality factor; S is-symbol variable;

G (s) is according to formula:

G(s)＝G ₁(s)G ₂(s)…G _n(s)

Obtain;

In formula: G ₁s () is first operational amplification circuit transfer function; G ₂s () is the transfer function of second operational amplification circuit; G _ns () is the transfer function of the n-th operational amplification circuit; N is positive integer;

Step B, employing Bilinear transformation method carry out sliding-model control to the transfer function H (s) be mixed between sampling that steps A obtains, obtain digital filter transfer function H (z), and try to achieve impulse response h (n) of digital filter transfer function H (z);

Step C, impulse response h (n) of the digital filter transfer function H (z) in step B to be overturn, obtain upset result h _r(n);

Step D, by the m sequence p in step one _cn upset result h that () and step C obtain _rn () does convolution algorithm, obtain observing matrix Φ;

Step e, according to formula:

Θ＝ΦΨ

Obtain perception matrix Θ;

In formula: Ψ is orthogonal basis matrix, and described Ψ is according to formula:

Ψ＝dftmtx(N)

Obtain; Described dftmtx be MATLAB software from tape function;

Step F, according to step e obtain perception matrix Θ realize signal reconstruction by orthogonal matching pursuit algorithm.