CN103178797A - Combined power amplifier - Google Patents
Combined power amplifier Download PDFInfo
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- CN103178797A CN103178797A CN2013100850514A CN201310085051A CN103178797A CN 103178797 A CN103178797 A CN 103178797A CN 2013100850514 A CN2013100850514 A CN 2013100850514A CN 201310085051 A CN201310085051 A CN 201310085051A CN 103178797 A CN103178797 A CN 103178797A
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- electric capacity
- power amplifier
- resistance
- potentiometer
- inductance
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Abstract
The invention discloses a combined power amplifier. The combined power amplifier comprises a primary power amplifier and a secondary power amplifier. The input end of the primary power amplifier is connected with the signal output end of a virtual signal generator. The output end of the primary power amplifier is connected with the input end of the secondary power amplifier. The combined power amplifier is characterized in that the primary power amplifier comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first inductor, a second inductor, a first resistor, a second resistor, a third resistor, a first potentiometer, a second potentiometer and a first transistor. Due to the fact that the combined power amplifier is composed of the primary power amplifier and the secondary power amplifier, gain of the power amplifier is enabled to be relatively stable in a wide passing band. An output signal of the primary power amplifier is used as an input signal of the secondary power amplifier, and the secondary power amplifier is used as a final-stage power amplifier of a transmitter to obtain large output power and high efficiency.
Description
Technical field
The present invention relates to a kind of power amplifier, particularly relate to a kind of combined power amplifier.
Background technology
Power amplifier namely with volume and the power level that requires regenerate on the sounding output element truly, the input audio signal of efficient and low distortion.Audio frequency amplifier is divided into D class A amplifier A, linear amplifier, class-a amplifier, class-b amplifier and the large class of class ab ammplifier five substantially, compare with the design of D class A amplifier A, even the most effective linear output stage of class-a amplifier, class-b amplifier and class ab ammplifier, their output stage power consumption is also very large.This difference makes the D class A amplifier A have significant advantage in many application, and is less because low-power consumption produces heat, saves printing board PCB area and cost, and can extend the battery life of portable system.Yet in the situation that some also exists the acquisition power output can not satisfy client's needs to the higher D class A amplifier A that uses separately of demanded power output.
Summary of the invention
The objective of the invention is to provide in order to address the above problem a kind of combined power amplifier of simple in structure, power output gain stabilization.
The present invention is achieved by the following technical solutions:
a kind of combined power amplifier, comprise prime power amplifier and time stage power amplifier, the input of described prime power amplifier is connected with the signal output part of virtual signal generator, the output of described prime power amplifier is connected with the input of described stage power amplifier, described prime power amplifier comprises the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the first inductance, the second inductance, the first resistance, the second resistance, the 3rd resistance, the first potentiometer, the second potentiometer and the first transistor, the first end of described the first electric capacity is connected with the output of described virtual signal generator, the second end of described the first electric capacity is connected with the base stage of described the first transistor, the first end of described the first potentiometer is connected with the first end of described the first resistance, the second end of described the first resistance respectively with the first end of described the first inductance be connected the first end of the second electric capacity and be connected, the second end of described the first inductance respectively with the collector electrode of described the first transistor, the second end of the second electric capacity be connected the first end of the 3rd electric capacity and connect, the emitter of described the first transistor respectively with the first end of described the second resistance be connected the first end of the 5th electric capacity and be connected, the second end of described the 5th electric capacity respectively with the sliding end of described the first potentiometer, the first end of the first potentiometer, the first end of the second potentiometer connects, the second end of described the second resistance respectively with the second end of described the second potentiometer be connected the sliding end of potentiometer and be connected, the first end of described the 3rd electric capacity respectively with the first end of described the second inductance be connected the input of time stage power amplifier and be connected, the second end of described the second inductance respectively with the first end of described the 3rd resistance be connected the first end of the 4th electric capacity and be connected, the second end of described the 3rd resistance be connected the second end of the 4th electric capacity connect after ground connection.
further, described time stage power amplifier comprises transistor seconds, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 6th electric capacity, the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the tenth electric capacity, the 11 electric capacity, the 12 electric capacity and the 3rd potentiometer, the base stage of described transistor seconds respectively with the second end of described the 3rd electric capacity be connected the first end of the second inductance and be connected, the collector electrode of described transistor seconds respectively with the first end of described the 6th electric capacity, the first end of the 7th electric capacity be connected the first end of the 3rd inductance and connect, the second end of described the 6th electric capacity respectively with the first end of described the 7th electric capacity, the second end of the 3rd inductance, the first end of the 8th electric capacity be connected the first end of the 4th inductance and connect, the second end of described the 4th inductance respectively with power supply be connected the first end of the 9th electric capacity and be connected, the second end of described the 8th electric capacity be connected the second end of the 9th electric capacity connect after ground connection, the first end of described the 3rd inductance respectively with the first end of described the tenth electric capacity, the first end of the 11 electric capacity be connected the first end of the 12 electric capacity and connect, the second end of described the tenth electric capacity is connected with the first end of described the 5th resistance, the second end of described the 5th resistance respectively with the first end of described the 6th resistance be connected the first end of the 7th resistance be connected after ground connection, the second end of described the 6th resistance is connected with the second end of described the 11 electric capacity, the second end of described the 7th resistance is connected with the second end of described the 12 electric capacity, the emitter of described transistor seconds is connected with the first end of described the 4th resistance, the second end of described the 4th resistance respectively with the first end of described the 3rd potentiometer be connected the sliding end of the 3rd potentiometer and be connected, the second end ground connection of described the 3rd potentiometer.
The invention has the beneficial effects as follows:
The present invention is comprised of prime power amplifier and time stage power amplifier, can make the power amplifier gain relatively stable in wider passband, the output signal of prime power amplifier is as the input signal of time stage power amplifier, inferior stage power amplifier as the last stage of transmitter power amplifier to obtain larger power output and higher efficient.
Description of drawings
Fig. 1 is circuit diagram of the present invention.
Embodiment
The present invention is described in further detail below in conjunction with drawings and the specific embodiments:
as shown in Figure 1, the combined power amplifier of the present invention, comprise prime power amplifier and time stage power amplifier, the input of described prime power amplifier is connected with the signal output part of virtual signal generator, the output of described prime power amplifier is connected with the input of described stage power amplifier, described prime power amplifier comprises the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4, the 5th capacitor C 5, the first inductance L 1, the second inductance L 2, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first potentiometer RP1, the second potentiometer RP2 and the first transistor VT1, the first end of described the first capacitor C 1 is connected with the output of described virtual signal generator, the second end of described the first capacitor C 1 is connected with the base stage of described the first transistor VT1, the first end of described the first potentiometer RP1 is connected with the first end of described the first resistance R 1, the second end of described the first resistance R 1 respectively with the first end of described the first inductance L 1 be connected the first end of the second capacitor C 2 and be connected, the second end of described the first inductance L 1 respectively with the collector electrode of described the first transistor VT1, the second end of the second capacitor C 2 be connected the first end of the 3rd capacitor C 3 and connect, the emitter of described the first transistor VT1 respectively with the first end of described the second resistance R 2 be connected the first end of the 5th capacitor C 5 and be connected, the second end of described the 5th capacitor C 5 respectively with the sliding end of described the first potentiometer RP1, the first end of the first potentiometer RP1, the first end of the second potentiometer RP2 connects, the second end of described the second resistance R 2 respectively with the second end of described the second potentiometer RP2 be connected the sliding end of potentiometer RP2 and be connected, the first end of described the 3rd capacitor C 3 respectively with the first end of described the second inductance L 2 be connected the input of time stage power amplifier and be connected, the second end of described the second inductance L 2 respectively with the first end of described the 3rd resistance R 3 be connected the first end of the 4th capacitor C 4 and be connected, the second end of described the 3rd resistance R 3 be connected the second end of the 4th capacitor C 4 connect after ground connection.
described time stage power amplifier comprises transistor seconds VT2, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12 and the 3rd potentiometer RP3, the base stage of described transistor seconds VT2 respectively with the second end of described the 3rd capacitor C 3 be connected the first end of the second inductance L 2 and be connected, the collector electrode of described transistor seconds VT2 respectively with the first end of described the 6th capacitor C 6, the first end of the 7th capacitor C 7 be connected the first end of the 3rd inductance L 3 and connect, the second end of described the 6th capacitor C 6 respectively with the first end of described the 7th capacitor C 7, the second end of the 3rd inductance L 3, the first end of the 8th capacitor C 8 be connected the first end of the 4th inductance L 4 and connect, the second end of described the 4th inductance L 4 respectively with power supply be connected the first end of the 9th capacitor C 9 and be connected, the second end of described the 8th capacitor C 8 be connected the second end of the 9th capacitor C 9 connect after ground connection, the first end of described the 3rd inductance L 3 respectively with the first end of described the tenth capacitor C 10, the first end of the 11 capacitor C 11 be connected the first end of the 12 capacitor C 12 and connect, the second end of described the tenth capacitor C 10 is connected with the first end of described the 5th resistance R 5, the second end of described the 5th resistance R 5 respectively with the first end of described the 6th resistance R 6 be connected the first end of the 7th resistance R 7 be connected after ground connection, the second end of described the 6th resistance R 6 is connected with the second end of described the 11 capacitor C 11, the second end of described the 7th resistance R 7 is connected with the second end of described the 12 capacitor C 12, the emitter of described transistor seconds VT2 is connected with the first end of described the 4th resistance R 4, the second end of described the 4th resistance R 4 respectively with the first end of described the 3rd potentiometer RP3 be connected the sliding end of the 3rd potentiometer RP3 and be connected, the second end ground connection of described the 3rd potentiometer RP3.
Claims (2)
1. combined power amplifier, comprise prime power amplifier and time stage power amplifier, the input of described prime power amplifier is connected with the signal output part of virtual signal generator, the output of described prime power amplifier is connected with the input of described stage power amplifier, it is characterized in that: described prime power amplifier comprises the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the first inductance, the second inductance, the first resistance, the second resistance, the 3rd resistance, the first potentiometer, the second potentiometer and the first transistor, the first end of described the first electric capacity is connected with the output of described virtual signal generator, the second end of described the first electric capacity is connected with the base stage of described the first transistor, the first end of described the first potentiometer is connected with the first end of described the first resistance, the second end of described the first resistance respectively with the first end of described the first inductance be connected the first end of the second electric capacity and be connected, the second end of described the first inductance respectively with the collector electrode of described the first transistor, the second end of the second electric capacity be connected the first end of the 3rd electric capacity and connect, the emitter of described the first transistor respectively with the first end of described the second resistance be connected the first end of the 5th electric capacity and be connected, the second end of described the 5th electric capacity respectively with the sliding end of described the first potentiometer, the first end of the first potentiometer, the first end of the second potentiometer connects, the second end of described the second resistance respectively with the second end of described the second potentiometer be connected the sliding end of potentiometer and be connected, the first end of described the 3rd electric capacity respectively with the first end of described the second inductance be connected the input of time stage power amplifier and be connected, the second end of described the second inductance respectively with the first end of described the 3rd resistance be connected the first end of the 4th electric capacity and be connected, the second end of described the 3rd resistance be connected the second end of the 4th electric capacity connect after ground connection.
2. a kind of combined power amplifier according to claim 1, it is characterized in that: described time stage power amplifier comprises transistor seconds, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 6th electric capacity, the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the tenth electric capacity, the 11 electric capacity, the 12 electric capacity and the 3rd potentiometer, the base stage of described transistor seconds respectively with the second end of described the 3rd electric capacity be connected the first end of the second inductance and be connected, the collector electrode of described transistor seconds respectively with the first end of described the 6th electric capacity, the first end of the 7th electric capacity be connected the first end of the 3rd inductance and connect, the second end of described the 6th electric capacity respectively with the first end of described the 7th electric capacity, the second end of the 3rd inductance, the first end of the 8th electric capacity be connected the first end of the 4th inductance and connect, the second end of described the 4th inductance respectively with power supply be connected the first end of the 9th electric capacity and be connected, the second end of described the 8th electric capacity be connected the second end of the 9th electric capacity connect after ground connection, the first end of described the 3rd inductance respectively with the first end of described the tenth electric capacity, the first end of the 11 electric capacity be connected the first end of the 12 electric capacity and connect, the second end of described the tenth electric capacity is connected with the first end of described the 5th resistance, the second end of described the 5th resistance respectively with the first end of described the 6th resistance be connected the first end of the 7th resistance be connected after ground connection, the second end of described the 6th resistance is connected with the second end of described the 11 electric capacity, the second end of described the 7th resistance is connected with the second end of described the 12 electric capacity, the emitter of described transistor seconds is connected with the first end of described the 4th resistance, the second end of described the 4th resistance respectively with the first end of described the 3rd potentiometer be connected the sliding end of the 3rd potentiometer and be connected, the second end ground connection of described the 3rd potentiometer.
Priority Applications (1)
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CN2013100850514A CN103178797A (en) | 2013-03-18 | 2013-03-18 | Combined power amplifier |
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CN2013100850514A CN103178797A (en) | 2013-03-18 | 2013-03-18 | Combined power amplifier |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1886892A (en) * | 2003-12-10 | 2006-12-27 | 索尼株式会社 | Amplifier and communication apparatus |
CN203180853U (en) * | 2013-03-18 | 2013-09-04 | 成都龙腾中远信息技术有限公司 | Combination type power amplifier |
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2013
- 2013-03-18 CN CN2013100850514A patent/CN103178797A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1886892A (en) * | 2003-12-10 | 2006-12-27 | 索尼株式会社 | Amplifier and communication apparatus |
CN203180853U (en) * | 2013-03-18 | 2013-09-04 | 成都龙腾中远信息技术有限公司 | Combination type power amplifier |
Non-Patent Citations (1)
Title |
---|
王学辉: "《百度文库》", 13 August 2012 * |
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Application publication date: 20130626 |