CN103178709A - Charge pump circuit and timing control method thereof - Google Patents
Charge pump circuit and timing control method thereof Download PDFInfo
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- CN103178709A CN103178709A CN2013100609570A CN201310060957A CN103178709A CN 103178709 A CN103178709 A CN 103178709A CN 2013100609570 A CN2013100609570 A CN 2013100609570A CN 201310060957 A CN201310060957 A CN 201310060957A CN 103178709 A CN103178709 A CN 103178709A
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Abstract
The invention relates to a charge pump circuit and a timing control method thereof. The charge pump circuit comprises a first pumping capacitor, a second pumping capacitor, a power port (Vcc), a ground port (GND), an output port (Vout) and a plurality of timing switches. The power port and the output port are respectively parallelly connected to a first end of the first pumping capacitor through the timing switches and are respectively parallelly connected to a second end of the first pumping capacitor through the timing switches. The power port and the output port are respectively parallelly connected to a first end of the second pumping capacitor through the timing switches and are respectively parallelly connected to a second end of the second pumping capacitor through the timing switches. The first end of the first pumping capacitor is electrically serially connected with the first end of the second pumping capacitor through one timing switch. The two pumping capacitors are used for alternating output, a charge recycling mechanism is adopted, and accordingly circuit energy consumption and output ripples are reduced.
Description
Technical field
The present invention relates to a kind of charge pump circuit, particularly a kind of charge pump circuit and sequential control method thereof.
Background technology
Charge pump circuit is a kind of DC-DC circuit, can produce the output voltage higher than input supply voltage, as the operating voltage of other circuit module.Charge pump circuit is widely used in the fields such as non-volatility memorizer and TFT LCD driving at present, and the ripple size of its output voltage and the energy efficiency of circuit become the important indicator of weighing the charge pump performance.Three present multiplication of voltage charge pump circuits usually use two and fly electric capacity (flying capacitor) and the non-overlapping clock signal of two-phase, utilize the series connection of two electric capacity to realize the output of three times of supply voltages, as shown in Figure 1.But there are some problems in sort circuit, need to use switch with two capacitances in series during three times of supply voltages of this circuit evolving, the energy loss that this will increase charge pump circuit when externally exporting.In addition, this circuit only generates the output voltage of three times of supply voltages at output phase, and output voltage can only rely on load capacitance to keep under its charging phase place, and this will cause output voltage to produce larger ripple.
Summary of the invention
In view of the problems referred to above of prior art, the charge pump circuit that the purpose of this invention is to provide a kind of low energy consumption and optimize output ripple.For reaching above-mentioned purpose the present invention, a kind of charge pump circuit and control method thereof are proposed.
A kind of charge pump that the present invention proposes comprises: the first pumping electric capacity, the second pumping electric capacity, power port (Vcc), grounding ports (GND), output port (Vout), a plurality of sequence switch; Described power port and described output port are parallel to respectively the first end of described the first pumping electric capacity by sequence switch, described power port and described grounding ports are parallel to respectively the second end of described the first pumping electric capacity by sequence switch; Described power port and described output port are parallel to respectively the first end of described the second pumping electric capacity by sequence switch, described power port and described grounding ports are parallel to respectively the second end of described the second pumping electric capacity by sequence switch; The first end of described the first pumping electric capacity is electrically connected by sequence switch with the first end of the second pumping electric capacity.
Preferably, described sequence switch comprises:
The first sequence switch, comprise control end, first end and the second end, the control end of described the first sequence switch receives the 3rd clock signal, the first end of described the first sequence switch is electrically connected to the first end of described the first pumping electric capacity, and the second end of described the first sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The second sequence switch, comprise control end, first end and the second end, the control end of described the second sequence switch receives the first clock signal, the first end of described the second sequence switch is electrically connected to described power port, and the second end of described the second sequence switch is electrically connected to the first end of described the first pumping electric capacity;
The 3rd sequence switch, comprise control end, first end and the second end, the control end of described the 3rd sequence switch receives the 6th clock signal, the first end of described the 3rd sequence switch is electrically connected to described grounding ports, and the second end of described the 3rd sequence switch is electrically connected to the second end of described the first pumping electric capacity;
The 4th sequence switch, comprise control end, first end and the second end, the control end of described the 4th sequence switch receives the second clock signal, the first end of described the 4th sequence switch is electrically connected to described power port, and the second end of described the 4th sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The 5th sequence switch, comprise control end, first end and the second end, the control end of described the 5th sequence switch receives the 7th clock signal, the first end of described the 5th sequence switch is electrically connected to described grounding ports, and the second end of described the 5th sequence switch is electrically connected to the second end of described the second pumping electric capacity;
The 6th sequence switch, comprise control end, first end and the second end, the control end of described the 6th sequence switch receives the second clock signal, the first end of described the 6th sequence switch is electrically connected to described output port, and the second end of described the 6th sequence switch is electrically connected to the first end of described the first pumping electric capacity;
The 7th sequence switch, comprise control end, first end and the second end, the control end of described the 7th sequence switch receives the 5th clock signal, the first end of described the 7th sequence switch is electrically connected to described power port, and the second end of described the 7th sequence switch is electrically connected to the second end of described the first pumping electric capacity;
The 8th sequence switch, comprise control end, first end and the second end, the control end of described the 8th sequence switch receives the first clock signal, the first end of described the 8th sequence switch is electrically connected to described output port, and the second end of described the 8th sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The 9th sequence switch, comprise control end, first end and the second end, the control end of described the 9th sequence switch receives the 4th clock signal, the first end of described the 9th sequence switch is electrically connected to described power port, and the second end of described the 9th sequence switch is electrically connected to the second end of described the second pumping electric capacity.。
Preferably, described the first clock signal and described the second clock signal are first group of non-overlapping clock signal of two-phase; Described the 4th clock signal and described the 5th clock signal are second group of non-overlapping clock signal of two-phase; Described the 6th clock signal and described the 7th clock signal are the 3rd group of non-overlapping clock signal of two-phase; Described the 3rd clock signal and first group of non-overlapping clock signal of two-phase are non-overlapping.
Preferably, two trailing edges of described second group of non-overlapping clock signal of two-phase are synchronizeed with two trailing edges of described first group of non-overlapping clock signal of two-phase respectively, two rising edges are respectively with respect to two rise edge delay regular hours of described first group of non-overlapping clock signal of two-phase, be included with the effective phase place with described the 3rd clock signal, be no more than the non-overlapping time of described first group of non-overlapping clock signal of two-phase described time of delay.
Preferably, described the 3rd group of inversion signal that the non-overlapping clock signal of two-phase is respectively described second group of non-overlapping clock signal of two-phase.
Preferably, described the first pumping electric capacity is identical with described the second pumping electric capacity.
Preferably, described power port (Vcc), described grounding ports (GND) are respectively one or more with described output port (Vout).
Preferably, described the first sequence switch is single PMOS pipe or single NMOS pipe or transmission gate; Described the 3rd sequence switch and the 5th sequence switch are the N-type MOS transistor; Described the second sequence switch, the 4th sequence switch, the 6th sequence switch, the 7th sequence switch, the 8th sequence switch and the 9th sequence switch are P type MOS transistor.
the present invention provides a kind of sequential control method of charge pump circuit simultaneously, be used for controlling described charge pump circuit, comprise following process: charge and discharge process, make the first pumping electric capacity as charging capacitor in cycle N sequential, make the second pumping electric capacity as the external output voltage of discharge capacity, make the second pumping electric capacity as charging capacitor in cycle N+1 sequential, make the first pumping electric capacity as the external output voltage of discharge capacity, when the first end discharge of described discharge capacity, the second end that supply voltage is added to described discharge capacity makes the first end of described discharge capacity obtain multiplier electrode, the electric charge removal process, before the discharge capacity in described N sequential cycle is externally exported the external output of rear discharge capacity to described N+1 the sequential cycle, make the second end and the described power port conducting of the discharge capacity in described N sequential cycle, make the second end and the described grounding ports conducting of the charging capacitor in described N sequential cycle, the first end of discharge capacity in described N sequential cycle and the first end of the discharge capacity in described N+1 sequential cycle are electrically conducted, the first end that makes electric charge transfer to the discharge capacity in described N+1 sequential cycle from the first end of the discharge capacity in described N sequential cycle is recycled voltage, the Voltage-output process is externally exported by the discharge capacity in described N+1 sequential cycle after described recovery voltage and the stack of described multiplier electrode.
Preferably, the discharge process of the charging process of described the first pumping electric capacity and described the second pumping electric capacity carries out simultaneously; The charge and discharge process of the discharge process of described the first pumping electric capacity and described the second pumping electric capacity carries out simultaneously.
Preferably, described electric charge removal process is carried out after the discharge process in described N sequential cycle and before the discharge process in described N+1 sequential cycle.
Preferably, described charge and discharge process comprised N sequential cycle: the discharge process of the charging process of the first pumping electric capacity and the second pumping electric capacity, wherein make respectively the second sequence switch, the 3rd sequence switch, the 8th sequence switch, the 9th sequence switch be in conducting state N sequential end cycle prerequisite for the first clock signal, the 4th clock signal and the 6th clock signal that are in simultaneously effective phase place, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition; Described electric charge removal process is the electric charge removal process of the first pumping electric capacity in the cycle N sequential, wherein when described the first clock signal enters invalid phase place, the 3rd clock signal that is in effective phase place is provided, provide simultaneously the 4th clock signal and the 6th clock signal that are in effective phase place to make respectively the first sequence switch, the 9th sequence switch, the 3rd sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition; The discharge process that described Voltage-output process is the second pumping electric capacity in the cycle N sequential; Described charge and discharge process comprised N+1 sequential cycle: the charging process of the discharge process of the first pumping electric capacity and the second pumping electric capacity, wherein when N+1 sequential cycle begins, provide the second clock signal, the 5th clock signal and the 7th clock signal that are in simultaneously effective phase place to make respectively the 6th sequence switch, the 7th sequence switch, the 4th sequence switch and the 5th sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition; Described electric charge removal process is the electric charge removal process of the second pumping electric capacity in the cycle N+1 sequential, wherein when described the second clock signal enters invalid phase place, the 3rd clock signal that enters effective phase place is provided again, provide simultaneously the 5th clock signal and the 7th clock signal that are in effective phase place to make respectively the first sequence switch, the 7th sequence switch, the 5th sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition; The discharge process that described Voltage-output process is the first pumping electric capacity in the cycle N+1 sequential.
Preferably, the charging process of described the first pumping electric capacity is: provide a supply voltage to the first end of described the first pumping electric capacity simultaneously with the second end ground connection of the first pumping electric capacity when the second sequence switch and the 3rd sequence switch conducting; The discharge process of described the first pumping electric capacity is: the external output voltage of first end of described the first pumping electric capacity when the 6th sequence switch and the 7th sequence switch are in conducting provides a supply voltage to make the external output voltage of first end of described the first pumping electric capacity to the second end of described the first pumping electric capacity simultaneously; The electric charge removal process of described the first pumping electric capacity is: the first end that the voltage of tell the second pumping electric capacity first end is recycled to described the first pumping electric capacity when the first sequence switch, the 9th sequence switch and the 3rd sequence switch are in conducting, with the second end ground connection of described the first pumping electric capacity, provide second end of a supply voltage to described the second pumping electric capacity simultaneously; The charging process of described the second pumping electric capacity is: provide a supply voltage to the first end of described the second pumping electric capacity simultaneously with the second end ground connection of the second pumping electric capacity when the 4th sequence switch and the 5th sequence switch conducting; The discharge process of described the second pumping electric capacity is: the external output voltage of first end of described the second pumping electric capacity when the 8th sequence switch and the 9th sequence switch are in conducting provides a supply voltage to make the external output voltage of first end of described the second pumping electric capacity to the second end of described the second pumping electric capacity simultaneously; The electric charge removal process of described the second pumping electric capacity is: at the first sequence switch, the 7th sequence switch, when the 5th sequence switch is in conducting, the voltage of tell the first pumping electric capacity first end is recycled to the first end of described the second pumping electric capacity, with the second end ground connection of described the second pumping electric capacity, provide second end of a supply voltage to described the first pumping electric capacity simultaneously.
Charge pump circuit of the present invention utilizes two charge/discharge units output voltage that hockets, and has effectively reduced the ripple of output voltage.In addition, charge pump circuit of the present invention has utilized the mechanism of electric charge recovery, has effectively reduced the energy consumption of circuit.
Description of drawings
Fig. 1 is three multiplication of voltage charge pump circuit figure of prior art.
Fig. 2 is circuit diagram of the present invention.
Fig. 3 is the circuit diagram of one embodiment of the invention.
Fig. 4 is the sequential chart of sequencing control embodiment of the present invention.
Embodiment
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can be in the situation that do similar popularization without prejudice to intension of the present invention, so the present invention is not subjected to the restriction of following public specific embodiment.
Below, by reference to the accompanying drawings specific embodiments of the invention are described.At first Fig. 2 is circuit diagram of the present invention, a kind of charge pump circuit comprises that two charge/discharge unit U1 and U2 and an electric charge reclaim sequential switch circuit, specifically comprise: the first pumping capacitor C 1, the second pumping capacitor C 2, power port Vcc, grounding ports GND, output port Vout, 9 sequence switch S1-S9.
In circuit shown in Figure 2, the first sequence switch S1 comprises control end, first end and the second end, and described control end receives the 3rd clock signal CLK3, described first end is electrically connected to the first end of the first pumping capacitor C 1, and described the second end is electrically connected to the first end of the second pumping capacitor C 2; The second sequence switch S2, it comprises control end, first end and the second end, and described control end receives the first clock signal CLK1, and described first end is electrically connected to power port Vcc, and described the second end is electrically connected to the first end of the first pumping capacitor C 1; The 3rd sequence switch S3, it comprises control end, first end and the second end, and described control end receives the 6th clock signal CLK1b ', and described first end is electrically connected to grounding ports GND, and described the second end is electrically connected to the second end of the first pumping capacitor C 1; The 6th sequence switch S6, it comprises control end, first end and the second end, and described control end receives the second clock signal CLK2, and described first end is electrically connected to output port Vout, and described the second end is electrically connected to the first end of the first pumping capacitor C 1; The 7th sequence switch S7, it comprises control end, first end and the second end, and described control end receives the 5th clock signal CLK2 ', and described first end is electrically connected to power port Vcc, and described the second end is electrically connected to the second end of the first pumping capacitor C 1; The 4th sequence switch S4, it comprises control end, first end and the second end, and described control end receives the second clock signal CLK2, and described first end is electrically connected to power port Vcc, and described the second end is electrically connected to the first end of the second pumping capacitor C 2; The 5th sequence switch S5, it comprises control end, first end and the second end, and described control end receives the 7th clock signal CLK2b ', and described first end is electrically connected to grounding ports GND, and described the second end is electrically connected to the second end of the second pumping capacitor C 2; The 8th sequence switch S8, it comprises control end, first end and the second end, and described control end receives the first clock signal CLK1, and described first end is electrically connected to output port Vout, and described the second end is electrically connected to the first end of the second pumping capacitor C 2; The 9th sequence switch S9, it comprises control end, first end and the second end, and described control end receives the 4th clock signal CLK1 ', and described first end is electrically connected to power port Vcc, and described the second end is electrically connected to the second end of the second pumping capacitor C 2.
One embodiment of the invention as shown in Figure 3, sequence switch S2, S4, S6, S7, S8, S9 are P-type mos (Metal Oxide Semiconductor, MOS) transistor, sequence switch S1, S3, S5 are N-type metal-oxide semiconductor (MOS) (Metal Oxide Semiconductor, MOS) transistor.
In the present embodiment, the grid of S1 receives clock signal CLK3, and all the other two ends are electrically connected to respectively the first end of the first pumping capacitor C 1 and the second end of the second pumping capacitor C 2; The grid of S2 receives clock signal CLK1, and drain electrode and source electrode are electrically connected to respectively the first end of power port Vcc and the first pumping capacitor C 1; The grid of S3 receives clock signal CLK1b ', and drain electrode and source electrode are electrically connected to respectively the second end of grounding ports GND and the first pumping capacitor C 1; The grid of S6 receives clock signal CLK2, and drain electrode and source electrode are electrically connected to respectively the first end of output port Vout and the first pumping capacitor C 1; The grid of S7 receives clock signal CLK2 ', and drain electrode and source electrode are electrically connected to respectively the second end and the power port Vcc of the first pumping capacitor C 1; The grid of S4 receives clock signal CLK2, and drain electrode and source electrode are electrically connected to respectively the first end of power port Vcc and the second pumping capacitor C 2; The grid of S5 receives clock signal CLK2b ', and drain electrode and source electrode are electrically connected to respectively the second end and the grounding ports GND of the second pumping capacitor C 2; The grid of S8 receives clock signal CLK1, and drain electrode and source electrode are electrically connected to respectively the first end of output port Vout and the second pumping capacitor C 2; The grid of S9 receives clock signal CLK1 ', and drain electrode and source electrode are electrically connected to respectively the second end and the power port Vcc of the second pumping capacitor C 2.
Fig. 4 is a specific embodiment of sequencing control, and as shown in the figure, described the first clock signal CLK1 and described the second clock signal CLK2 are first group of non-overlapping clock signal of two-phase; Described the 4th clock signal CLK1 ' and described the 5th clock signal CLK2 ' are second group of non-overlapping clock signal of two-phase; Described the 6th clock signal CLK1b ' and described the 7th clock signal CLK2b ' are the 3rd group of non-overlapping clock signal of two-phase; Described the 3rd clock signal CLK3 and first group of non-overlapping clock signal of two-phase are non-overlapping.The trailing edge of described second group of non-overlapping clock signal of two-phase is synchronizeed with the non-overlapping clock signal of described first group of two-phase respectively, rising edge is respectively with respect to rise edge delay regular hour of described first group of non-overlapping clock signal of two-phase, be included with the effective phase place with described the 3rd clock signal, be no more than the non-overlapping time of described first group of non-overlapping clock signal of two-phase described time of delay.Described the 3rd group of inversion signal that the non-overlapping clock signal of two-phase is respectively described second group of non-overlapping clock signal of two-phase.
When the sequencing control of Fig. 4 is applied to the circuit of Fig. 2, with the sequential cycle as sequencing control sequential cycle of the 3rd clock signal CLK3.Described charge and discharge process is: N sequential in the cycle the first pumping capacitor C 1 as charging capacitor, simultaneously, the second pumping capacitor C 2 is as the external output voltage of discharge capacity, N+1 sequential in the cycle the second pumping capacitor C 2 as charging capacitor, the first pumping capacitor C 1 is as the external output voltage of discharge capacity simultaneously, when the first end of C1 or C2 discharged, the second end that power source voltage Vcc is added to described discharge capacity made the first end of described discharge capacity obtain multiplier electrode.Described electric charge removal process is: after in the cycle, C2 externally exports N sequential, make the second end and the described power port conducting of C2, make the second end and the described grounding ports conducting of C1, the first end of C2 and the first end of C1 are electrically conducted, and the first end that makes electric charge transfer to C1 from the first end of C2 is recycled voltage; After in cycle, C1 externally exports N+1 sequential, make the second end and the described power port conducting of C1, make the second end and the described grounding ports conducting of C2, the first end of C1 and the first end of C2 are electrically conducted, the first end that makes electric charge transfer to C2 from the first end of C1 is recycled voltage.Described Voltage-output process is: be all with externally output after described recovery voltage and the stack of described multiplier electrode when C1 or C2 externally export.
Sequencing control shown in Figure 4 is applied to when embodiment illustrated in fig. 3, with the sequential cycle as sequencing control sequential cycle of the 3rd clock signal CLK3.Sequencing control for this embodiment comprises following process:
Charge and discharge process N sequential in the cycle is: make respectively S2, S3, S8, S9 be in conducting state N sequential end cycle prerequisite for CLK1, the CLK1 ' and the CLK1b ' that are in simultaneously effective phase place, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition.Provide the first end of VCC to C1 simultaneously with the second end ground connection of C1 when S2 and S3 conducting, this moment, C1 charged; When being in conducting, S8 and S9 provide the second end of Vcc to C2 to generate multiplier electrode at the first end of C2, the first external output voltage of termination Vout of C2 simultaneously, C2 discharge this moment.
The electric charge removal process N sequential in the cycle is: when CLK1 enters invalid phase place, the CLK3 that is in effective phase place is provided, provide simultaneously the CLK1 ' and the CLK1b ' that are in effective phase place to make respectively S1, S9, S3 be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition.With the second end ground connection of C1, provide the second end of Vcc to C2 when S3 and S9 are in conducting, during the S1 conducting, the first end of the first end of C1 and C2 electrically conducts, and this moment the voltage of C2 first end is recycled to the first end of C1.
The discharge process that the Voltage-output process is C2 in the cycle N sequential, the externally output after the first end stack of C2 with described recovery voltage and multiplier electrode.
Charge and discharge process N+1 sequential in the cycle is: when N+1 sequential cycle begins, provide CLK2, the CLK2 ' and the CLK2b ' that are in simultaneously effective phase place to make respectively S6, S7, S4 and S5 be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition.Provide the first end of Vcc to C2 simultaneously with the second end ground connection of C2 when S4 and S5 conducting, this moment, C2 charged; When being in conducting, S6 and S7 provide the second end of Vcc to C1 to generate multiplier electrode at the first end of C2, the first external output voltage of termination Vout of C1 simultaneously, C1 discharge this moment.
The electric charge removal process N+1 sequential in the cycle is: when CLK2 enters invalid phase place, CLK3 enters effective phase place again, provide simultaneously the CLK2 ' and the CLK2b ' that are in effective phase place to make respectively S1, S7, S5 be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition.When S5 and S7 are in conducting, with the second end ground connection of C2, provide the second end of Vcc to C1, S1 is in conducting simultaneously, and the first end of C1 and the first end of C2 are electrically conducted, and at this moment the voltage of C1 first end is recycled to the first end of C2.
The discharge process that the Voltage-output process is C1 in the cycle N+1 sequential, the externally output after the first end stack of C1 with described recovery voltage and multiplier electrode.
Can access the electric charge reclaim mechanism of described charge pump circuit in conjunction with Fig. 3 and Fig. 4, and the charge pump mechanism of boosting.It is the sequential cycle of this circuit with the sequential period definition of clock signal CLK3, please refer to Fig. 3 and Fig. 4, in the CLK1 in N sequential cycle N effective phase place, S2, S3, S8, S9 are in conducting state, the first pumping capacitor C 1 is in charged state, first end voltage is Vcc, and the second terminal voltage is 0; The second pumping capacitor C 2 is in discharge condition, and the first end output voltage is VN, and the second terminal voltage is Vcc.Next enter the non-overlapping time of CLK1 and CLK2, S2, S4, S6, S8 are in off-state, and the first end of the first pumping capacitor C 1 and ground two pumping capacitor C 2 is in vacant state; Simultaneously still be in effective phase place due to CLK1 ' and CLK1b ', S3 and S9 continue conducting, and the second end of the first pumping capacitor C 1 and ground two pumping capacitor C 2 keeps respectively that conducting is connected with power port Vcc with grounding ports GND.Under this state, CLK3 is in effective phase place Cn makes the S1 conducting subsequently, this moment electric charge will be from ground first end (the high level node V of two pumping capacitor C 2
N) be drawn towards the first end (low level node Vcc) of the first pumping capacitor C 1.If ignoring switching loss can draw electric charge and reclaim latter two pumping electric capacity first end voltage V
Cn:
Before conducting: the quantity of electric charge of the second pumping capacitor C 2 is C
2(V
N-Vcc), the quantity of electric charge of C1 is C
1V
CC
After conducting: the first pumping capacitor C
1The quantity of electric charge and the second pumping capacitor C
2Quantity of electric charge sum be C
1V
Cn+ C
2(V
Cn-Vcc);
Because so charge conservation before and after conducting can get following formula:
C
1V
Cn+C
2(V
Cn-Vcc)=C
1V
CC+C
2(V
N-Vcc)
Shift onto and can get:
V
Cn=(C
1Vcc+C
2V
N)/(C
1+C
2)
Preferably, choose in one embodiment two same pump power transmissions and hold and consist of three multiplication of voltage charge pumps, when namely the electric capacity of the first pumping electric capacity and the second pumping electric capacity is identical, can be got by following formula:
V
Cn=（Vcc+V
N）/2 （1）
After the electric charge removal process is completed, again through one non-overlapping period, circuit enters N+1 effective phase place of the CLK2 in N+1 sequential cycle, S4, S5, S6, S7 are in conducting state, the first pumping capacitor C 1 is in discharge condition, the second end of the first pumping capacitor C 1 is communicated with Vcc, and the output voltage of the first end of the first pumping capacitor C 1 is designated as V
N+1:
V
N+1=V
N+Vcc （2）
C2 enters the charging phase place simultaneously, and top crown is communicated with Vcc, and bottom crown is communicated with zero potential.The course of work of circuit is namely repeating said process, and C1 and C2 alternately enter charging and output phase, and carries out electric charge in the non-overlapping time at clock signal and reclaim, and electric charge is led than the top crown of electronegative potential from the top crown that is in high potential.After reaching steady-working state, final circuit should have:
V
N+1︱
N→∞=V
N︱
N→∞ （3）
So with formula (1) (2) substitution (3) Shi Kede
V
Cn+Vcc=V
N=(Vcc+V
N)/2+Vcc （4）
And get final product: V
N=3Vcc
Can draw the final output voltage of circuit according to above analysis is the function that the supply voltage of three times has been realized three multiplication of voltage charge pump circuits.
Preferably, another specific embodiment of the present invention is that electric charge reclaims sequence switch S1 employing transmission gate, and other circuit structure and sequencing control are same as the previously described embodiments.
Adopt same sequence switch at sequence switch S2 described in another specific embodiment of the present invention and sequence switch S8; Described sequence switch S6 and described sequence switch S4 adopt same sequence switch; Described power port (Vcc), described grounding ports (GND) are respectively one with described output port (Vout); Other circuit structure and sequencing control are same as the previously described embodiments.
The above is exemplarily described the present invention by reference to the accompanying drawings; obvious specific implementation of the present invention is not subject to the restrictions described above; as long as the various improvement of having adopted method design of the present invention and technical scheme to carry out; perhaps without improving, design of the present invention and technical scheme are directly applied to other occasion, all within protection scope of the present invention.
Claims (13)
1. a charge pump circuit, is characterized in that, comprising:
The first pumping electric capacity;
The second pumping electric capacity;
Power port (Vcc);
Grounding ports (GND);
Output port (Vout);
A plurality of sequence switches;
Described power port and described output port are parallel to respectively the first end of described the first pumping electric capacity by sequence switch, described power port and described grounding ports are parallel to respectively the second end of described the first pumping electric capacity by sequence switch;
Described power port and described output port are parallel to respectively the first end of described the second pumping electric capacity by sequence switch, described power port and described grounding ports are parallel to respectively the second end of described the second pumping electric capacity by sequence switch;
The first end of described the first pumping electric capacity is electrically connected by sequence switch with the first end of the second pumping electric capacity.
2. charge pump circuit according to claim 1, it is characterized in that: described sequence switch comprises:
The first sequence switch, comprise control end, first end and the second end, the control end of described the first sequence switch receives the 3rd clock signal, the first end of described the first sequence switch is electrically connected to the first end of described the first pumping electric capacity, and the second end of described the first sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The second sequence switch, comprise control end, first end and the second end, the control end of described the second sequence switch receives the first clock signal, the first end of described the second sequence switch is electrically connected to described power port, and the second end of described the second sequence switch is electrically connected to the first end of described the first pumping electric capacity;
The 3rd sequence switch, comprise control end, first end and the second end, the control end of described the 3rd sequence switch receives the 6th clock signal, the first end of described the 3rd sequence switch is electrically connected to described grounding ports, and the second end of described the 3rd sequence switch is electrically connected to the second end of described the first pumping electric capacity;
The 4th sequence switch, comprise control end, first end and the second end, the control end of described the 4th sequence switch receives the second clock signal, the first end of described the 4th sequence switch is electrically connected to described power port, and the second end of described the 4th sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The 5th sequence switch, comprise control end, first end and the second end, the control end of described the 5th sequence switch receives the 7th clock signal, the first end of described the 5th sequence switch is electrically connected to described grounding ports, and the second end of described the 5th sequence switch is electrically connected to the second end of described the second pumping electric capacity;
The 6th sequence switch, comprise control end, first end and the second end, the control end of described the 6th sequence switch receives the second clock signal, the first end of described the 6th sequence switch is electrically connected to described output port, and the second end of described the 6th sequence switch is electrically connected to the first end of described the first pumping electric capacity;
The 7th sequence switch, comprise control end, first end and the second end, the control end of described the 7th sequence switch receives the 5th clock signal, the first end of described the 7th sequence switch is electrically connected to described power port, and the second end of described the 7th sequence switch is electrically connected to the second end of described the first pumping electric capacity;
The 8th sequence switch, comprise control end, first end and the second end, the control end of described the 8th sequence switch receives the first clock signal, the first end of described the 8th sequence switch is electrically connected to described output port, and the second end of described the 8th sequence switch is electrically connected to the first end of described the second pumping electric capacity;
The 9th sequence switch, comprise control end, first end and the second end, the control end of described the 9th sequence switch receives the 4th clock signal, the first end of described the 9th sequence switch is electrically connected to described power port, and the second end of described the 9th sequence switch is electrically connected to the second end of described the second pumping electric capacity.
3. charge pump circuit according to claim 2 is characterized in that:
Described the first clock signal and described the second clock signal are first group of non-overlapping clock signal of two-phase;
Described the 4th clock signal and described the 5th clock signal are second group of non-overlapping clock signal of two-phase;
Described the 6th clock signal and described the 7th clock signal are the 3rd group of non-overlapping clock signal of two-phase;
Described the 3rd clock signal and first group of non-overlapping clock signal of two-phase are non-overlapping.
4. charge pump circuit according to claim 3, it is characterized in that: two trailing edges of described second group of non-overlapping clock signal of two-phase are synchronizeed with two trailing edges of described first group of non-overlapping clock signal of two-phase respectively, two rising edges are respectively with respect to two rise edge delay regular hours of described first group of non-overlapping clock signal of two-phase, be included with the effective phase place with described the 3rd clock signal, be no more than the non-overlapping time of described first group of non-overlapping clock signal of two-phase described time of delay.
5. according to charge pump circuit as claimed in claim 4, it is characterized in that: described the 3rd group of inversion signal that the non-overlapping clock signal of two-phase is respectively described second group of non-overlapping clock signal of two-phase.
6. the described charge pump circuit of according to claim 1 to 5 any one, it is characterized in that: described the first pumping electric capacity is identical with described the second pumping electric capacity.
7. charge pump circuit according to claim 6 is characterized in that: described power port (Vcc), described grounding ports (GND) are respectively one or more with described output port (Vout).
8. charge pump circuit according to claim 7 is characterized in that: described the first sequence switch is single PMOS pipe or single NMOS pipe or transmission gate; Described the 3rd sequence switch and the 5th sequence switch are the N-type MOS transistor; Described the second sequence switch, the 4th sequence switch, the 6th sequence switch, the 7th sequence switch, the 8th sequence switch and the 9th sequence switch are P type MOS transistor.
9. the sequential control method of a charge pump circuit, be used for controlling charge pump circuit as described in claim 1-8, comprises following process:
Charge and discharge process, make the first pumping electric capacity as charging capacitor in cycle N sequential, make the second pumping electric capacity as the external output voltage of discharge capacity, make the second pumping electric capacity as charging capacitor in cycle N+1 sequential, make the first pumping electric capacity as the external output voltage of discharge capacity, when the first end discharge of described discharge capacity, the second end that supply voltage is added to described discharge capacity makes the first end of described discharge capacity obtain multiplier electrode;
the electric charge removal process, before the discharge capacity in described N sequential cycle is externally exported the external output of rear discharge capacity to described N+1 the sequential cycle, make the second end and the described power port conducting of the discharge capacity in described N sequential cycle, make the second end and the described grounding ports conducting of the charging capacitor in described N sequential cycle, the first end of discharge capacity in described N sequential cycle and the first end of the discharge capacity in described N+1 sequential cycle are electrically conducted, the first end that makes electric charge transfer to the discharge capacity in described N+1 sequential cycle from the first end of the discharge capacity in described N sequential cycle is recycled voltage,
The Voltage-output process is externally exported by the discharge capacity in described N+1 sequential cycle after described recovery voltage and the stack of described multiplier electrode.
10. the sequential control method of charge pump circuit according to claim 9, wherein, the discharge process of the charging process of described the first pumping electric capacity and described the second pumping electric capacity carries out simultaneously; The charge and discharge process of the discharge process of described the first pumping electric capacity and described the second pumping electric capacity carries out simultaneously.
11. the sequential control method of charge pump circuit according to claim 9, wherein, described electric charge removal process is carried out after the discharge process in described N sequential cycle and before the discharge process in described N+1 sequential cycle.
12. the sequential control method of charge pump circuit according to claim 9, wherein,
Described charge and discharge process comprised N sequential cycle: the discharge process of the charging process of the first pumping electric capacity and the second pumping electric capacity, wherein make respectively the second sequence switch, the 3rd sequence switch, the 8th sequence switch, the 9th sequence switch be in conducting state N sequential end cycle prerequisite for the first clock signal, the 4th clock signal and the 6th clock signal that are in simultaneously effective phase place, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition;
Described electric charge removal process is the electric charge removal process of the first pumping electric capacity in the cycle N sequential, wherein when described the first clock signal enters invalid phase place, the 3rd clock signal that is in effective phase place is provided, provide simultaneously the 4th clock signal and the 6th clock signal that are in effective phase place to make respectively the first sequence switch, the 9th sequence switch, the 3rd sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition;
The discharge process that described Voltage-output process is the second pumping electric capacity in the cycle N sequential;
Described charge and discharge process comprised N+1 sequential cycle: the charging process of the discharge process of the first pumping electric capacity and the second pumping electric capacity, wherein when N+1 sequential cycle begins, provide the second clock signal, the 5th clock signal and the 7th clock signal that are in simultaneously effective phase place to make respectively the 6th sequence switch, the 7th sequence switch, the 4th sequence switch and the 5th sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition;
Described electric charge removal process is the electric charge removal process of the second pumping electric capacity in the cycle N+1 sequential, wherein when described the second clock signal enters invalid phase place, the 3rd clock signal that enters effective phase place is provided again, provide simultaneously the 5th clock signal and the 7th clock signal that are in effective phase place to make respectively the first sequence switch, the 7th sequence switch, the 5th sequence switch be in conducting state, provide simultaneously other clock signal that is in invalid phase place to make other sequence switch be in closed condition;
The discharge process that described Voltage-output process is the first pumping electric capacity in the cycle N+1 sequential.
13. the sequential control method of charge pump circuit according to claim 12, wherein,
The charging process of described the first pumping electric capacity is: provide a supply voltage to the first end of described the first pumping electric capacity simultaneously with the second end ground connection of the first pumping electric capacity when the second sequence switch and the 3rd sequence switch conducting;
The discharge process of described the first pumping electric capacity is: the external output voltage of first end of described the first pumping electric capacity when the 6th sequence switch and the 7th sequence switch are in conducting provides a supply voltage to the second end of described the first pumping electric capacity to make the external output voltage of its first end simultaneously;
The electric charge removal process of described the first pumping electric capacity is: the first end that the voltage of tell the second pumping electric capacity first end is recycled to described the first pumping electric capacity when the first sequence switch, the 9th sequence switch and the 3rd sequence switch are in conducting, with the second end ground connection of described the first pumping electric capacity, provide second end of a supply voltage to described the second pumping electric capacity simultaneously;
The charging process of described the second pumping electric capacity is: provide a supply voltage to the first end of described the second pumping electric capacity simultaneously with the second end ground connection of the second pumping electric capacity when the 4th sequence switch and the 5th sequence switch conducting;
The discharge process of described the second pumping electric capacity is: the external output voltage of first end of described the second pumping electric capacity when the 8th sequence switch and the 9th sequence switch are in conducting provides a supply voltage to the second end of described the second pumping electric capacity to make the external output voltage of its first end simultaneously;
The electric charge removal process of described the second pumping electric capacity is: at the first sequence switch, the 7th sequence switch, when the 5th sequence switch is in conducting, the voltage of tell the first pumping electric capacity first end is recycled to the first end of described the second pumping electric capacity, with the second end ground connection of described the second pumping electric capacity, provide second end of a supply voltage to described the first pumping electric capacity simultaneously.
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| CN103178709B (en) | 2015-12-16 |
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