Description of drawings
Fig. 1 illustrates the schematic diagram of the nesa coating of the first embodiment.
Fig. 2 illustrates the stereogram of porousness dielectric layer.
Fig. 3 A~3D illustrates the flow chart of the manufacture method of nesa coating.
Fig. 4 illustrates the schematic diagram of the nesa coating of the second embodiment.
Fig. 5 illustrates the schematic diagram of the nesa coating of the 3rd embodiment.
Fig. 6 illustrates the schematic diagram of the electronic installation of the 4th embodiment.
Fig. 7 illustrates the schematic diagram of the electronic installation of the 5th embodiment.
Fig. 8 illustrates the schematic diagram of the electronic installation of the 6th embodiment.
Description of reference numerals
100,200,300,4200,5200,5400,6200: nesa coating
110,210,310,4210,5210,5410,6210: conductive layer
120,220,320,4220,5220,5420,6220: the porousness dielectric layer
120 ': metal level
121: hollow hole
130,230,330: substrate
222: the reunion piece
4000,5000,6000: electronic installation
4100,5100,6100: first substrate
4300,5300,6300: second substrate
4410,4420: transparent sense film
4500,5500: baffle
6400: pixel electrode film
6500: the electrophoresis structure sheaf
6600: protective layer
6700: transparent optical cement
D120: thickness
D222: diameter
G: gap
Embodiment
Below propose embodiment and be elaborated, it utilizes the porousness dielectric layer reduce the total reflection ratio and make extraneous light scattering, makes nesa coating have antireflection or the anti-effect of light of dazzling.Yet embodiment only in order to as the example explanation, can't limit the scope of wish protection of the present invention.In addition, the accompanying drawing clipped element in embodiment is with clear demonstration technical characterstic of the present invention.
The first embodiment
Please refer to Fig. 1~2, Fig. 1 illustrates the schematic diagram of the nesa coating 100 of the first embodiment, and Fig. 2 illustrates the stereogram of porousness dielectric layer (porous dielectric layer) 120.Nesa coating 100 comprises conductive layer 110 and porousness dielectric layer 120.Conductive layer 110 is for transparence and have conductivity, is for example indium tin oxide (indium tin oxide, ITO) or indium-zinc oxide (indium zinc oxide, IZO).The conductive layer 110 of this type can be applicable to display floater and contact panel.
Porousness dielectric layer 120 is arranged on conductive layer 110, and the material of porousness dielectric layer 120 is for example aluminium oxide.Porousness dielectric layer 120 has a plurality of hollow holes 121, and these a plurality of hollow holes 121 can be irregular distribution or regular distribution.
The refractive index of aluminium oxide is 1.76, and the refractive index of the air in hollow hole 121 is 1.0, so the equivalent refractive index of porousness dielectric layer 120 will be between 1.0 to 1.76.Adjust quantity or the big or small equivalent refractive index that can adjust porousness dielectric layer 120 of the hollow hole 121 of porousness dielectric layer 120.
During as example, its refractive index is 1.8~2.1 to conductive layer 110 take indium tin oxide (ITO).When extraneous light passes through nesa coating 100, be sequentially that 1.0 air, refractive index are that 1.0 to 1.76 porousness dielectric layer 120 and refractive index are 1.8~2.1 conductive layer 110 through refractive index, therefore most light will be refracted, and then effectively reduce the ratio of light total reflection, reach antireflecting effect.
In addition, adjust the thickness D120 of porousness dielectric layer 120, also can obtain different refraction effects, with the antireflecting effect of further adjustment.In the present embodiment, the thickness D120 of porousness dielectric layer 120 is 80~120 nanometers (nm).
Below further how to form porousness dielectric layer 120 with flowchart text on conductive layer 110.Please refer to Fig. 3 A~3D, it illustrates the flow chart of the manufacture method of nesa coating 100.At first, in Fig. 3 A, provide substrate 130, substrate 130 is for example hard plated film (HC PET).
Then, as shown in Fig. 3 B, form conductive layer 110 on substrate 130.Conductive layer 110 is for example to adopt gel method, magnetron sputtering method to be formed on substrate 130.In an embodiment, conductive layer 110 also can carry out Patternized technique in this step.
Then, as shown in Figure 3 C, form metal level 120 ' on conductive layer 110.Metal level 120 ' is for example to adopt the mode of plating, sputter to be formed on conductive layer 110.In the present embodiment, the material of metal level 120 ' is aluminium (Al).
Then, as shown in Fig. 3 D, take conductive layer 110 as anode, anodic oxidation (anodic oxidation) metal level 120 ' is to form porousness dielectric layer 120.Anodic oxidation is a kind of electrochemical reaction, in suitable electrolyte, sees through conductive layer 110 metal level 120 ' is used as anode, and graphite rod is as negative electrode.Electrolyte provides the metal level 120 ' that oxonium ion makes anode to form porousness dielectric layer 120, follows simultaneously hydrogen to generate at negative electrode.
In this step, suitable control size of current, reaction time, concentration of electrolyte, bath composition etc. can effectively be controlled size and the quantity of the hollow hole 121 (being illustrated in Fig. 2) of porousness dielectric layer 120.
As mentioned above, the porousness dielectric layer 120 of the present embodiment is not that the mode that sees through extra cling film forms, directly form porousness dielectric layer 120 but see through anodised mode on conductive layer 110, its process complexity is low, material cost can significantly reduce and thickness also can significantly reduce.
In addition, the mode that the porousness dielectric layer 120 of the present embodiment neither see through coated particle shape structure forms, but directly forms integrated porousness dielectric layer 120 on conductive layer 110.Compared to nutty structure, integrated porousness dielectric layer 120 is larger with the bonded area of conductive layer 110, therefore the height suitable with the bond strength of conductive layer 110.
In addition, compared to nutty structure, integrated porousness dielectric layer 120 is not easy to scatter or split, so the suitable height of the internal bond strength of porousness dielectric layer 120.
In sum, the nesa coating 100 of the present embodiment utilizes porousness dielectric layer 120 to reduce the total reflection ratio, makes nesa coating 100 have antireflecting effect.And the manufacture method of the nesa coating 100 of the present embodiment sees through anodised mode and forms porousness dielectric layer 120, makes bond strength increase, process complexity reduction, material cost reduction and thickness also can reduce.
The second embodiment
Please refer to Fig. 4, it illustrates the schematic diagram of the nesa coating 200 of the second embodiment.Nesa coating 100 differences of the nesa coating 200 of the present embodiment and the first embodiment are porousness dielectric layer 220, and all the other something in common are repeated description no longer.
As shown in Figure 4, the porousness dielectric layer 220 of the present embodiment comprises a plurality of reunion pieces 222.Each reunion piece 222 interval clearance G.222 whole ground of these a plurality of reunion pieces are formed on conductive layer 210 and substrate 230.A plurality of hollow holes are contained in the inside of each reunion piece 222.Suitable small of the size of reunion piece 222, in the present embodiment, the diameter D222 of reunion piece 222 is 1~8 micron (um).Suitably control anodised size of current, reaction time, concentration of electrolyte, bath composition and can effectively control the size of reunion piece 222.
Extraneous light is injected reunion piece 222 or is injected clearance G and will produce different dispersion effects.Therefore, when extraneous light entered nesa coating 200, the phenomenon of dazzling light can effectively reduce.
The 3rd embodiment
Please refer to Fig. 5, it illustrates the schematic diagram of the nesa coating 300 of the 3rd embodiment.Nesa coating 100 differences of the nesa coating 300 of the present embodiment and the first embodiment are that conductive layer 310 and porousness dielectric layer 320 are pattern structure, and all the other something in common are repeated description no longer.
As shown in Figure 5, the conductive layer 310 of the present embodiment is pattern structure.Porousness dielectric layer 320 can the selectivity coating mode all be arranged on the conductive layer 310 of patterning, and be not arranged on substrate 330, and expose the surface of the substrate 330 of part.
Take the material of substrate 330 as glass as example, the refractive index of glass is about 1.5~1.6.The refractive index of conductive layer 310 is 1.8~2.1.In the situation that substrate 330 is large with the refractive index difference of conductive layer 310, extraneous light enters conductive layer 310 and directly to enter the intensity of reflected light difference that substrate 330 produces larger, easily forms in appearance etched mark.
The present embodiment coating refractive index on conductive layer 310 is 1.0~1.76 porousness dielectric layer 320, so extraneous light enters porousness dielectric layer 320 and becomes approaching with directly entering the intensity of reflected light that substrate 330 produces, and then makes etched mark become not obvious.
The 4th embodiment
Please refer to Fig. 6, it illustrates the schematic diagram of the electronic installation 4000 of the 4th embodiment.The electronic installation 4000 of the present embodiment can adopt the design of the nesa coating 200 of the design of nesa coating 100 of the first embodiment or the second embodiment.Below explain with the example that is designed to of the nesa coating 200 that adopts the second embodiment.
The electronic installation 4000 of the present embodiment comprises first substrate 4100, nesa coating 4200, second substrate 4300, two transparent sense films 4410,4420 and baffle 4500.Nesa coating 4200 is arranged on first substrate 4100.Second substrate 4300 is parallel to first substrate 4100.
Transparent sense film 4410,4420 is arranged on the two relative surfaces of second substrate 4300, and transparent sense film 4410 is wire electrode (being for example orthogonal X axis electrode and Y-axis electrode) with transparent sense film 4420.Second substrate 4300 is contact panel with transparent sense film 4410,4420.Baffle 4500 is arranged at outside nesa coating 4200.
Nesa coating 4200 comprises conductive layer 4210 and porousness dielectric layer 4220.Conductive layer 4210 is shielding (shielding) electrode.The nesa coating 4200 of the present embodiment adopts the design of reunion piece, reaches simultaneously thus anti-reflection effect and the anti-effect of light of dazzling.
The 5th embodiment
Please refer to Fig. 7, it illustrates the schematic diagram of the electronic installation 5000 of the 5th embodiment.The electronic installation of the present embodiment can adopt the design of the nesa coating 300 of the 3rd embodiment.
The electronic installation 5000 of the present embodiment is contact panel; this contact panel is for example diaphragm type (Film type) or glass type (Glass type) contact panel; wherein the glass type contact panel is for example coating single side (Single-sided ITO; SITO), double-sided coating (Double-sided ITO; DITO), touch-control cover glass module (Window in integrated sensor, WIS).Coating single side refers to form X and Y electrode in the single surface of substrate, and double-sided coating refers to form respectively X, Y electrode in relative two surfaces of substrate, and touch-control cover glass module refers to directly form X and Y electrode on the side of cover glass.The present embodiment is take diaphragm type (Film type) contact panel as example.Electronic installation 5000 comprises first substrate 5100, nesa coating 5200, second substrate 5300, nesa coating 5400 and baffle 5500.Nesa coating 5200 is arranged on first substrate 5100.Second substrate 5300 is parallel to first substrate 5100.Nesa coating 5400 is arranged on second substrate 5300.Baffle 5500 is arranged on nesa coating 5200.
Nesa coating 5200,5400 comprises respectively conductive layer 5210,5410 and porousness dielectric layer 5220,5420. Conductive layer 5210,5410 is wire electrode (being for example orthogonal X axis electrode and Y-axis electrode).The porousness dielectric layer 5220 of the present embodiment and 5420 adopts the design of selectivity coatings, reaches simultaneously thus anti-reflection effect and avoids the problem of etched mark.
In an embodiment, can be only one of therein conductive layer 5210,5410 tops form porousness dielectric layers (being for example porousness dielectric layer 5220 or porousness dielectric layer 5420).That is to say as long as one of them conductive layer 5210,5410 tops are formed with the porousness dielectric layer and namely do not break away from technical scope under the present invention at least.
The 6th embodiment
Please refer to Fig. 8, it illustrates the schematic diagram of the electronic installation 6000 of the 6th embodiment.The electronic installation 6000 of the present embodiment can adopt the design of the nesa coating 200 of the design of nesa coating 100 of the first embodiment or the second embodiment.Below explain as an example of the nesa coating 200 that adopts the second embodiment example.
The electronic installation 6000 of the present embodiment is electronic paper display panel.Electronic installation 6000 comprises first substrate 6100, nesa coating 6200, second substrate 6300, pixel electrode film 6400, electrophoresis structure sheaf 6500, protective layer 6600 and transparent optical cement (Optically Clear Adhesive, OCA) 6700.Nesa coating 6200 is arranged at a side of first substrate 6100, and protective layer 6600 and transparent optical cement 6700 are arranged at the opposite side of first substrate 6100.Nesa coating 6200 comprises conductive layer 6210 and porousness dielectric layer 6220.Conductive layer 6210 is reference electrode.Second substrate 6300 is parallel to first substrate 6100.Pixel electrode film 6400 is arranged on second substrate 6300.Electrophoresis structure sheaf 6500 is arranged between first substrate 6100 and second substrate 6300.Electrophoresis structure sheaf 6500 is for example to comprise a plurality of electrophoresis capsules or the little cup of electrophoresis.In the present embodiment, electrophoresis structure sheaf 6500 explains as an example of the electrophoresis capsule example.
The porousness dielectric layer 6220 of the present embodiment adopts the design of reunion pieces, reaches simultaneously thus anti-reflection effect and avoids the problem of etched mark.
In sum, although the present invention discloses as above with preferred embodiment, so it is not to limit the present invention.The persons of ordinary skill in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention defines and is as the criterion when looking claim.