CN103137094A - Split joint image processor used for image matting - Google Patents
Split joint image processor used for image matting Download PDFInfo
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- CN103137094A CN103137094A CN2012105117775A CN201210511777A CN103137094A CN 103137094 A CN103137094 A CN 103137094A CN 2012105117775 A CN2012105117775 A CN 2012105117775A CN 201210511777 A CN201210511777 A CN 201210511777A CN 103137094 A CN103137094 A CN 103137094A
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Abstract
The invention provides a split joint image processor used for image matting. The split joint image processor used for image matting is a video image matting display. The split joint image processor used for image matting comprises a power supply board (P1) and a control board (C1), back board shift (S1) and a composite video broadcast signal (CVBS) board (A1) connected with the back board shift (S1), a digital visual interface (DVI) board (A2), a high definition multimedia interface (HDMI) board (A3) and a video graphics array (VGA) board (A4). The back board shift (S1) and image processing boards (B, B2, B3 and B4) are connected. The control board (C1) is respectively connected with the back board shift (S1), the CVBS board (A1), the DVI board (A2), the HDMI board (A3), the VGA board (A4) and the image processing boards (B1, B2, B3 and B4). Due to the fact that the split joint image processor used for image matting adopts pure hardware structure design, and is free of operating system, the whole system is operated in a complete-sealing mode, operation can be conducted without a computer, starting software and the like, operation is very simple and convenient, stability of the split joint image processor used for image matting is far higher than stability of traditional controller in a 'computer plus board card' mode and an embedded system design based on a WINDOWS operating system.
Description
Technical field
The present invention relates to technical field of video image processing, that specially refer to is image shrink, zoom, the nuclear technology algorithms such as overlay.
Background technology
The stitching image controller claims again image processor, multi-screen splicing device etc., and major function is that a complete picture signal is divided into a plurality of signals, distributes to a plurality of display units, forms simultaneously a large display screen and shows dynamic menu.Be applicable to network operation center, public control center, intelligent traffic administration system center, processing enter, civilian or military surveillance, call center, financial center, video conference rooms etc.This serial splicer is the high-end Image Mosaics treatment facility of a pure hardware structure, can show simultaneously a plurality of dynamic high definition pictures at a plurality of display units, is the core image treatment equipment that is fit to the large-screen splicing display system.
Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art part, a kind of stitching image processor for scratching picture is provided.
stitching image processor for scratching picture of the present invention, scratching picture for video image shows, comprise power panel (P1), with control panel (C1), backboard exchange (S1) and be connected to backboard and exchange CVBS plate (A1) on (S1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4), described backboard exchange (S1) and image processing board (B1, B2, B3 is connected connection with B4, described control panel (C1) exchanges (S1) with backboard respectively, CVBS plate (A1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4) and image processing board (B1, B2, B3 is connected connection with B4.
The stitching image processor is the equipment that belongs to the centralized control type, unified being arranged in the cabinet of 19 cun industrial standards, and the cabinet height is the casing of 3u, cabinet inside belongs to card insertion type structure, convenient and flexible installation.Comprising parts specifically has interface board, switch type backboard, image processor plate, control panel, power panel (P1).The present invention includes according to the image processing function of the control protocol realization of independent development: across screen, and roaming, stack, convergent-divergent, transparent screen, brightness of image, contrast, colorfulness.All functions of the present invention are to realize by hardware mode fully, so have high stability and anti-interference, hardware cost has obvious advantage in the middle of like product.
the present invention has following technique effect: owing to adopting pure Design of Hardware Architecture, without operating system, the complete closed operation of whole system, do not need the operations such as computer and startup software, very easy, stability is much higher than based on " computing machine+integrated circuit board " mode of WINDOWS operating system and the traditional controller of Embedded System Design, solved due to the PC framework problem that easily crashes, adopt at present state-of-the-art high-speed video process chip in the world, the Digital Image Processing algorithm of application of advanced is processed multiple paths of video images in real time, be fit to very much require the occasion of long-term continous-stable work.From the cost of products angle, the cost of stitching image processor is starkly lower than other architecture platforms, especially the architecture mode of " computing machine+integrated circuit board " formula.
Description of drawings
Fig. 1 is structural representation of the present invention.
Fig. 2 is for scratching the figure design sketch.
Embodiment
as shown in Figure 1, stitching image processor of the present invention, scratching picture for video image shows, comprise power panel (P1), with control panel (C1), backboard exchange (S1) and be connected to backboard and exchange CVBS plate (A1) on (S1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4), described backboard exchange (S1) and image processing board (B1, B2, B3 is connected connection with B4, described control panel (C1) exchanges (S1) with backboard respectively, CVBS plate (A1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4) and image processing board (B1, B2, B3 is connected connection with B4.
Stitching image processor of the present invention is scratched picture for video image and is shown, by interface board, back panel exchange type parts and disposable plates realize harmless transmission and the switching of video flowing, the chroma key﹠amp of processor adopting; The mask core technology realizes.Popular call is that colourity is scratched picture, the look strong picture of scratching, chroma key, be a certain partially transparent that makes image, selected color is removed from picture, remove the color partially transparent, demonstrate background frame, do not remove color part and still keep original image, reached the synthetic purpose of picture, the picture of taking separately in this way through scratching after picture can with various scene synthesis together.For example weatherman and the combination of weather chart behind; In some TV play, the role flies in the sky, these synthetic stunts such as the picture of walking in cloud, need to take material in advance before blue screen and green screen, video as host's report, use when post-production and scratch the picture technology original blueness of rejecting or green background signal, then be synthesized in other background such as weather chart, as special efficacy, the degree of enriching of artistic creation is greatly strengthened by scratching, and for the camera lens that is difficult to take provides alternative solution, reduced simultaneously the shooting cost.
interface board comprises pure conversion of resolution, the purpose of conversion is clearer and more definite so like this, do not comprise AD and DA conversion, avoid the loss of video video content in the middle of transfer process, for transparent demonstration provides good video image quality, the back panel exchange type parts are realized equal video seamless switching, rate bandwidth is apparently higher than the video bandwidth of 1920*1080, in order to realize that the transparent demonstration of high definition provides solid foundation, disposable plates is the core component to the transparent Graphics Processing of video, the possibility that the shrink high-performance algorithm that core component provides and zoom high-performance algorithm provide large picture and little picture to realize for transparent demonstration, be unlikely to scratch the display effect that the picture technology shows limitation raw frames size, take charge of the stitching image processor agreement of independent research by me, can move
The attitude adjustment is done in real time and is scratched the picture processing, and SD and high definition picture can be supported simultaneously to do and scratch as processing.
By the realization of this technology, be mainly in order to do once special trial and application in the screen display field, the application of former this technology mainly concentrates in the middle of video display and TV, can be easy to be extended to now other field.
[0013] in use, software sets up separately a vision to scratch the figure function, according to actual needs, by different types of parameter is set, reaches different stingy figure effects, scratches the figure effect as shown in Figure 2.
Claims (1)
1. stitching image processor of be used for scratching picture, it is characterized in that, scratching picture for video image shows, comprise power panel (P1), with control panel (C1), backboard exchange (S1) and be connected to backboard and exchange CVBS plate (A1) on (S1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4), described backboard exchange (S1) and image processing board (B1, B2, B3 is connected connection with B4, described control panel (C1) exchanges (S1) with backboard respectively, CVBS plate (A1), DVI plate (A2), HDMI plate (A3) and VGA plate (A4) and image processing board (B1, B2, B3 is connected connection with B4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012105117775A CN103137094A (en) | 2012-12-04 | 2012-12-04 | Split joint image processor used for image matting |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012105117775A CN103137094A (en) | 2012-12-04 | 2012-12-04 | Split joint image processor used for image matting |
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| CN103137094A true CN103137094A (en) | 2013-06-05 |
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| CN2012105117775A Pending CN103137094A (en) | 2012-12-04 | 2012-12-04 | Split joint image processor used for image matting |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106530312A (en) * | 2016-11-05 | 2017-03-22 | 广州市奥威亚电子科技有限公司 | Real-time image matting system based on low-power embedded system |
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| CN101661700A (en) * | 2008-08-26 | 2010-03-03 | 奇菱科技股份有限公司 | Device and method for regulating image resolution and display device |
| CN101778199A (en) * | 2010-02-09 | 2010-07-14 | 深圳市唯奥视讯技术有限公司 | Realization method for synthesizing multi-path high-definition video image picture |
| CN102184158A (en) * | 2011-03-31 | 2011-09-14 | 杭州海康威视数字技术股份有限公司 | Daughter board with two-stage FPGA chip and collocation method of two-stage FPGA chip |
| CN102202171A (en) * | 2011-04-21 | 2011-09-28 | 北京理工大学 | Embedded high-speed multi-channel image acquisition and storage system |
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2012
- 2012-12-04 CN CN2012105117775A patent/CN103137094A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101296306A (en) * | 2007-04-28 | 2008-10-29 | 佛山市顺德区顺达电脑厂有限公司 | Multimedia portable device |
| CN101661700A (en) * | 2008-08-26 | 2010-03-03 | 奇菱科技股份有限公司 | Device and method for regulating image resolution and display device |
| CN101778199A (en) * | 2010-02-09 | 2010-07-14 | 深圳市唯奥视讯技术有限公司 | Realization method for synthesizing multi-path high-definition video image picture |
| CN102184158A (en) * | 2011-03-31 | 2011-09-14 | 杭州海康威视数字技术股份有限公司 | Daughter board with two-stage FPGA chip and collocation method of two-stage FPGA chip |
| CN102202171A (en) * | 2011-04-21 | 2011-09-28 | 北京理工大学 | Embedded high-speed multi-channel image acquisition and storage system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106530312A (en) * | 2016-11-05 | 2017-03-22 | 广州市奥威亚电子科技有限公司 | Real-time image matting system based on low-power embedded system |
| CN106530312B (en) * | 2016-11-05 | 2019-03-12 | 广州市奥威亚电子科技有限公司 | One kind being based on low-power-consumption embedded system real-time image scratching method |
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Application publication date: 20130605 |