CN103117668A - Simplified five-phase and three-level voltage source inverter and vector control method thereof - Google Patents

Simplified five-phase and three-level voltage source inverter and vector control method thereof Download PDF

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CN103117668A
CN103117668A CN2013100601278A CN201310060127A CN103117668A CN 103117668 A CN103117668 A CN 103117668A CN 2013100601278 A CN2013100601278 A CN 2013100601278A CN 201310060127 A CN201310060127 A CN 201310060127A CN 103117668 A CN103117668 A CN 103117668A
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buck
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CN103117668B (en
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刘洪臣
王国立
于海龙
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Harbin Institute of Technology
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Harbin Institute of Technology
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Abstract

The invention relates to a simplified five-phase and three-level voltage source inverter and a vector control method thereof, and belongs to the technical field of power electronic converters. Provided are the simplified five-phase and three-level voltage source inverter and the vector control method thereof which solve the problem that an existing five-phase and three-level voltage source inverter needs more power switch elements. A capacitor C1 and a capacitor C2 of the simplified five-phase and three-level voltage source inverter are connected with two output ends of a direct current power supply in parallel after the capacitor C1 and the capacitor C2 are connected in series. A first input end of a three-level and double-buck level is connected with a positive pole of the direct current power supply. A second input end of the three-level and double-buck level is connected with the connecting end of the capacitor C1 and the capacitor C2. A third input end of the three-level and double-buck level is connected with a negative pole of the direct current power supply. The first input end of the three-level and double-buck level is connected with a first input end of a two-level voltage type inversion level. The second input end of the three-level and double-buck level is connected with a second input end of the two-level voltage type inversion level. The simplified five-phase and three-level voltage source inverter and the vector control method thereof are applicable to application scenarios with middle and low pressure and high power.

Description

Five phase three-level voltage source inverter and the vector control methods thereof of simplifying
Technical field
The invention belongs to the converters technical field.
Background technology
Single from economy and technology maturity aspect consideration at present, the Alternating Current Governor System that three-phase inverter and three phase electric machine form is the most representative, and is most widely used general.Yet along with society and expanding economy, in fields such as industry, civilian and militaries, Alternating Current Governor System is had higher requirement, particularly high-power, high torque density, high power density and high reliability aspect, and now, the power consumption of High power AC drive system accounts for 70% of all electric drive system power consumptions.Although traditional three phase electric machine and speed adjusting technique thereof are quite ripe, due to the restriction of himself, can't satisfy application requirements fully.
Multi-phase AC motor (more than three-phase) is compared three phase electric machine, has improved the torque pulsation frequency, reduces the torque pulsation amplitude and to the capacity requirement of power device, can realize high-power operation in the limited occasion of supply power voltage.In addition, the number of phases of increase also helps the governor control characteristics that improves low regime, and vibration and noise reduce greatly.Fault freedom is also better the characteristics of polyphase machine, in heterogeneous one mutually or several when breaking down mutually, by suitable fault-tolerant strategy, motor still can derate continue operation, need not to shut down or system's restructuring, this has improved the reliability of drive system greatly.
Large capacity multi-phase AC motor adopts the multi-electrical level inverter power supply for the harmonic reduction loss more.The advantages such as it is low that multi-electrical level inverter output has harmonic content, and the common-mode voltage amplitude is little can be applicable to the high pressure field simultaneously.At present, the multi-electrical level inverter of main flow can be divided into by main circuit topological structure: diode neutral point clamp pattern (NPC), striding capacitance type and have the cascaded inverter of independent DC power supply.Front two kinds need respectively more diode and electric capacity, and all need more device for power switching, and this will bring cost higher, and the energy loss that switch causes is larger, control the problems such as complicated; And the third needs more independent DC power supply, add that by different independent current sources inverter circuit is formed in parallel in reality, produce the N level and need N-1 independent current source and 4 (N-1) individual switching tube, wherein N is natural number, but the different situation of the utilance of each power supply can appear in this kind inverter circuit, is unfavorable for inverter operation steady in a long-term.
Along with the further demand that has reduced the harmonic loss of motor, the multi-phase AC motor system that uses in the mesolow field also adopts the multi-level inverse conversion technology that can be applicable to the high pressure field.For the many problems of multi-electrical level inverter power switch quantity, research is applicable to the novel multi-electrical level inverter topology of mesolow occasion, reduce the quantity of device for power switching in multi-electrical level inverter, reduce the cost of multi-electrical level inverter, reduce switching loss, reduce the control complexity significant.
Summary of the invention
The present invention has more device for power switching to cause energy loss larger in order to solve existing five phase three-level voltage source inverters, controls complicated problem, has proposed five phase three-level voltage source inverter and the vector control methods thereof of simplifying.
The five phase three-level voltage source inverters of simplifying, it is by the two Buck level circuit of three level, two level voltage type inverse cascade circuit, DC power supply, capacitor C 1And capacitor C 2Form.
Capacitor C 1And capacitor C 2In parallel with two outputs of DC power supply after series connection, described capacitor C 1And capacitor C 2Capacitance identical, the first input end of the two Buck level circuit of three level is connected with the positive pole of DC power supply, the second input and the capacitor C of three level pair Buck level circuit 1And capacitor C 2Link be connected, the 3rd input of the two Buck level circuit of three level is connected with the negative pole of DC power supply, the first output of the two Buck level circuit of three level is connected with the first input end of two level voltage type inverse cascade circuit, the second output of the two Buck level circuit of three level is connected with the second input of two level voltage type inverse cascade circuit, two level voltage type inverse cascade circuit output end output reference voltages.
Based on the vector control method of the five phase three-level voltage source inverters of simplifying, the detailed process of described method is:
Step 1: judgement current time reference voltage vector residing sector, remember that this sector is the i sector, i is the natural number between 1 to 10;
Step 2: according to nearest three vector principles, the i sector is divided into 5 zones, is designated as respectively the I district, the II district, the III district, the IV district, the V district, the zone under judgement current time reference voltage vector, and remember that this zone is the j district, j is I, II, III, IV or V;
Step 3: according to nearest three vector principles, by definite three basic resultant vector corresponding to j district's selection of step 2;
Step 4: calculation procedure 3 obtains the action time of three basic resultant vector;
Step 5: the action time of the three basic resultant vector that obtains according to step 4 and the sequence of operation of three basic resultant vector to simplify five mutually 7 groups of switches of three-level voltage source inverter carry out vector control.
Five phase three-level voltage source inverters of simplification of the present invention are compared with five traditional phase three-level VSIs, its switching frequency can be higher, kept the high advantage of input and output current pulsation frequency, and owing to adopting the space vector PWM technology, and utilize the redundancy vector to control the fluctuation of midpoint potential, to reduce the inverter output harmonic wave, kept the little advantage of output harmonic wave.But the five-phase three-level inverter of existing diode clamp formula needs 20 switching devices and 10 diodes, cost is higher, overall switching loss is larger, controls more complicated, and reliability is lower, and the five-phase three-level inverter of simplified structure only needs 14 switching devices, do not need diode, cost is lower, and overall switching loss is less, control relatively simply, reliability is higher.To sum up, inverter of the present invention has kept the few advantage of traditional multi-electrical level inverter output harmonic wave, can reduce the quantity of switching device simultaneously.Therefore, the five-phase three-level inverter of this simplified structure has good application prospect in mesolow, powerful AC Drive occasion.
Description of drawings
Fig. 1 is the simplification main circuit topological structure of five phase three-level voltage source inverters of simplification;
Fig. 2 is five phase voltage resultant vector spatial distribution maps;
Fig. 3 is the vector space distribution map of effectively working;
Fig. 4 is the 1st sector reference voltage resultant vector figure;
Fig. 5 is the basic structure schematic diagram of five phase three-level voltage source inverters of simplification;
Fig. 6 is the flow chart of vector control method.
Embodiment
Embodiment one: referring to Fig. 1 and Fig. 5, present embodiment is described, five phase three-level voltage source inverters of the described simplification of present embodiment, it is by the two Buck level circuit 1 of three level, two level voltage type inverse cascade circuit 2, DC power supply 3, capacitor C 1And capacitor C 2Form,
Capacitor C 1And capacitor C 2In parallel with two outputs of DC power supply 3 after series connection, described capacitor C 1And capacitor C 2Capacitance identical, the first input end P of the two Buck level circuit 1 of three level is connected with the positive pole of DC power supply 3, the second input and the capacitor C of three level pair Buck level circuit 1 1And capacitor C 2Link O be connected, the 3rd input N of the two Buck level circuit 1 of three level is connected with the negative pole of DC power supply 3, the first output P_vin of the two Buck level circuit 1 of three level is connected with the first input end of two level voltage type inverse cascade circuit 2, the second output N_vin of the two Buck level circuit 1 of three level is connected with the second input of two level voltage type inverse cascade circuit 2, two level voltage type inverse cascade circuit 2 output output reference voltages.
Five phase three-level voltage source inverters of the described simplification of present embodiment are the neutral point clamped multi voltage source inverters of simplified structure, circuit topological structure figure as shown in Figure 1, the inverter topology difference of the topology of this inverter and traditional diode clamp formula is, the former only uses 14 switching devices, and latter needs 20 switching devices.
Embodiment two: the further restriction of present embodiment and five phase three-level voltage source inverters of embodiment one described simplification, the two Buck level circuit 1 of described three level are by four IGBT switch S 1, S 2, S 3And S 4Form a described IGBT switch S 1Collector electrode as the first input end P of the two Buck level circuit 1 of three level, an IGBT switch S 1Emitter and the 2nd IGBT switch S 2Collector electrode be connected after as the first output P_vin of the two Buck level circuit 1 of three level, the 2nd IGBT switch S 2Emitter and the 3rd IGBT switch S 3Collector electrode be connected, and this link is as the second input of the two Buck level circuit 1 of three level, the 3rd IGBT switch S 3Emitter and the 4th IGBT switch S 4Collector electrode be connected as the second output N_vin of the two Buck level circuit 1 of three level, described the 4th IGBT switch S 4Emitter as the 3rd input of the two Buck level circuit 1 of three level.
Embodiment three: the further restriction of present embodiment and five phase three-level voltage source inverters of embodiment two described simplification, four IGBT switch S of the two Buck level circuit 1 of described three level 1, S 2, S 3And S 4State and two level V of two outputs outputs of the two Buck level circuit 1 of described three level P_invAnd V N_invBetween relation as shown in Table 1:
Table one
V in table DCThe expression capacitor C 1The voltage magnitude at two ends.
Five phase three-level voltage source inverters of the described simplification of present embodiment and traditional three level neutral point clamped multi voltage source inverters are similar, and this inverter is by two series capacitor C 1And C 2Power supply, the voltage on each electric capacity is half V of supply voltage DCCapacitor C 1And capacitor C 2Link O be the zero-potential point of direct voltage, the O point is as a reference point, find out that easily output level has three kinds: V DC, 0V ,-V DCCan find out according to the switch combination of table one, the port P_inv of two level PWM voltage source inverters can obtain V DCWith two kinds of level of 0V, port N_inv can obtain V DC, two kinds of level of 0V.In order to prevent dc-side short-circuit, switch S 1And S 2, S 3And S 4Control signal be all complementary.
Embodiment four: the further restriction of present embodiment and five phase three-level voltage source inverters of embodiment one described simplification: described two level voltage type inverse cascade circuit 2 are the Five-phase inverter circuit.
The upper brachium pontis of the described Five-phase inverter circuit of present embodiment is comprised of five IGBT switches, and described five IGBT switches are respectively S ap, S bp, S cp, S dpAnd S ep, lower brachium pontis also is comprised of five IGBT switches, is respectively S an, S bn, S cn, S dnAnd S en
For preventing dc-side short-circuit, the control signal of two switching devices up and down of each brachium pontis of the described Five-phase inverter circuit of present embodiment is also complementary, and the switching device of therefore controlling whole circuit only need generate the two-way pwm control signal of 7 groups of complementations.
Embodiment five: referring to Fig. 6, present embodiment is described, based on the vector control method of five phase three-level voltage source inverters of embodiment one described simplification, the detailed process of described method is:
Step 1: judgement current time reference voltage vector residing sector, remember that this sector is the i sector, i is the natural number between 1 to 10;
Step 2: according to nearest three vector principles, the i sector is divided into 5 zones, is designated as respectively the I district, the II district, the III district, the IV district, the V district, the zone under judgement current time reference voltage vector, and remember that this zone is the j district, j is I, II, III, IV or V;
Step 3: according to nearest three vector principles, by definite three basic resultant vector corresponding to j district's selection of step 2;
Step 4: calculation procedure 3 obtains the action time of three basic resultant vector;
Step 5: the action time of the three basic resultant vector that obtains according to step 4 and the sequence of operation of three basic resultant vector to simplify five mutually 7 groups of switches of three-level voltage source inverter carry out vector control.
In above step, in order to reduce the harmonic wave of inverter output, basic resultant vector is determined by the residing delta-shaped region of reference voltage vector.Wherein, select from the nearest three basic resultant vector of reference voltage vector, be used for forming two adjacent sides take initial point as the summit of delta-shaped region.This principle is called for short nearest three vector principles.
Embodiment six: present embodiment is described referring to Fig. 2 and Fig. 3, the further restriction of present embodiment and embodiment five described vector control methods, the formation method of the described sector of described step 1 is: 93 basic resultant vectors of Five-phase inverter circuit are divided into 7 groups according to amplitude, are respectively 0 vector, amplitude is 0.2472V DCVector, amplitude be 0.4V DCVector, amplitude be 0.4944V DCVector, amplitude be 0.6472V DCVector, amplitude be 0.8V DCThe vector amplitude be 1.2944V DCVector,
Be 0.6472V with 0 vector, amplitude DCThe vector amplitude be 1.2944V DCVector as effective work vector, carry out Space vector modulation,
Effectively the work vector is divided into 10 36 ° of sectors with the space, is numbered respectively 1,2 ..., 10, it is 0.6472V that all there is amplitude each sector DCThe vector amplitude be 1.2944V DCVector, the argument between adjacent vector is poor is 36 °.
Due to the restriction of circuit topological structure, the two-level inverter side only has the two Buck levels of two terminals and three level to be connected, so in the combination of the level of the described Five-phase inverter circuit of present embodiment, V can not occur simultaneously DC, 0V and-V DCThree kinds of level, in this case, two level combinations of two level voltage type inverse cascade circuit have 93 kinds, and the basic resultant vector that obtains thus five phase voltages has 93 (containing 3 zero vectors and 90 non-zero vectors), and three dimensional vector diagram such as Fig. 2 is not.
With 0 vector called after vector ZV, amplitude is 0.2472V DCVector called after vector S V 1, amplitude is 0.4V DCVector called after vector S V 2, amplitude is 0.4944V DCVector called after vector MV 1, amplitude is 0.6472V DCVector called after vector MV 2, amplitude is 0.8V DCVector called after vector LV 1, amplitude is 1.2944V DCVector called after vector LV 2, vector S V wherein 1, vector S V 2With vector MV 2Group all has the redundancy vector, and these 3 groups of vectors can bring the midpoint potential imbalance problem.For to the simplicity of sector judgement and the consideration that improves the voltage modulated ratio, in actual applications, all non-zero space vectors can't be carried out reference voltage vector and synthesize.The present invention adopts ZV, vector MV 2With vector LV 2Carry out Space vector modulation, effectively work vector as shown in Figure 3, in figure, P, O, N represent that every corresponding level is respectively V DC, 0V ,-V DC
In the present invention is to adopt space-vector PWM arithmetic to realize to the synthetic of reference voltage vector.
Embodiment seven: the further restriction of present embodiment and embodiment six described vector control methods, the method for the described judgement current time reference voltage vector of described step 1 residing sector is: the cartesian component by current reference voltage vector judges reference voltage residing sector.
Embodiment eight: the further restriction of present embodiment and embodiment seven described vector control methods, described cartesian component by the current time reference voltage vector to the method that reference voltage residing sector judges is: the cartesian component V that decomposes or directly provide reference voltage vector by rectangular coordinate αAnd V β, basis then
A 0=V βcot(36°)-V α
A 1=V βcot(72°)-V α
A 2=-V βcot(36°)-V α
A 3=-V βcot(72°)-V α
Calculate and judge reference voltage vector residing sector,
Work as V β>0 o'clock, the residing sector number of reference voltage vector was N=1+A 0+ A 1+ A 2+ A 3
Work as V β<0 o'clock, the residing sector number of reference voltage vector was N=6-(A 3+ A 2+ A 1+ A 0).
Because the amount of calculation of the algorithm that adopt the judgement sector is less, just more easily realize with programming, real-time is better, so the present invention carries out the sector judgement by the cartesian component of reference voltage vector, this mode does not need to carry out a large amount of real-time trigonometric functions to be calculated, and amount of calculation is less.
Embodiment nine: the method in the zone under the further restriction of present embodiment and embodiment five described vector control methods, the described judgement reference voltage vector of described step 2 are positioned at is:
With amplitude 0.6472V DCFor unit carries out normalization to reference voltage vector, establish that the amplitude of reference voltage vector is V after normalization ref, phase angle is θ, ∠ ACG is α.
There is tan α=3tan18 ° according to geometrical relationship, and following 4 conditional combinations are arranged
Rule of judgment 1: note
l ο=θ-18°
l ο>0 is true, otherwise is false;
Rule of judgment 2: note
l 1=V refcosl 0-cos18°
l 1>0 is true, otherwise is false;
Rule of judgment 3: note
Figure BDA00002859981900071
l 2>0 is true, otherwise is false;
Rule of judgment 4: note
l 3=V refsinl 0-l 2tanα
l 3>0 is true, otherwise is false.
If above condition very is designated as 1, vacation is designated as 0, by combination binary number l 0l 1l 2l 3Judge the zone that reference voltage vector is positioned at affiliated sector:
I zone: l 0l 1l 2l 3=0000,0001,1000,1001},
II zone: l 0l 1l 2l 3=0100,0101,0111},
III zone: l 0l 1l 2l 3=1100,1101,1111},
IV zone: l 0l 1l 2l 3=0110},
V zone: l 0l 1l 2l 3={ 1111}.
Have symmetry because the sector distributes, the judgement of other sector inner regions is similarly, just synthetic vector difference.
After having determined the zone at reference vector place, according to nearest three vector principles, select different three basic resultant vectors in different zones.
Remember that 0 vector is O ', argument is the vector MV of 0 ° 2Be M 1, argument is the vector LV of 0 ° 2Be L 1, argument is the vector MV of 36 ° 2Be M 2, argument is the vector LV of 36 ° 2Be L 2, the three basic resultant vector group in I, II, III, IV and V zone be respectively O ', M 1, M 2, { M 1, M 2, L 1, { M 1, M 2, L 2, { M 1, L 1, L 2And { M 2, L 1, L 2.
Embodiment ten: the further restriction of present embodiment and embodiment five described vector control methods, the described calculation procedure 3 of described step 4 obtain the method for the action time of three basic resultant vector and are:
If be respectively T the action time of three basic resultant vector A, T BAnd T C,
According to V A T A cos θ A + V B T B cos θ B + V C T C cos θ C = T s V ref cos θ V A T A sin θ A + V B T B sin θ B + V C T C sin θ C = T s V ref sin θ T A + T B + T C = T S Find the solution, obtain T A, T BAnd T C,
In formula, Ts is the sampling period, V A, V BAnd V CBe the amplitude of three basic resultant vector, θ A, θ BAnd θ CArgument for the three basic resultant vector.
Embodiment 11: the further restriction of present embodiment and embodiment five described vector control methods, the sequence of operation of the described three basic resultant vector of described step 5 is: the vector sequence of operation of zones of different in the odd number sector, as shown in Table 2, the vector sequence of operation of zones of different in the even number sector, as shown in Table 3
Table two
Figure BDA00002859981900081
Table three
Wherein subscript "+" and "-" represent respectively positive vector and negative vector, under be designated as and be designated as leading 36 ° of 0 vector under 1 vector ratio, M represents that amplitude is 0.6472V DCVector MV 2, L represents that amplitude is 1.2944V DCVector LV 2
Be positioned at the 1st III zone, sector as example take reference vector, the order of vector effect (showing with the level combination table) is: PPOOP → PPOOO → PPNNN → OONNN → OONNO → OONNN → PPNNN → PPOOO → PPOOP, find out that from this sequence the variation of every phase level followed the order of P → O → N or N → O → P, and total on-off times is minimum.
The principle that the sequence of operation of the described three basic resultant vector of present embodiment is followed is:
1) realize that the on-off times that on off state changes is minimum, with the energy loss that reduces to bring because of switch motion;
2) change of level should keep the order of P → O → N or N → O → P, avoids using the order of P → N or N → P, can reduce like this mutation rate of output voltage, reduces the harmonic wave of output voltage, keeps the advantage of neutral point clamped multi circuit;
3) output waveform should keep symmetrical.
The method of the sequence of operation of three basic resultant vector is also considered the impact of different vector alignment current potentials.Analyze basic resultant vector as can be known, 0 vector LV 2There is not the midpoint potential problem in set of vectors, and MV 2There is the midpoint potential imbalance problem in set of vectors.Wherein, the vector MV that has identical argument 2Occur in pairs, claim to contain in the level combination vector MV of " P " 2Be positive vector, contain the vector MV of " N " in the level combination 2Be negative vector.If action time is identical, the impact of their alignment current potentials is just in time cancelled out each other.Therefore, must use in pairs the vector MV with identical argument 2, and guarantee that positive negative vector is identical total action time.
The start pulse signal of 7 groups of IGBT switches of the present invention can only just can be realized the control to switching device with the two-way pwm signal of 7 groups of complementations.At first switch is divided into 7 groups, is respectively S 1~S 2, S 3~S 4, S ap~S an, S bp~S bn, S cp~S cn, S dp~S dn, S ep~S enBecause control signal is complementary, when the historical facts or anecdotes border produces control signal, every group only need generate wherein one the tunnel, and another road signal obtains by the signal negate that has generated.Represent one group of control signal with 7 bits, the Senior Two position is two Buck level contactor pipe S 1, S 4Control signal, 1 expression is open-minded, 0 expression is turn-offed.As shown in Table 1.The combination 11,01,00,10 of Senior Two position corresponds respectively to the port level combination on table one right side.For two level inverse conversion level circuit, every " P " or " O " two kinds of level that only occur when going up mutually the brachium pontis conducting, every " O " or " N " two kinds of level that only occur when descending mutually the brachium pontis conducting.According to these characteristics, can draw the switch combination of one group of control signal.For example, be combined as OONNO if will generate level, PPNNP, the basic vector of PPPOO, control signal combination [S 1S 4S apS bpS cpS dpS ep] should be 0111001,1111001,1011100.

Claims (10)

1. the five phase three-level voltage source inverters of simplifying is characterized in that, it is by the two Buck level circuit (1) of three level, two level voltage type inverse cascade circuit (2), DC power supply (3), capacitor C 1And capacitor C 2Form,
Capacitor C 1And capacitor C 2In parallel with two outputs of DC power supply 3 after series connection, described capacitor C 1And capacitor C 2Capacitance identical, the first input end (P) of the two Buck level circuit (1) of three level is connected with the positive pole of DC power supply (3), the second input and the capacitor C of three level pair Buck level circuit (1) 1And capacitor C 2Link (O) be connected, the 3rd input (N) of the two Buck level circuit (1) of three level is connected with the negative pole of DC power supply (3), first output (P_vin) of the two Buck level circuit (1) of three level is connected with the first input end of two level voltage type inverse cascade circuit (2), second output (N_vin) of the two Buck level circuit (1) of three level is connected with the second input of two level voltage type inverse cascade circuit (2), two level voltage type inverse cascade circuit (2) output output reference voltages.
2. five phase three-level voltage source inverters of simplification according to claim 1, is characterized in that, the two Buck level circuit (1) of described three level are by four IGBT switch (S 1, S 2, S 3And S 4) form a described IGBT switch (S 1) collector electrode as the first input end (P) of the two Buck level circuit (1) of three level, an IGBT switch (S 1) emitter and the 2nd IGBT switch (S 2) collector electrode be connected after as first output (P_vin) of the two Buck level circuit (1) of three level, the 2nd IGBT switch (S 2) emitter and the 3rd IGBT switch (S 3) collector electrode be connected, and this link is as the second input of the two Buck level circuit (1) of three level, the 3rd IGBT switch (S 3) emitter and the 4th IGBT switch (S 4) collector electrode be connected as second output (N_vin) of the two Buck level circuit (1) of three level, described the 4th IGBT switch (S 4) emitter as the 3rd input of the two Buck level circuit (1) of three level.
3. five phase three-level voltage source inverters of simplification according to claim 2, is characterized in that, four IGBT switch (S of the two Buck level circuit (1) of described three level 1, S 2, S 3And S 4) state and two level V of two outputs outputs of the two Buck level circuit (1) of described three level P_inV and V N_invBetween relation as shown in Table 1:
Table one
Figure FDA00002859981800011
V in table DCThe expression capacitor C 1The voltage magnitude at two ends.
4. five phase three-level voltage source inverters of simplification according to claim 1, is characterized in that, described two level voltage type inverse cascade circuit (2) are the Five-phase inverter circuit.
5. based on the vector control method of five phase three-level voltage source inverters of simplification claimed in claim 1, it is characterized in that, the detailed process of described method is:
Step 1: judgement current time reference voltage vector residing sector, remember that this sector is the i sector, i is the natural number between 1 to 10;
Step 2: according to nearest three vector principles, the i sector is divided into 5 zones, is designated as respectively the I district, the II district, the III district, the IV district, the V district, the zone under judgement current time reference voltage vector, and remember that this zone is the j district, j is I, II, III, IV or V;
Step 3: according to nearest three vector principles, by definite three basic resultant vector corresponding to j district's selection of step 2;
Step 4: calculation procedure 3 obtains the action time of three basic resultant vector;
Step 5: the action time of the three basic resultant vector that obtains according to step 4 and the sequence of operation of three basic resultant vector to simplify five mutually 7 groups of switches of three-level voltage source inverter carry out vector control.
6. vector control method according to claim 5, is characterized in that, the formation method of described step 1 described sector is: 93 basic resultant vectors of Five-phase inverter circuit are divided into 7 groups according to amplitude, are respectively 0 vector, amplitude is 0.2472V DCVector, amplitude be 0.4V DCVector, amplitude be 0.4944V DCVector, amplitude be 0.6472V DCVector, amplitude be 0.8V DCThe vector amplitude be 1.2944V DCVector,
Be 0.6472V with 0 vector, amplitude DCThe vector amplitude be 1.2944V DCVector as effective work vector, carry out Space vector modulation,
Effectively the work vector is divided into 10 36 ° of sectors with the space, is numbered respectively 1,2 ..., 10, it is 0.6472V that all there is amplitude each sector DCThe vector amplitude be 1.2944V DCVector, the argument between adjacent vector is poor is 36 °.
7. vector control method according to claim 6, it is characterized in that, the method for the described judgement reference voltage vector of described step 1 residing sector is: the cartesian component by current reference voltage vector judges reference voltage residing sector.
8. vector control method according to claim 7, it is characterized in that, described cartesian component by the current time reference voltage vector to the method that reference voltage residing sector judges is: the cartesian component V that decomposes or directly provide reference voltage vector by rectangular coordinate αAnd V β, basis then
A 0=V βcot(36°)-V α
A 1=V βcot(72°)-V α
A 2=-V βcot(36°)-V α
A 3=-V βcot(72°)-V α
Calculate and judge reference voltage vector residing sector,
Work as V β>0 o'clock, the residing sector number of reference voltage vector was N=1+A 0+ a 1+ A 2+ A 3
Work as V β<0 o'clock, the residing sector number of reference voltage vector was N=6-(A 3+ A 2+ A 1+ A 0).
9. vector control method according to claim 5, is characterized in that, the method in the zone under the described judgement reference voltage vector of described step 2 is positioned at is:
With amplitude 0.6472V DCFor unit carries out normalization to reference voltage vector, establish that the amplitude of reference voltage vector is V after normalization ref, phase angle is θ, ∠ ACG is α,
There is tan α=3tan18 ° according to geometrical relationship, and following 4 conditional combinations are arranged
Rule of judgment 1: note
l 0=θ-18°
l 0>0 is true, otherwise is false;
Rule of judgment 2: note
l 1=V refcosl 0-cos18°
l 1>0 is true, otherwise is false;
Rule of judgment 3: note
Figure FDA00002859981800031
l 2>0 is true, otherwise is false;
Rule of judgment 4: note
l 3=V refsinl 0-l 2tanα
l 3>0 is true, otherwise is false,
If above condition very is designated as 1, vacation is designated as 0, by combination binary number l 0l 1l 2l 3Judge the zone that reference voltage vector is positioned at affiliated sector:
I zone: l 0l 1l 2l 3=0000,0001,1000,1001},
II zone: l 0l 1l 2l 3=0100,0101,0111},
III zone: l 0l 1l 2l 3=1100,1101,1111},
IV zone: l 0l 1l 2l 3=0110},
V zone: l 0l 1l 2l 3={ 1111}.
10. vector control method according to claim 5, it is characterized in that, the sequence of operation of the described three basic resultant vector of described step 5 is: the vector sequence of operation of zones of different in the odd number sector, as shown in Table 2, the vector sequence of operation of zones of different in the even number sector, as shown in Table 3
Table two
Figure FDA00002859981800041
Table three
Figure FDA00002859981800042
Figure FDA00002859981800051
Wherein subscript "+" and "-" represent respectively positive vector and negative vector, under be designated as and be designated as leading 36 ° of 0 vector under 1 vector ratio, M represents that amplitude is 0.6472V DCVector MV 2, L represents that amplitude is 1.2944V DCVector LV 2
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