CN103117287A - Non-refrigerating film infrared focal plane array detector structure and production method thereof - Google Patents
Non-refrigerating film infrared focal plane array detector structure and production method thereof Download PDFInfo
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- CN103117287A CN103117287A CN2013100304290A CN201310030429A CN103117287A CN 103117287 A CN103117287 A CN 103117287A CN 2013100304290 A CN2013100304290 A CN 2013100304290A CN 201310030429 A CN201310030429 A CN 201310030429A CN 103117287 A CN103117287 A CN 103117287A
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Abstract
A non-refrigerating film infrared focal plane array detector structure comprises a first substrate provided with reading circuits, and a second substrate provided with thermal isolation microbridge arrays and sensitive element arrays. The first substrate and the second substrate are integrally bonded. The etched second substrate serves as a pier for each thermal isolation microbridge unit in the thermal isolation microbridge arrays, and a support layer tightly attached to the top of the pier serves as a deck. The deck of each thermal isolation microbridge unit is provided with one sensitive element array. Each sensitive element array is electrically connected with the corresponding reading circuit of the first substrate through a lead electrode. A production method of the non-refrigerating film infrared focal plane array detector structure includes: preparing a pattern on a bonding surface of the first substrate, preparing the support layer, preparing the sensitive element arrays, protecting the front side of the second substrate, preparing the thermal isolation microbridge arrays, bonding the first substrate and the second substrate, removing a front protective layer of the second substrate, and connecting electrodes of the sensitive element electrode reading circuits.
Description
Technical field
The invention belongs to field of microelectronic devices, particularly a kind of non-refrigeration film-type infrared focal plane array seeker structure and preparation method thereof
Background technology
Non-refrigeration film-type infrared focal plane array seeker is a kind of heat-sensitive eye spare based on the work of thermal effect principle, and its core is the responsive element array with thermoinduction ability.Can effectively improve the hot-probing ability of responsive unit by increasing heat isolation microbridge, for improving the service behaviour of responsive unit and whole detector, people constantly improve heat isolation micro-bridge structure.At present report can be divided into two large classes with the integrated film-type non-refrigerate infrared focal plane array seeker structure of reading circuit: a class is based on the sacrificial layer technology of surface micromachined technology, i.e. directly deposition of sacrificial layer, supporting layer, sensitive layer successively on the silicon chip that prepares reading circuit obtain having the detector array of heat isolation micro-bridge structure by releasing sacrificial layer after graphical; Another kind of is with the same aspect of reading circuit and responsive element array preparation at silicon chip, based on the body micromachining technology, namely adopt physics and/or the chemical methodes such as reactive ion etching, plasma etching, chemical assisting ion etching and the corrosion of anisotropy chemistry, the etching of the position at sensitivity first place being carried out to a certain degree from the back side of substrate forms a cavity, thereby forms the detector array of silica-based heat isolation micro-bridge structure in each responsive unit bottom.
In above-mentioned first kind technology, because be by deposition of sacrificial layer and Si on the reading circuit substrate surface
3N
4Supporting layer film, then graphical, and the etching sacrificial layer film to be obtaining thermal isolation micro-bridge structure, thus on technique to Si
3N
4Supporting layer has higher requirements, if the microbridge area is larger, and Si
3N
4The phenomenons such as bending, warpage may appear in film, break, the size of bridge pier and bridge leg, processing quality directly affect quality and the effect of heat insulation of microbridge, therefore preparation responsive unit on bridge floor; If sacrificial layer material is SiO
2, the etching sacrificial layer film need to use HF etc., and this destroys larger to the electric heating film performance.If sacrifice layer is polyimides, for avoiding causing the sacrifice layer coking because temperature raises in long sacrifice layer dispose procedure, needs segmentation to discharge, thereby have the defective of length consuming time.And, easily cause microbridge to damage in the deposition of follow-up sensitive layer, graphical and top electrode preparation technology.Therefore this technical matters is complicated, and technical difficulty is high, and the responsive meta structure uniformity difference that responsive element array complicated process of preparation causes also can be brought the not high defective of detector array signal of telecommunication uniformity.But this technology is because responsive element array directly prepares above reading circuit, responsive element array and reading circuit take respectively effective work area of substrate on two different aspects, therefore being conducive to the preparation of little bin, high density pixel large scale array device, is unique effective technology scheme that can improve as far as possible at present responsive first filling rate.
Above-mentioned Equations of The Second Kind technology has the relatively simple advantage of microbridge preparation technology, and the substrate etch step can be placed on the last of responsive first preparation technology, the damage that can effectively avoid responsive first manufacture craft to cause micro-bridge structure.By present dry etching technology, this technology can obtain more vertical microcavity, thereby effectively reduces the loss of heat, increases the output of test signal.But regrettably, because microbridge in this technology is positioned under responsive bin, occupied the silicon chip area suitable with the sensitive area elemental area, reading circuit can only design the both sides at responsive bin, be that reading circuit needs the effective area with responsive bin shared in common substrate, therefore responsive first filling rate is low, is only suitable for can't satisfying the preparation requirement of little bin, high density pixel large scale array device in the making of low picture element density, little array device.
Moreover the array structure that above-mentioned two class technical schemes relate to will be realized the integrated of the responsive element array of film-type and reading circuit, all requires thermally sensitive layer thin film technology temperature lower than the hot tolerable temperature (450 ℃) of reading circuit.And based on the thermo-responsive first material with high hot-probing performance of thermal effect principle work, no matter be that pyroelectric film material or vanadium oxide thermistor thin film all need in the lower crystallization of high temperature (more than 650 ℃), the bad thermo-responsive first material of crystallization does not have desirable thermo-responsive performance.Therefore, above-mentioned two class technical schemes can not be complementary with present sensitive layer material preparation technology, and the deficiency of sensitive layer material preparation technology is also just restricting the manufacturing take little bin, high density pixel large scale array as the non-refrigeration film-type of the film-type of feature infrared focal plane array seeker spare.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of novel non-refrigeration film-type infrared focal plane array seeker structure and preparation method thereof is provided, to satisfy the preparation requirement of little bin, high density pixel large scale array device, effectively improve and cause the not high defective of signal of telecommunication uniformity because responsive element array complicated process of preparation, difficulty of processing cause greatly structural homogeneity difference.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, comprise the first substrate that contains reading circuit, the second substrate that contains heat isolation microbridge array and responsive element array, described the first substrate and the second substrate are bonded to one, second substrate of each heat isolation microbridge unit in described heat isolation microbridge array after the etching is as bridge pier, take the supporting layer of combining closely with described bridge pier end face as bridge floor, the air-gap thickness of each heat isolation microbridge unit is identical with the thickness of the second substrate; Be provided with responsive element array on the bridge floor of each heat isolation microbridge unit, each responsive element array is by reading circuit realization electrical connection corresponding on lead-in wire electrode and the first substrate.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, its first substrate is silicon chip, its second substrate is two throwing face silicon chips, the first substrate and the second substrate are realized bonding by the silicon-silicon bond technology of closing, on the second substrate the bottom electrode of each responsive element array by climbing electrode fabrication fabrication techniques lead-in wire electrode respectively with the first substrate on the bottom electrode of corresponding reading circuit connect, in responsive element array top electrode of each responsive unit by climbing electrode fabrication fabrication techniques lead-in wire electrode respectively with the first substrate on the top electrode connection of corresponding reading circuit.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, the bridge floor (supporting layer) of its heat isolation microbridge unit is SiO
2Layer or Si
3N
4/ SiO
2Composite bed.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, bridge floor (supporting layer) thickness of its heat isolation microbridge unit is that 600 nm～1000nm, length x and width y are 100 μ m～1600 μ m, described length x=width y, or described length x ≠ width y; The air-gap thickness of its heat isolation microbridge unit is 120 μ m～365 μ m.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, in its heat isolation microbridge array, the line-spacing of heat isolation microbridge unit and row are apart from w 〉=50 μ m, heat isolation microbridge unit apart from the second substrate edge apart from t 〉=4500 μ m.
Non-refrigeration film-type infrared focal plane array seeker structure of the present invention, the responsive unit that forms responsive element array is at least two, and described responsive unit is made of bottom electrode, sensitive layer, top electrode and upper/lower electrode separator.Described responsive unit is shaped as square, and its area can be between 1550 μ m * 1550 μ m and 50 μ m * 50 μ m, and its sensitive layer thickness is 500 nm ~ 3000nm; In responsive element array, the line-spacing of responsive unit and row are apart from u=100 μ m ~ 725 μ m, responsive unit apart from the microbridge edge apart from v=25 μ m ~ 700 μ m.
The preparation method of non-refrigeration film-type infrared focal plane array seeker structure of the present invention, step is as follows:
1. the preparation of the first substrate bonding face figure
Silicon chip is as the first substrate, containing first substrate surface deposition one deck titanium film of reading circuit, at described titanium film superficial deposit layer of gold film, then graphical according to the electrode and the bonding face figure that design;
The first substrate using plasma that maybe will contain reading circuit strengthens deposition techniques one deck SiO
2As passivation layer, more graphical according to the electrode and the bonding face figure that design;
2. supporting layer preparation
As the second substrate, with described the second substrate two sides thermal oxidation, make its two sides all generate the SiO of one deck densification two throwing face silicon chips
2Layer is selected the wherein SiO of one side
2Layer is as supporting layer;
Or growth one deck Si on the wherein one side of the two throwing face silicon chips after Double-side hot oxygen is processed
3N
4, form Si
3N
4/ SiO
2The composite support layer; The face at supporting layer place is defined as the front of the second substrate;
3. responsive element array preparation
Make successively according to figure, size and the technological requirement of the non-refrigeration film-type infrared focal plane array seeker that designs the responsive unit that forms responsive element array on described supporting layer;
4. the protection in the second substrate front
The positive deposition of the second substrate one deck SiO of responsive element array will be prepared with
2Layer carries out front protecting;
5. the preparation of heat isolation microbridge array
Adopt dry etching technology etching microbridge figure according to microbridge figure and the size of the non-refrigeration film-type infrared focal plane array seeker that designs at the second substrate back that is shaped with responsive element array, etching depth arrives its positive supporting layer, second substrate of formation after the etching is bridge pier, heat isolation microbridge array take supporting layer as bridge floor, and forms on the bridge floor of each heat isolation microbridge unit of heat isolation microbridge array responsive element array is all arranged;
6. the bonding of the first substrate and the second substrate
The back side of adopting the silicon-silicon bond technology of closing will be prepared with the second substrate of responsive element array is bonded to one with the first substrate that is prepared with reading circuit;
7. remove the protective layer in the second substrate front;
8. responsive first electrode and reading circuit electrode is connected
By climbing electrode fabrication fabrication techniques lead-in wire electrode, with the bottom electrode of each responsive element array on the second substrate by the lead-in wire electrode respectively with the first substrate on the bottom electrode of corresponding reading circuit connect, with the top electrode of each responsive unit in responsive element array by the lead-in wire electrode respectively with the first substrate on the top electrode connection of corresponding reading circuit.
In above-mentioned non-refrigeration film-type infrared focal plane array seeker structure and preparation method thereof, the thickness of various electrodes is 10 nm ~ 1000nm, and electrode material is Al, Au, Pt, PtTi, AuPtTi or NiCr.
In above-mentioned non-refrigeration film-type infrared focal plane array seeker structure and preparation method thereof, the sensitive layer of responsive unit is (1-x) Pb (Sc
1/2Ta
1/2) O
3-xPbTiO
3(PSTT (x)), Pb
1-xLa
x(Zr
yTi
1-y) O
3(PLZT), PbTiO
3(PT), PbTiZrO
3(PZT), Pb
1-xLa
xTiO
3(PLT), Ba
1-xSr
xTiO
3(BST), the single or multiple lift film of BST/LNO, PT/PbO, PZT/PbO, PLT/PbO, PLZT/PbO or PSST/PbO material, or the multilayer film of above-mentioned multiple material.
In the preparation method of above-mentioned non-refrigeration film-type infrared focal plane array seeker structure, the silicon-silicon bond technology of closing of using can be that the gold-silicon eutectic silicon-silicon bond closes technology, and the hydrophilic low temperature silicon of wet method-silicon bonding technology, plasma activation are processed a kind of in low temperature silicon-Si direct bonding technique, vacuum and low temperature silicon-Si direct bonding technique and ultraviolet light auxiliary surface activation hydrophobic silicon-silicon bonding technology.The lithographic technique that uses can be a kind of independent in reactive ion etching, plasma etching, chemical assisting ion etching and anisotropy chemistry corrosion technology use or wherein two kinds be used alternatingly.
Compared with prior art, the invention has the beneficial effects as follows:
1, the responsive unit due to non-refrigeration film-type infrared focal plane array seeker structure of the present invention is produced on two silicon chips with reading circuit, having removed sensitive material can not heat treated restriction in higher than 450 ℃ of environment, make existing sensitive material technology of preparing and array structure device preparation technology of the present invention compatible, can obtain the responsive element array of detector of high thermoelectricity capability.
2, because adopting bulk micromachining, technical solution of the present invention makes the large tracts of land microbridge, make a plurality of bins (responsive unit) can share a microbridge bridge floor, greatly improve the consistency of responsive unit and micro-bridge structure, thereby significantly improved the uniformity of detector array electricity output signal.
3, responsive element array and the reading circuit due to non-refrigeration film-type infrared focal plane array seeker structure of the present invention is produced on two silicon chips, responsive element array does not need to share with reading circuit the substrate work area, satisfy the preparation requirement of little bin, high density pixel large scale array device, can obtain the highest filling rate under the condition that prior art allows.
4, adopt the microbridge air-gap of technical solution of the present invention making than microbridge air-gap (2～5 μ m) size larger (120～365 μ m) of existing sacrificial layer technology making, thereby have better hot isolation effect, improved better the thermal response characteristics of detector array.
5, in the preparation of non-refrigeration film-type infrared focal plane array seeker structure of the present invention, the substrate etch step can be placed on the last of responsive first preparation technology, the damage that can effectively avoid responsive first manufacture craft to cause micro-bridge structure.
Description of drawings
Fig. 1 is the heat isolation microbridge cellular construction schematic diagram that contains responsive element array of non-refrigeration film-type infrared focal plane array seeker structure of the present invention.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is the schematic diagram of the heat isolation microbridge array of non-refrigeration film-type infrared focal plane array seeker structure of the present invention.
In figure, the bottom electrode of the top electrode of the bottom electrode of the 1-the first substrate, the 2-the second substrate, 3-supporting layer (bridge floor), 4-sensitivity unit, 5-sensitive layer, 6-sensitivity unit, 7-upper/lower electrode separator, 8-lead-in wire electrode, 9-reading circuit, the top electrode, 11 of 10-reading circuit-heat are isolated the air-gap of microbridge unit.
Embodiment
Below by embodiment, non-refrigeration film-type infrared focal plane array seeker structure of the present invention and preparation method thereof is described further.
In the present embodiment, non-refrigeration film-type infrared focal plane array seeker structure comprises the first substrate 1 that contains reading circuit, the second substrate 2 that contains heat isolation microbridge array and responsive element array, described the first substrate 1 and the second substrate 2 close the technical key integrator by silicon-silicon bond, second substrate 2 of each heat isolation microbridge unit in described heat isolation microbridge array after the etching is as bridge pier, take the supporting layer 3 of combining closely with described bridge pier end face as bridge floor, air-gap 11 thickness of each heat isolation microbridge unit are identical with the thickness of the second substrate, as shown in Figure 1 and Figure 2; The first substrate 1 is silicon chip, and the second substrate 2 is two throwing face silicon chips, and bridge floor (supporting layer 3) is SiO
2Layer.Described heat isolation microbridge array is comprised of 4 * 3 identical heat isolation microbridge unit, the described heat isolation distribution of microbridge unit on the second substrate 2 as shown in Figure 3, each heat is isolated length x=400 μ m, the width y=400 μ m of microbridge unit, bridge floor thickness is 600 nm, air-gap 11 thickness are 365 μ m, in heat isolation microbridge array, the line-spacing of heat isolation microbridge unit and row are apart from w=50 μ m, heat isolation microbridge unit apart from the second substrate edge apart from t=4500 μ m.Be provided with identical responsive element array on the bridge floor of each heat isolation microbridge unit.Responsive element array on each heat isolation microbridge unit bridge floor is comprised of 3 * 3 identical responsive units, distribution on heat isolation microbridge unit as shown in Figure 2, each responsive unit is shaped as square, its area is 50 μ m * 50 μ m, in responsive element array, the line-spacing of responsive unit and row are apart from u=100 μ m, responsive unit apart from the microbridge edge apart from v=25 μ m.Described responsive unit is made of bottom electrode 4, sensitive layer 5, top electrode 6 and upper/lower electrode separator 7, and its bottom electrode 4 is made by PtTi, and thickness is 250nm, its sensitive layer 5 is made by BST/LNO, thickness is 2500nm, and top electrode 6 is made by NiCr, and thickness is that 10nm upper/lower electrode separator 7 is by SiO
2Make, thickness is 300nm.The bottom electrode of each responsive element array by climbing electrode fabrication fabrication techniques lead-in wire electrode 8 respectively with the first substrate on the bottom electrode 9 of corresponding reading circuit connect, in responsive element array top electrode 6 of each responsive unit by climbing electrode fabrication fabrication techniques lead-in wire electrode 8 respectively with the first substrate on top electrode 10 connections of corresponding reading circuit.Described lead-in wire electrode 8 is made by AuPtTi, and thickness is that top electrode 10 and the bottom electrode 9 of 400nm, reading circuit made by PtTi, and thickness is 250nm.
Embodiment 2
In the present embodiment, non-refrigeration film-type infrared focal plane array seeker structure comprises the first substrate 1 that contains reading circuit, the second substrate 2 that contains heat isolation microbridge array and responsive element array, described the first substrate 1 and the second substrate 2 close the technical key integrator by silicon-silicon bond, second substrate 2 of each heat isolation microbridge unit in described heat isolation microbridge array after the etching is as bridge pier, take the supporting layer 3 of combining closely with described bridge pier end face as bridge floor, air-gap 11 thickness of each heat isolation microbridge unit are identical with the thickness of the second substrate; The first substrate 1 is silicon chip, and the second substrate 2 is two throwing face silicon chips, and bridge floor (supporting layer 3) is SiO
2/ Si
3N
4Composite bed.Described heat isolation microbridge array is comprised of 8 * 8 identical heat isolation microbridge unit, each heat is isolated length x=1600 μ m, the width y=1600 μ m of microbridge unit, bridge floor thickness is 1000 nm, air-gap 11 thickness are 365 μ m, in heat isolation microbridge array, the line-spacing of heat isolation microbridge unit and row are apart from w=170 μ m, heat isolation microbridge unit apart from the second substrate edge apart from t=4500 μ m.Be provided with identical responsive element array on the bridge floor of each heat isolation microbridge unit.Responsive element array on each heat isolation microbridge unit bridge floor is comprised of 11 * 11 identical responsive units, each responsive unit is shaped as square, and its area is 50 μ m * 50 μ m, in responsive element array, the line-spacing of responsive unit and row are apart from u=100 μ m, responsive unit apart from the microbridge edge apart from v=25 μ m.Described responsive unit is made of bottom electrode 4, sensitive layer 5, top electrode 6 and upper/lower electrode separator 7, and its bottom electrode 4 is made by PtTi, and thickness is 250nm, its sensitive layer 5 is made by PZT/PbO, and thickness is 1500nm, and top electrode 6 is made by NiCr, thickness is 10nm, and upper/lower electrode separator 7 is by SiO
2Make, thickness is 300nm.The bottom electrode of each responsive element array by climbing electrode fabrication fabrication techniques lead-in wire electrode 8 respectively with the first substrate on the bottom electrode 9 of corresponding reading circuit connect, in responsive element array top electrode 6 of each responsive unit by climbing electrode fabrication fabrication techniques lead-in wire electrode 8 respectively with the first substrate on top electrode 10 connections of corresponding reading circuit.Described lead-in wire electrode 8 is made by AuPtTi, and thickness is that top electrode 10 and the bottom electrode 9 of 400nm, reading circuit made by PtTi, and thickness is 250nm.
The present embodiment is the method for the described non-refrigeration film-type infrared focal plane array seeker structure of Preparation Example 1, and step is as follows:
The preparation of (1) first substrate bonding face figure
With silicon chip as the first substrate 1, titanium film at the first substrate 1 surface deposition thick layer 30nm that contains reading circuit, at the golden film of described titanium film superficial deposit thick layer 120nm, then according to the electrode and the bonding face figure litho pattern that design, realize the graphical of bonding face;
(2) supporting layer preparation
As the second substrate 2, with described the second substrate two sides thermal oxidation, make its two sides all generate the SiO of the thick densification of one deck 600nm two throwing face silicon chips
2Layer; Wherein one side is as supporting layer 3 in selection, and this face is defined as the front of the second substrate;
(3) responsive element array preparation
1. carry out front mark etching
With the front of the second substrate, carry out successively gluing (positive photoresist AZ6130), front baking (100 ℃, 10 minutes), exposure (14 seconds), rear baking (100 ℃, 10 minutes), (14 seconds), the post bake technique (110 ℃, 20 minutes) of developing, plasma etching SiO
2Layer removes photoresist to the Si substrate;
2. again carry out positive photoetching, make the hearth electrode figure
Carry out successively (105 ℃ of gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear bakings, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing, evaporation electrode (Ti50nm, Pt200nm), peel off and remove photoresist;
3. adopt magnetron sputtering or collosol and gel film technique to prepare the BST/LNO sensitive layer in the front, thickness is 2200nm/300nm;
4. again carry out positive photoetching, and make responsive element pattern
Carry out successively (100 ℃ of gluing (positive photoresist AZ6130), front bakings, 10 minutes), (100 ℃ of exposure (14 seconds), rear bakings, 10 minutes), (110 ℃ of develop (14 seconds), post bake techniques, 20 minutes), adopt the method for wet etching that the BST/LNO sensitive layer is graphical, then use washed with de-ionized water, stripper is removed photoresist with photoresist again, further use washed with de-ionized water, then dry, obtain being of a size of the responsive element array of 50 * 50 μ m, responsive first line-spacing and row are apart from being 100 μ m;
5. the SiO between upper/lower electrode
2The separator preparation
Using plasma strengthens chemical vapour deposition technique at the thick SiO of front deposition one deck 300nm
2Layer, photoetching is carried out in the front, carries out successively gluing (positive photoresist AZ6130), front baking (100 ℃, 10 minutes), exposure (14 seconds), rear baking (100 ℃, 10 minutes), (14 seconds), the post bake technique (110 ℃, 20 minutes) of developing, plasma etching SiO
2, remove photoresist;
6. again carry out positive photoetching, make the top electrode figure
Carry out successively gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear baking (105 ℃, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing evaporation electrode (NiCr, 10nm), peel off and remove photoresist;
7. again carry out positive photoetching, make the top electrode lead-in wire and make
Carry out successively (105 ℃ of gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear bakings, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing, evaporation electrode (AuPtTi, 400nm), peel off and remove photoresist;
The protection in (4) second substrate fronts
The substrate surface using plasma that is prepared with responsive unit is strengthened deposition techniques one deck amorphous SiO
2Layer carries out front protecting;
(5) preparation of heat isolation microbridge array
1. carry out back side photoetching, make the back-etching figure
Carry out successively (100 ℃ of gluing (positive photoresist AZ6130), front bakings, 10 minutes), (100 ℃ of exposure (14 seconds), rear bakings, 10 minutes), (110 ℃ of develop (14 seconds), post bake techniques, 20 minutes), adopt inductively coupled plasma lithographic technique etching microbridge figure, etching depth arrives positive SiO
2Layer removes photoresist.Form the heat isolation microbridge array that bridge floor is of a size of 400 μ m * 400 μ m, microbridge line-spacing and row are apart from being 50 μ m;
2. deoil and remove photoresist in the front;
The bonding of (6) first substrates and the second substrate
Adopt silicon-silicon bond to close technique bonding is carried out at substrate 1 and substrate 2 back sides.The first substrate and second substrate 2 of cleaning are fitted in natural environment, afterwards two substrates of pre-bonding were annealed 2 hours under 350 ℃ in annealing furnace, take out, obtain the panel detector structure that reading circuit is connected with responsive element array;
(7) etching SiO
2, remove the second substrate front protecting layer;
(8) responsive first electrode and reading circuit electrode is connected
Again carry out positive photoetching, make climbing lead-in wire electrode pattern, realize being electrically connected to of responsive element array and reading circuit.
Carry out successively gluing (negative photoresist, L-300 glue), front baking is (95 ℃, 5 minutes), (105 ℃ of exposure (55 seconds), rear bakings, 5 minutes), (110 ℃ of develop (45 seconds), post bake techniques, 20 minutes), adopt the mode evaporation electrode (AuPtTi of rotary evaporation, 400nm), peel off and remove photoresist.
Embodiment 4
The present embodiment is the method for the described non-refrigeration film-type infrared focal plane array seeker structure of Preparation Example 2, and step is as follows:
The preparation of (1) first substrate bonding face figure
With silicon chip as the first substrate 1, titanium film at the first substrate 1 surface deposition thick layer 30nm that contains reading circuit, at the golden film of described titanium film superficial deposit thick layer 120nm, then according to the electrode and the bonding face figure litho pattern that design, realize the graphical of bonding face;
(2) supporting layer preparation
As the second substrate 2, with described the second substrate two sides thermal oxidation, make its two sides all generate the SiO of the thick densification of one deck 600nm two throwing face silicon chips
2Layer; Select wherein one side conduct front, using plasma strengthens chemical vapour deposition technique at SiO
2The thick Si of deposition one deck 400nm on layer
3N
4Film is with this SiO
2/ Si
3N
4Composite bed is as supporting layer 3;
(3) responsive element array preparation
1. carry out front mark etching
With the front of the second substrate, carry out successively gluing (positive photoresist AZ6130), front baking (100 ℃, 10 minutes), exposure (14 seconds), rear baking (100 ℃, 10 minutes), (14 seconds), the post bake technique (110 ℃, 20 minutes) of developing, plasma etching SiO
2/ Si
3N
4Composite bed removes photoresist to the Si substrate;
2. again carry out positive photoetching, make the hearth electrode figure
Carry out successively (105 ℃ of gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear bakings, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing, evaporation electrode (Ti50nm, Pt200nm), peel off and remove photoresist;
3. adopt magnetron sputtering or collosol and gel film technique to prepare the PZT/PbO sensitive layer in the front, thickness is 1200nm/300nm;
4. again carry out positive photoetching, and make responsive element pattern
Carry out successively (100 ℃ of gluing (positive photoresist AZ6130), front bakings, 10 minutes), (100 ℃ of exposure (14 seconds), rear bakings, 10 minutes), (110 ℃ of develop (14 seconds), post bake techniques, 20 minutes), adopt the method for wet etching that the PZT/PbO sensitive layer is graphical, then use washed with de-ionized water, stripper is removed photoresist with photoresist again, further use washed with de-ionized water, then dry, obtain being of a size of the responsive element array of 50 * 50 μ m, responsive first line-spacing and row are apart from being 100 μ m;
5. the SiO between upper/lower electrode
2The separator preparation
Using plasma strengthens chemical vapour deposition technique at the thick SiO of front deposition one deck 300nm
2Layer, photoetching is carried out in the front, carries out successively gluing (positive photoresist AZ6130), front baking (100 ℃, 10 minutes), exposure (14 seconds), rear baking (100 ℃, 10 minutes), (14 seconds), the post bake technique (110 ℃, 20 minutes) of developing, plasma etching SiO
2, remove photoresist;
6. again carry out positive photoetching, make the top electrode figure
Carry out successively gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear baking (105 ℃, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing evaporation electrode (NiCr, 10nm), peel off and remove photoresist;
7. again carry out positive photoetching, make the top electrode lead-in wire and make
Carry out successively (105 ℃ of gluing (negative photoresist, L-300 glue), front baking (95 ℃, 5 minutes), exposure (55 seconds), rear bakings, 5 minutes), (45 seconds), the post bake technique (110 ℃, 20 minutes) of developing, evaporation electrode (AuPtTi, 400nm), peel off and remove photoresist;
The protection in (4) second substrate fronts
The substrate surface using plasma that is prepared with responsive unit is strengthened deposition techniques one deck amorphous SiO
2Layer carries out front protecting;
(5) preparation of heat isolation microbridge array
1. carry out back side photoetching, make the back-etching figure
Carry out successively (100 ℃ of gluing (positive photoresist AZ6130), front bakings, 10 minutes), (100 ℃ of exposure (14 seconds), rear bakings, 10 minutes), (110 ℃ of develop (14 seconds), post bake techniques, 20 minutes), adopt inductively coupled plasma lithographic technique etching microbridge figure, etching depth arrives positive SiO
2Layer removes photoresist.Form the heat isolation microbridge array that bridge floor is of a size of 1600 μ m * 1600 μ m, microbridge line-spacing and row are apart from being 170 μ m;
2. deoil and remove photoresist in the front;
The bonding of (6) first substrates and the second substrate
Adopt silicon-silicon bond to close technique bonding is carried out at substrate 1 and substrate 2 back sides.The first substrate and second substrate 2 of cleaning are fitted in natural environment, afterwards two substrates of pre-bonding were annealed 2 hours under 350 ℃ in annealing furnace, take out, obtain the panel detector structure that reading circuit is connected with responsive element array;
(7) etching SiO
2, remove the second substrate front protecting layer;
(8) responsive first electrode and reading circuit electrode is connected
Again carry out positive photoetching, make climbing lead-in wire electrode pattern, realize being electrically connected to of responsive element array and reading circuit.
Carry out successively gluing (negative photoresist, L-300 glue), front baking is (95 ℃, 5 minutes), (105 ℃ of exposure (55 seconds), rear bakings, 5 minutes), (110 ℃ of develop (45 seconds), post bake techniques, 20 minutes), adopt the mode evaporation electrode (AuPtTi of rotary evaporation, 400nm), peel off and remove photoresist.
The invention is not restricted to above-described embodiment, can be according to the requirement of device, the various non-refrigeration film-type infrared focal plane array seeker structure that the design claim limits.
Claims (10)
1. non-refrigeration film-type infrared focal plane array seeker structure, comprise the first substrate (1) that contains reading circuit, characterized by further comprising the second substrate (2) that contains heat isolation microbridge array and responsive element array, described the first substrate (1) is bonded to one with the second substrate (2), second substrate (2) of each heat isolation microbridge unit in described heat isolation microbridge array after the etching is as bridge pier, take the supporting layer (3) of combining closely with described bridge pier end face as bridge floor, air-gap (11) thickness of each heat isolation microbridge unit is identical with the thickness of the second substrate; Be provided with responsive element array on the bridge floor of each heat isolation microbridge unit, each responsive element array is by reading circuit realization electrical connection corresponding on lead-in wire electrode and the first substrate.
2. non-refrigeration film-type infrared focal plane array seeker structure according to claim 1, it is characterized in that described the first substrate (1) is silicon chip, described the second substrate (2) is two throwing face silicon chips, the first substrate (1) is realized bonding with the second substrate (2) by the silicon-silicon bond technology of closing, on the second substrate the bottom electrode of each responsive element array by climbing electrode fabrication fabrication techniques lead-in wire electrode respectively with the first substrate on bottom electrode (9) connection of corresponding reading circuit, in responsive element array top electrode (6) of each responsive unit by climbing electrode fabrication fabrication techniques lead-in wire electrode respectively with the first substrate on top electrode (10) connection of corresponding reading circuit.
3. described non-refrigeration film-type infrared focal plane array seeker structure according to claim 1 and 2 is characterized in that the bridge floor of described heat isolation microbridge unit is SiO
2Layer or Si
3N
4/ SiO
2Composite bed.
4. described non-refrigeration film-type infrared focal plane array seeker structure according to claim 1 and 2, the bridge floor thickness that it is characterized in that described heat isolation microbridge unit is that 600 nm～1000nm, length and width are 100 μ m～1600 μ m, described length=width, or described length ≠ width; Air-gap (11) thickness of described heat isolation microbridge unit is 120 μ m～365 μ m.
5. non-refrigeration film-type infrared focal plane array seeker structure according to claim 3, the bridge floor thickness that it is characterized in that described heat isolation microbridge unit is that 600 nm～1000nm, length and width are 100 μ m～1600 μ m, described length=width, or described length ≠ width; Air-gap (11) thickness of described heat isolation microbridge unit is 120 μ m～365 μ m.
6. described non-refrigeration film-type infrared focal plane array seeker structure according to claim 1 and 2, it is characterized in that the responsive unit that forms responsive element array is at least two, described responsive unit is made of bottom electrode (4), sensitive layer (5), top electrode (6) and upper/lower electrode separator (7).
7. non-refrigeration film-type infrared focal plane array seeker structure according to claim 3, it is characterized in that the responsive unit that forms responsive element array is at least two, described responsive unit is made of bottom electrode (4), sensitive layer (5), top electrode (6) and upper/lower electrode separator (7).
8. non-refrigeration film-type infrared focal plane array seeker structure according to claim 4, it is characterized in that the responsive unit that forms responsive element array is at least two, described responsive unit is made of bottom electrode (4), sensitive layer (5), top electrode (6) and upper/lower electrode separator (7).
9. described non-refrigeration film-type infrared focal plane array seeker structure according to claim 1 and 2, it is characterized in that in heat isolation microbridge array, the line-spacing of heat isolation microbridge unit and row are apart from w 〉=50 μ m, heat isolation microbridge unit apart from the second substrate edge apart from t 〉=4500 μ m.
10. the preparation method of a non-refrigeration film-type infrared focal plane array seeker structure, step is as follows:
1. the preparation of the first substrate bonding face figure
Silicon chip is as the first substrate (1), containing the first substrate (1) surface deposition one deck titanium film of reading circuit, at described titanium film superficial deposit layer of gold film, then graphical according to the electrode and the bonding face figure that design;
The first substrate (1) using plasma that maybe will contain reading circuit strengthens deposition techniques one deck SiO
2As passivation layer, more graphical according to the electrode and the bonding face figure that design;
2. supporting layer preparation
As the second substrate (2), with described the second substrate two sides thermal oxidation, make its two sides all generate the SiO of one deck densification two throwing face silicon chips
2Layer is selected the wherein SiO of one side
2Layer is as supporting layer;
Or growth one deck Si on the wherein one side of the two throwing face silicon chips after the hot oxygen in two sides is processed
3N
4, form Si
3N
4/ SiO
2The composite support layer;
The face at supporting layer place is defined as the front of the second substrate (2);
3. responsive element array preparation
Form the responsive first of responsive element array upper making of described supporting layer (3) successively according to figure, size and the technological requirement of the non-refrigeration film-type infrared focal plane array seeker that designs;
4. the protection in the second substrate front
The positive deposition of the second substrate (2) one deck SiO of responsive element array will be prepared with
2Layer carries out front protecting;
5. the preparation of heat isolation microbridge array
Be shaped with the second substrate (2) back side employing dry etching technology etching microbridge figure of responsive element array according to microbridge figure and the size of the non-refrigeration film-type infrared focal plane array seeker that designs, etching depth arrives its positive supporting layer (3), second substrate (2) of formation after the etching is bridge pier, heat isolation microbridge array take supporting layer as bridge floor, and forms on the bridge floor of each heat isolation microbridge unit of heat isolation microbridge array responsive element array is all arranged;
6. the bonding of the first substrate and the second substrate
The back side of adopting the silicon-silicon bond technology of closing will be prepared with second substrate (2) of responsive element array is bonded to one with the first substrate (1) that is prepared with reading circuit;
7. remove the protective layer in the second substrate front;
8. responsive first electrode and reading circuit electrode is connected
By climbing electrode fabrication fabrication techniques lead-in wire electrode, with the bottom electrode of upper each the responsive element array of the second substrate (2) by the lead-in wire electrode respectively with the first substrate on the bottom electrode (9) of corresponding reading circuit connect, with the top electrode (6) of each responsive unit in responsive element array by the lead-in wire electrode respectively with the first substrate on top electrode (10) connection of corresponding reading circuit.
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