CN103107130B - For array base palte and the manufacture method thereof of liquid crystal display, the method for etchant and formation metal wiring - Google Patents
For array base palte and the manufacture method thereof of liquid crystal display, the method for etchant and formation metal wiring Download PDFInfo
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- CN103107130B CN103107130B CN201210439379.7A CN201210439379A CN103107130B CN 103107130 B CN103107130 B CN 103107130B CN 201210439379 A CN201210439379 A CN 201210439379A CN 103107130 B CN103107130 B CN 103107130B
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Abstract
The present invention relates to the method for a kind of manufacture for the array base palte of liquid crystal display, a kind of method forming metal wiring, for the etchant of metal oxide semiconductor layer, and for the array base palte of liquid crystal display, particularly relate to the method for a kind of manufacture for the array base palte of liquid crystal display, comprising: a) on substrate, form gate electrode; B) on the substrate being formed with gate electrode, gate insulation layer is formed; C) on gate insulation layer, form the active layer be made up of metal-oxide semiconductor (MOS); D) source/drain electrodes is being formed by the active layer that metal-oxide semiconductor (MOS) is formed; And e) form the pixel electrode be connected with drain electrode, wherein c) be included on gate insulation layer and form metal oxide semiconductor layer, and using etchant etching metal oxide semiconductor layer, described etchant comprises hydrogen peroxide, fluorochemical and water.The present invention relates to a kind of method using described etchant to form metal wiring, relate to described etchant, and relate to the array base palte for liquid crystal display, described array base palte uses the method manufacture of above-mentioned manufacturing array substrate.
Description
the cross reference of related application
This application claims the interests of No. KR10-2011-0114676 that submits on November 4th, 2011 and the KR10-2011-0115356 korean patent application submitted on November 7th, 2011, at this, full content of these two sections of korean patent applications is incorporated in the application by reference.
Technical field
The present invention relates to the method for a kind of manufacture for the array base palte of liquid crystal display, a kind of method forming metal wiring, for the etchant of metal oxide semiconductor layer, and for the array base palte of liquid crystal display.
Background technology
In recent years, information display causes to be paid close attention to widely, and is increasing the demand of portable information media always, therefore, to the research of film type flat panel display (FPDs) and commercialization thereof just in force.In these FPDs, especially use the optical anisotropy of liquid crystal to have outstanding resolution, color, image quality etc. for the liquid crystal display (LCDs) of imaging, be therefore widely used in notebook display and desktop computer display.
The liquid crystal layer that described LCD comprises colored filter substrate, array base palte and is formed between colored filter substrate and array base palte.Be mainly used in the active matrix liquid crystal driving method in LCD, in the operation using amorphous silicon film transistor (a-SiTFT) as the pixel cell liquid crystal of conversion equipment, play effect.Although this a-SiTFT can use low temperature process manufacture, it has lazy flow, and can not meet constant biasing condition.By contrast, multi-crystal TFT has high fluidity, and can meet constant biasing condition, but it is difficult to guarantee uniform feature, so be unexpectedly difficult to obtain application widely, and needs high-temperature processing technology.
Therefore, the metal oxide TFT at present by using metal-oxide semiconductor (MOS) to be formed with active layer is developed, and this metal oxide semiconductor layer uses dry etching process to form pattern.But the method for this patterning, due to the use of expensive device, is therefore without nonprofit, and owing to using the plenty of time, is therefore unfavorable for producing.
[prior art reference]
[patent documentation]
(patent documentation 1) KR2010-0059587A
Therefore, the present invention is the above-mentioned defect in view of producing in correlation technique, and the object of this invention is to provide a kind of etching solution, and described etching solution makes metal oxide semiconductor layer can carry out patterning with wet etching process, thus substitutes traditional dry etching process.
Another object of the present invention is to provide a kind of etching solution, and described etching solution energy minimization is to the infringement of the gate electrode by etched metal oxide semiconductor layer lower position.
In order to realize above target, the invention provides a kind of etchant, based on the gross weight of described composition, described etchant comprises the hydrogen peroxide of 5 ~ 25wt%, the fluorochemical of 0.01 ~ 1wt% and excess water.
In addition, the invention provides a kind of method forming metal wiring, comprise: 1) on substrate, form metal oxide semiconductor layer; 2) on metal oxide semiconductor layer, optionally photosensitive material is left; And 3) use etchant etching metal oxide semiconductor layer of the present invention.
In addition, the invention provides the method for a kind of manufacture for the array base palte of liquid crystal display, comprise: a) on substrate, form gate electrode; B) on the substrate being formed with gate electrode, gate insulation layer is formed; C) on gate insulation layer, form the active layer be made up of metal-oxide semiconductor (MOS); D) source/drain electrodes is being formed by the active layer that metal-oxide semiconductor (MOS) is formed; And e) form the pixel electrode that is connected with drain electrode, wherein c) be included on gate insulation layer and form metal oxide semiconductor layer, and use etchant etching metal oxide semiconductor layer of the present invention.
In addition, the invention provides a kind of array base palte for liquid crystal display, described array base palte uses the method manufacture of above-mentioned manufacturing array substrate.
Accompanying drawing explanation
In the following detailed description and accompanying drawing, above-mentioned and other objects, features and advantages of the present invention more clearly will be understood, wherein:
Fig. 1 is showing the scanning electron microscope image (SEM) of the etchant etching metal oxide skin(coating) (IGZOx) using embodiment 4;
Fig. 2 is showing the SEM image of the etchant etching metal oxide skin(coating) (IGZOx) using described embodiment 4;
Fig. 3 is showing the SEM image of the etchant etching metal oxide skin(coating) (IGZOx) using embodiment 9;
Fig. 4 is showing the SEM image of the etchant etching metal oxide skin(coating) (IGZOx) using described embodiment 9;
Fig. 5 is showing and uses the SEM image of the etchant etching metal oxide skin(coating) (IGZOx) of comparative example 1 (comprising part not etch); And
Fig. 6 is showing and uses the SEM image of the etchant etching metal oxide skin(coating) (IGZOx) of described comparative example 1 (comprising part not etch).
Embodiment
The present invention relates to a kind of etchant for metal oxide semiconductor layer, based on the gross weight of described composition, comprise the hydrogen peroxide of 5 ~ 25wt%, the fluorochemical of 0.01 ~ 1wt% and excess water.The described etchant for metal oxide semiconductor layer can comprise the azole compounds of 0.1 ~ 5wt% further.
Metal oxide semiconductor layer of the present invention is typical metal oxide layer, is called oxide semiconductor layer or the layer for oxide semiconductor layer.Metal oxide semiconductor layer preferably comprise AxByCzO combination (wherein: A, B and C be respectively in the group being selected from and being made up of Zn, Cd, Ga, In, Sn, Hf, Zr and Ta one or more, x, y, z >=0) ternary system or quaternary system oxide semiconductor layer, be amorphous zinc oxide base semiconductor comparative optimization, be more preferably the amorphous zinc oxide base semiconductor comprising indium and gallium.
In etchant of the present invention, hydrogen peroxide (H
2o
2) in order to etching metal oxide semiconductor layer and the activity improving fluorochemical.Based on the gross weight of described composition, the amount of hydrogen peroxide is set as 5.0 ~ 25.0wt%, preferably, and 10.0 ~ 23.0wt%.If the amount of hydrogen peroxide is lower than 5.0wt%, etch capabilities may be deteriorated, and makes etching be difficult to fully carry out.By contrast, if the amount of hydrogen peroxide is higher than 25.0wt%, total rate of etch may improve, and makes restive etching process.
In etchant of the present invention, fluorochemical represents the compound producing fluorine ion at dissociation in water.Fluorochemical is the key component of etching metal oxide semiconductor layer, in order to remove the residue produced in essence in etching solution.
Based on the gross weight of described composition, the amount of fluorochemical is set to 0.01 ~ 1.0wt%, preferably, and 0.05 ~ 0.25wt%.If the amount of fluorochemical is lower than 0.01wt%, may reduce the rate of etch of metal oxide semiconductor layer, unexpectedly generating portion does not etch or residue.By contrast, if the amount of fluorochemical is higher than 1.0wt%, metal oxide semiconductor layer may be etched excessively, and causes metal oxide semiconductor layer may peel off from substrate.
For fluorochemical, any material in this area can be used, as long as it can be dissociated into fluorine ion or polyatomic fluorine ion in the solution, be not particularly limited.Fluorochemical can for being selected from by hydrofluoric acid (HF), ammonium fluoride (NH
4f), sodium fluoride (NaF), potassium fluoride (KF), ammonium acid fluoride (NH
4fHF), sodium bifluoride (NaFHF), potassium hydrogen fluoride (KFHF), fluoboric acid (HBF
4), aluminum fluoride (AlF
3), calcirm-fluoride (CaF
2) and fluosilicic acid (H
2siF
6) one or more in the group that forms.
Based on the gross weight of described composition, the amount of azole compounds is set to 0.1 ~ 5.0wt%, preferably, and 0.5 ~ 2.0wt%.If the amount of azole compounds is lower than 0.1wt%, the erosion to gate electrode may be produced.By contrast, if the amount of azole compounds is higher than 5.0wt%, prevent the effect of gate electrode erosion fine, but Financial cost may significantly increase.
Such as, azole compounds can one or more for being selected from the group that is made up of Aminotetrazole, BTA, tolyl-triazole, pyrazoles, pyrroles, imidazoles, glyoxal ethyline, 2-ethyl imidazol(e), 2-propyl imidazole, 2-aminooimidazole, 4-methylimidazole, 4-ethyl imidazol(e) and 4-propyl imidazole, but are not limited thereto.
In etchant of the present invention, water is not particularly limited, but is preferably deionized water.Useful especially is the deionized water with 18 Ω mcm resistivity (removing the degree of ion from water).In the present invention, the amount of water is set to and makes the total weight of etchant be 100wt%.
Etchant of the present invention can comprise surfactant further.Surfactant in order to reduce surface tension, thus increases the uniformity of etching.Surfactant is not particularly limited, as long as it can restrain oneself etchant of the present invention, and compatible with it.Surfactant can one or more for being selected from the group that is made up of anion surfactant, cationic surfactant, amphoteric surfactant, nonionic surface active agent and polyol surfactant.
In addition, except mentioned component, etchant of the present invention can comprise typical additive further, and this additive may comprise sequestering agent, corrosion inhibitor etc.
Hydrogen peroxide (H used in the present invention
2o
2) and fluorochemical can be prepared by conventional known method, preferably, etchant of the present invention has the purity being applicable to semiconductor technology.
Etchant of the present invention can simplify manufacture process, and increases productivity.And the penetration degree bottom metal oxide semiconductor layer is lower, therefore can not form undercutting, thus avoid the stripping of semiconductor layer.In addition, the infringement of the gate electrode below to semiconductor layer can be minimized.
In addition, the present invention relates to a kind of method using above-mentioned etchant to form metal wiring.
The method of formation metal wiring of the present invention is included in and substrate is formed metal oxide semiconductor layer, metal oxide semiconductor layer optionally stays photosensitive material and uses etchant etching metal oxide semiconductor layer.
In the method for formation metal wiring of the present invention, photosensitive material is preferably typical Other substrate materials, and conventional exposure and development can be used optionally to remain.
In addition, the present invention relates to and a kind ofly use above-mentioned etchant manufacture for the method for the array base palte of LCD.
This manufacture comprises for the method for the array base palte of LCD: a) on substrate, form gate electrode; B) on the substrate being formed with gate electrode, gate insulation layer is formed; C) on gate insulation layer, form the active layer be made up of metal-oxide semiconductor (MOS); D) source/drain electrodes is being formed by the active layer that metal oxide semiconductor material is formed; And e) form the pixel electrode be connected with drain electrode.
Wherein c) can be included on gate insulation layer and form metal oxide semiconductor layer, and use described etchant etching metal oxide semiconductor layer.
Array base palte for LCD can be thin-film transistor (TFT) array base palte.Metal oxide semiconductor layer is made up of typical metal oxide, and is called as oxide semiconductor layer or the layer for oxide semiconductor layer.Metal oxide semiconductor layer, be preferably comprise AxByCzO combination (wherein: A, B and C be respectively in the group being selected from and being made up of Zn, Cd, Ga, In, Sn, Hf, Zr and Ta one or more, x, y, z >=0) ternary system or quaternary system oxide semiconductor layer, be amorphous zinc oxide base semiconductor comparative optimization, be more preferably the amorphous zinc oxide base semiconductor comprising indium and gallium.
Better the present invention can be understood by the following embodiment for describing in detail, but, can not limitation of the present invention be interpreted as.
< prepares embodiment 1 ~ 17: prepare etchant >
Each etchant of 180kg embodiment 1 ~ 17 is prepared with group component as shown in table 1 below.
[table 1]
Note) 5-ATZ:5-Aminotetrazole
< embodiment 1 ~ 13 and comparative example 1 ~ 4: the etching > of assessment metal oxide layer
Metal oxide layer (IGZOx) is deposited on glass substrate (100mm × 100mm), then on substrate, forms the photoresist (PR) with predetermined pattern by carrying out photoetching process.Subsequently, with each etchant etching metal oxide skin(coating) in embodiment 1 ~ 13 and comparative example 1 ~ 4.
In the etch process, use fountain etching machine (ETCHER (TFT), SEME company manufactures), the temperature of etchant is at about 30 DEG C, and etching period is set to about 100 seconds.Use ESEM (manufacture of S-4700, HITACHI company) to observe by the cross-section section of etched metal oxide layer (IGZOx), the results are shown in following table 2.
[table 2]
| Etching section | Etching is linear | Residue | ||
| Embodiment 1 | Preparation embodiment 1 | ○ | ○ | Nothing |
| Embodiment 2 | Preparation embodiment 2 | ○ | ○ | Nothing |
| Embodiment 3 | Preparation embodiment 3 | ○ | ○ | Nothing |
| Embodiment 4 | Preparation embodiment 4 | ○ | ○ | Nothing |
| Embodiment 5 | Preparation embodiment 5 | ○ | ○ | Nothing |
| Embodiment 6 | Preparation embodiment 6 | ○ | ○ | Nothing |
| Embodiment 7 | Preparation embodiment 7 | ○ | ○ | Nothing |
| Embodiment 8 | Preparation embodiment 8 | ○ | ○ | Nothing |
| Embodiment 9 | Preparation embodiment 9 | ○ | ○ | Nothing |
| Embodiment 10 | Preparation embodiment 10 | ○ | ○ | Nothing |
| Embodiment 11 | Preparation embodiment 11 | ○ | ○ | Nothing |
| Embodiment 12 | Preparation embodiment 12 | ○ | ○ | Nothing |
| Embodiment 13 | Preparation embodiment 13 | ○ | ○ | Nothing |
| Comparative example 1 | Preparation embodiment 14 | △ (part does not etch) | △ (part does not etch) | Have |
| Comparative example 2 | Preparation embodiment 15 | × (part PR stripping) | × (part PR stripping) | Nothing |
| Comparative example 3 | Preparation embodiment 16 | Do not etch | Do not etch | - |
| Comparative example 4 | Preparation embodiment 17 | Do not etch | Do not etch | - |
Note) zero: good; △: general; ×: poor; Do not etch: can not etch
From table 2, all etchants in embodiment 1 ~ 13 all represent good etch capabilities.As shown in table 2, Fig. 1 and Fig. 2, in the example with the etchant etching metal oxide skin(coating) in embodiment 4, this etchant shows good etch capabilities.Equally, as shown in Figure 3 and Figure 4, in the example etched metal oxide layer (IGZOx) with the etchant in embodiment 9, described etchant shows excellent etching section with linear, and does not produce residue.
But with regard to the etchant of comparative example 1, in this etchant, the amount of hydrogen peroxide is well below above-mentioned scope, as shown in table 2, Fig. 5 and Fig. 6, etch capabilities is not fine, and generating portion is not etched.Equally, with regard to the etchant of comparative example 2, in this etchant, the amount of fluorochemical is far away higher than above-mentioned scope, because photoresist lift off makes the non-constant of etch capabilities, does not namely form pattern.The etchant of comparative example 3 and comparative example 4 all lacks the one in said components, can not be used as the etching solution of metal oxide layer (IGZOx).
< embodiment 14 ~ 19 and comparative example 5,6: assess the erosion > to layers of copper
Comment when using each etchant in embodiment 14 ~ 19 and comparative example 5,6
estimatewhen whether the layers of copper corresponding to gate electrode is etched, its result is in shown in following table 3.
[table 3]
| To the erosion (process 10min) of layers of copper | ||
| Embodiment 14 | Preparation embodiment 7 | Nothing |
| Embodiment 15 | Preparation embodiment 8 | Nothing |
| Embodiment 16 | Preparation embodiment 9 | Nothing |
| Embodiment 17 | Preparation embodiment 10 | Nothing |
| Embodiment 18 | Preparation embodiment 11 | Nothing |
| Embodiment 19 | Preparation embodiment 12 | Nothing |
| Comparative example 5 | Preparation embodiment 13 | Have |
| Comparative example 6 | Preparation embodiment 3 | Have |
As shown in table 3, use each etchant in embodiment 14 ~ 19 to comment after 10 minutes
estimatewhether layers of copper is etched, and does not produce the erosion of this etching solution.
But, in the not comparative example 6 of azole compound or the amount of azole compounds well below in the comparative example 5 of above-mentioned scope, although good to the etch capabilities of metal oxide layer, or there is the erosion to layers of copper.
As described above, the invention provides the method for a kind of manufacture for the array base palte of liquid crystal display, a kind of method forming metal wiring, for the etchant of metal oxide semiconductor layer, and for the array base palte of liquid crystal display.The manufacture process of the substrate comprising semiconductor layer can be simplified according to etchant of the present invention, and can increase productivity.In addition, the penetration degree bottom metal oxide semiconductor layer is lower, therefore can not form undercutting, thus avoids the stripping of semiconductor layer.In addition, metal oxide semiconductor layer can by etching to the erosion of grid line.
Although the invention discloses preferably specific embodiment for illustrative purposes, it will be understood by those skilled in the art that under the scope of the present invention do not departed from disclosed in claims and spirit, various amendment, interpolation and substitute be all feasible.
Claims (6)
1. manufacture a method for the array base palte being used for liquid crystal display, comprise following steps:
A) on substrate, gate electrode is formed;
B) on the described substrate being formed with gate electrode, gate insulation layer is formed;
C) on described gate insulation layer, form the active layer be made up of metal-oxide semiconductor (MOS);
D) source/drain electrodes is formed described by the active layer that metal-oxide semiconductor (MOS) is formed; And
E) pixel electrode be connected with described drain electrode is formed,
Wherein step c) be included on described gate insulation layer and form metal oxide semiconductor layer, and use etchant to etch described metal oxide semiconductor layer, based on the gross weight of described composition, described etchant is made up of the hydrogen peroxide of 5 ~ 25wt%, the fluorochemical of 0.01 ~ 1wt%, the azole compounds of 0.1 ~ 5wt% and excess water
Wherein said fluorochemical be selected from the group that is made up of ammonium fluoride, sodium fluoride, potassium fluoride, ammonium acid fluoride, sodium bifluoride, potassium hydrogen fluoride, fluoboric acid, aluminum fluoride, calcirm-fluoride and fluosilicic acid one or more,
Wherein said metal oxide semiconductor layer is the ternary system or the quaternary system oxide semiconductor layer that comprise AxByCzO combination, wherein:
A, B and C be respectively in the group being selected from and being made up of Zn, Cd, Ga, In, Sn, Hf, Zr and Ta one or more; And
x、y、z≥0。
2. the method for claim 1, the wherein said array base palte for liquid crystal display is thin-film transistor array base-plate.
3. form a method for the metal oxide semiconductor layer of covering metal distribution, comprise following steps:
The substrate being formed with metal wiring forms metal oxide semiconductor layer;
Described metal oxide semiconductor layer optionally leaves photosensitive material; And
Etchant is used to etch described metal oxide semiconductor layer, based on the gross weight of described composition, described etchant is made up of the hydrogen peroxide of 5 ~ 25wt%, the fluorochemical of 0.01 ~ 1wt%, the azole compounds of 0.1 ~ 5wt% and excess water
Wherein said fluorochemical be selected from the group that is made up of ammonium fluoride, sodium fluoride, potassium fluoride, ammonium acid fluoride, sodium bifluoride, potassium hydrogen fluoride, fluoboric acid, aluminum fluoride, calcirm-fluoride and fluosilicic acid one or more,
Wherein said metal oxide semiconductor layer is the ternary system or the quaternary system oxide semiconductor layer that comprise AxByCzO combination, wherein:
A, B and C be respectively in the group being selected from and being made up of Zn, Cd, Ga, In, Sn, Hf, Zr and Ta one or more; And
x、y、z≥0。
4., for the etchant of metal oxide semiconductor layer, based on the gross weight of described composition, be made up of the hydrogen peroxide of 5 ~ 25wt%, the fluorochemical of 0.01 ~ 1wt%, the azole compounds of 0.1 ~ 5wt% and excess water,
Wherein said fluorochemical be selected from the group that is made up of ammonium fluoride, sodium fluoride, potassium fluoride, ammonium acid fluoride, sodium bifluoride, potassium hydrogen fluoride, fluoboric acid, aluminum fluoride, calcirm-fluoride and fluosilicic acid one or more,
Wherein said metal oxide semiconductor layer is the ternary system or the quaternary system oxide semiconductor layer that comprise AxByCzO combination, wherein:
A, B and C be respectively in the group being selected from and being made up of Zn, Cd, Ga, In, Sn, Hf, Zr and Ta one or more; And
x、y、z≥0。
5. etchant as claimed in claim 4, comprises surfactant further.
6., for an array base palte for liquid crystal display, use the method manufacture described in claim 1.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2011-0114676 | 2011-11-04 | ||
| KR1020110114676A KR20130049576A (en) | 2011-11-04 | 2011-11-04 | Manufacturing method of an array substrate for liquid crystal display |
| KR1020110115356A KR20130050155A (en) | 2011-11-07 | 2011-11-07 | Manufacturing method of an array substrate for liquid crystal display |
| KR10-2011-0115356 | 2011-11-07 |
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| Publication Number | Publication Date |
|---|---|
| CN103107130A CN103107130A (en) | 2013-05-15 |
| CN103107130B true CN103107130B (en) | 2016-01-06 |
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|---|---|---|---|
| CN201210439379.7A Active CN103107130B (en) | 2011-11-04 | 2012-10-26 | For array base palte and the manufacture method thereof of liquid crystal display, the method for etchant and formation metal wiring |
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| CN (1) | CN103107130B (en) |
| TW (1) | TWI560878B (en) |
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| TWI640655B (en) * | 2013-12-23 | 2018-11-11 | 韓商東友精細化工有限公司 | Method of preparing array of thin film transistor and etchant composition for molybdenum-based metal film/metal oxide film |
| KR102091541B1 (en) * | 2014-02-25 | 2020-03-20 | 동우 화인켐 주식회사 | Preparing method for organic light emitting display device |
| KR102209685B1 (en) * | 2014-06-30 | 2021-01-29 | 동우 화인켐 주식회사 | Etching solution composition for metal layer and manufacturing method of an array substrate for Liquid crystal display using the same |
| CN105118854B (en) | 2015-07-01 | 2019-03-01 | 京东方科技集团股份有限公司 | Metal oxide semiconductor films, thin film transistor (TFT), preparation method and device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1749354A (en) * | 2004-08-25 | 2006-03-22 | 三星电子株式会社 | The etching agent composite of indium oxide layer and use its engraving method |
| CN101496183A (en) * | 2006-08-01 | 2009-07-29 | 佳能株式会社 | Oxide etching method |
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| KR101326128B1 (en) * | 2006-09-29 | 2013-11-06 | 삼성디스플레이 주식회사 | Wire for display device, etchant, thin film transistor array panel and method for manufacturing the same |
| KR101619380B1 (en) * | 2009-05-14 | 2016-05-11 | 삼성디스플레이 주식회사 | Etchant and method of array substrate using the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1749354A (en) * | 2004-08-25 | 2006-03-22 | 三星电子株式会社 | The etching agent composite of indium oxide layer and use its engraving method |
| CN101496183A (en) * | 2006-08-01 | 2009-07-29 | 佳能株式会社 | Oxide etching method |
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| TWI560878B (en) | 2016-12-01 |
| TW201324781A (en) | 2013-06-16 |
| CN103107130A (en) | 2013-05-15 |
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