CN103107108A - Method for improving quality conformity of thick film hybrid integrated circuit homogeneous bonding system - Google Patents
Method for improving quality conformity of thick film hybrid integrated circuit homogeneous bonding system Download PDFInfo
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- CN103107108A CN103107108A CN2012105373165A CN201210537316A CN103107108A CN 103107108 A CN103107108 A CN 103107108A CN 2012105373165 A CN2012105373165 A CN 2012105373165A CN 201210537316 A CN201210537316 A CN 201210537316A CN 103107108 A CN103107108 A CN 103107108A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Abstract
The invention discloses a method for improving quality conformity of a thick film hybrid integrated circuit homogeneous bonding system. One the basis of an original technology, a leveling technology for the surface of thick film bonding zones is added. The method specifically includes: precious metal polishing solution is chosen, and each bonding zone is polished through a local polisher so that surface evenness of the bonding zones is smaller than or equal to 0.1micrometer; then, by utilization of a mechanical mask method, in a high vacuum sputtering platform or a evaporating platform, a layer of an aluminum film or a layer of a nickel-chrome-aluminum composite film or a layer of a chrome-copper-aluminum composite film are formed on the surface of each bonding zone; and finally, according to the integrated technology of a regular hybrid integrated circuit, a semiconductor chip and a slice type component are integrated on a thick film substrate, bonding of the semiconductor chip is achieved by adoption of silicon-aluminum wire bonding, base pins and the substrates are bonded through gold wires, and gold-gold quality conformity bonding and aluminum-aluminum quality conformity bonding which are good in quality conformity and high in reliability are achieved. The kind of the component is widely applied, especially suitable for being used in fields of high power, high reliability and a space navigation level and the like, and has broad market prospects and application space.
Description
Technical field
The present invention relates to integrated circuit, furthermore, relate to hybrid integrated circuit, relate in particular to the thick film hybrid integrated circuit of homogeneity bonding system.
Background technology
On the ceramic substrate substrate, adopt the mode of silk screen printing, be resistance slurry with conductor paste, rutheniums such as gold paste, silver slurry or palladium-silver pastes, by the requirement of product layout design, form conduction band, stopband figure on substrate, through the high temperature sintering aftershaping.In the termination of conduction band or the place of appointment, form bonding zone, semiconductor chip assembling zone or other chip components and parts assembling zone, surface protection is carried out with glass uranium insulating barrier in all the other zones (comprising the thick film stopband).Carry out the assembling of semiconductor chip, other chip components and parts on substrate, adopting spun gold or silicon-aluminium wire to carry out bonding between chip (being generally the aluminium bonding region), conduction band (being generally gold or silver-colored bonding region), pin (being generally gold or nickel bonding region) connects, forms complete circuit and connect.The bonding system that forms thus is gold-aluminium (Au-Al), silver-aluminium (Ag-Al) or the heterogeneous bonding system of nickel-aluminium (Ni-Al), wherein, in silver conduction band, palladium-silver conduction band, easily oxidation of silver, and in long-term energising situation, easily produce ELECTROMIGRATION PHENOMENON, have a strong impact on device reliability, be usually expressed as the decline of bond strength; The gold conduction band is under large current conditions, and in the Au-Al bonding system, bonding contact area gold layer ELECTROMIGRATION PHENOMENON is obvious, easily forms " purple plague purpura " between Au-Al, and its product composition is AuAl
2, the alloy point that forms when causing the Au-Al bonding loosens and the cavityization, and final bonding force declines to a great extent; Gold-aluminium bonding system at high temperature because gold spreads in aluminium, forms between Au-Al " hickie ", and its product is Au
2Al, Au
5Al
2, Au
5Al forms the crisp and intermetallic compound (being golden aluminium compound) of insulation of one deck, and this product can make alloy point conductivity significantly reduce, and can form open circuit in the time of seriously.Therefore, adopt the hybrid integrated circuit of gold-aluminium (Au-Al), the heterogeneous bonding system production of silver-aluminium (Ag-Al) can not be applied in highly reliable occasion, the bonding quality of the heterogeneous bonding system of nickel-aluminium (Ni-Al) is relatively reliable, but compare with the homogeneity bonding system, also there is certain difference, adopts the hybrid integrated circuit of the heterogeneous bonding system production of nickel-aluminium (Ni-Al) can not be applied in aerospace level highly reliable field.
For this reason, in the prior art, the following method of normal employing solves: (1) utilizes mechanical mask, directly selectivity sputter or evaporation aluminium film in thick film substrate gold bonding district, or nickel-chromium-aluminium, chromium-copper-aluminium laminated film, to realize Jin-Jin (Au-Au), aluminium-aluminium (Al-Al) homogeneity bonding.The problem that exists is, because thick film gold conduction band surface ratio is more coarse, surface smoothness is relatively poor, therefore, poor in film gauge uniformity, film quality uniformity that its surface directly forms, cause the consistency of aluminium-aluminium (Al-Al) bonding quality relatively poor, can not guarantee that the quality of all bonding points meets the demands, adopt the finished product rate of this explained hereafter lower, reliability is difficult to improve.(2) adopt on copper sheet electronickelling or aluminium to make transition plate, it is mounted on bonding region, then carries out bonding.This method significant discomfort is used for the occasion of multikey chalaza, high density, thin space, and is same, seriously restricts consistency, the production of product quality.
Through retrieval, the Chinese patent application part that relates at present the hybrid integrated circuit bonding system only has 1, be No. ZL200910102792.2 " bonding system of high-reliability thick-film mixed integrated circuit and manufacture method thereof ", but this patent and the present invention are also irrelevant, there is no at present the application part that improves thick film hybrid integrated circuit bonding system quality conformance.
Summary of the invention
The purpose of this invention is to provide a kind of method of improving thick film hybrid integrated circuit homogeneity bonding system quality conformance, to overcome the defective of original technology, solve the quality conformance problem of homogeneity bonding system, improve the reliability of hybrid integrated circuit, can be widely used in high-end product.
the inventor is through research, discovery is due to the inherent characteristic of thick-film material and silk-screen printing technique, thick film conduction band/bonding region surface ratio is more coarse, surface smoothness is relatively poor, its roughness is usually at 2～5 μ m, and film thickness is controlled at 1～5 μ m usually, therefore, the film gauge uniformity that directly forms on its surface, the film quality uniformity is poor, cause the consistency of aluminium-aluminium (Al-Al) bonding quality relatively poor, thereby cause each homogeneity bonding system bonding pulling force, the comparison of coherence of reliability is poor, in order to realize above-mentioned target, must solve the evenness problem of bonding region field surface.
To achieve the above object of the invention, the inventor is from improving one by one the angle of each homogeneity bonding system quality conformance, adopt topochemistry mechanical polishing (CMP) method to realize, that is: after the thick-film resistor in original technique trims, is completed, before the mask deposition film, increase thick film bonding region surface evening technique, concrete grammar is: select suitable noble metal polishing fluid, by local polishing machine specialized, each bonding region is carried out polishing, make its surface smoothness in 0.1 μ m; Then, adopt the method for mechanical mask, in high vacuum sputtering unit or evaporator, at bonding region surface formation one deck aluminium film or nickel-chromium-aluminium laminated film or the chromium-copper-aluminium laminated film of polishing; At last, hybrid integrated circuit integrated technique routinely, semiconductor chip and chip components and parts are integrated on thick film substrate after processing, the bonding of semiconductor chip adopts silicon-aluminium wire bonding, adopt gold wire bonding between pin and substrate, can realize Jin-Jin that quality conformance is good, reliability is high (Au-Au), aluminium-aluminium (Al-Al) homogeneity bonding, thereby improve thick film hybrid integrated circuit homogeneity bonding system quality conformance.
The hardness of the abrasive grain of above-mentioned noble metal polishing fluid in 5GPa～50GPa scope, particle diameter≤100nm.
The thickness of above-mentioned aluminium film or nickel-chromium-aluminium laminated film or chromium-copper-aluminium laminated film is controlled at 1～5 μ m usually.
Above-mentioned mechanical mask is the method that adopts photoetching, selective corrosion or laser ablation, the bonding region figure is transferred on stainless steel metal sheet or slope Mo alloying metal sheet made.
Above-mentioned chip components and parts do not comprise semiconductor chip.
The inventive method has following characteristics: 1. by topochemistry mechanical polishing, the evenness on all bonding regions surface on thick film substrate is controlled at≤0.1 μ m, raising is in consistency, the uniformity of bonding region surface preparation aluminium film thickness and quality, improve the quality conformance of homogeneity bonding system, thereby improve reliability and the rate of finished products of thick film hybrid integrated circuit; 2. improve the bonding performance of thick film gold conduction band bonding region and silicon-aluminium wire, form highly reliable homogeneity bonding system.Improved the long-term fully ability of reliably working of thick film hybrid integrated circuit; 3. by changing the size of mechanical mask via size, can form the local aluminum bonding region on same golden conduction band bonding region, simultaneously compatible gold wire bonding (between bonding region and gold-plated pin), silicon-aluminium wire bonding (substrate bonding region and chip bonding district between), form highly reliable perfect bonding system.Such devices is widely used in the fields such as space flight, aviation, boats and ships, precision instrument, communication, Industry Control, is specially adapted to the applications such as high-power, highly reliable, aerospace level, has wide market prospects and application space.
Description of drawings
The following drawings is in order to the relatively difference of the present invention and original technology, and further illustrates the inventive method.
Fig. 1 is original a kind of integrated technology schematic diagram, Fig. 2 is original another kind of integrated technology schematic diagram, Fig. 3 is the golden conduction band/gold bonding district enlarged diagram of original technology, Fig. 4 is enlarged diagram after gold bonding district's deposit aluminium film of original technology, Fig. 5 is part of the present invention (bonding region) chemico-mechanical polishing enlarged diagram, Fig. 6 is deposit aluminium film enlarged diagram after the polishing of part of the present invention (bonding region), Fig. 7 is integrated technology schematic diagram of the present invention, Fig. 8 is original process chart, and Fig. 9 is process chart of the present invention.
In figure, 1 is Guan Ji, and 2 is base, 3 is pin nickel plating end face, and 4 is golden conduction band/gold bonding district, and 4 is semiconductor chip, 6 is the Si-Al wire lead, and 7 is stopband, and 8 is chip components and parts, 9 is ceramic substrate, 10 is pin, and 11 is the gold-plated end face of pin, and 12 is the spun gold lead, 13 is shaggy aluminium film bonding region, and 14 are the aluminium film bonding region of surfacing.
The processing step that increases for the present invention in the dotted line frame in Fig. 9.
Embodiment
Embodiment 1:
In original technology the homogeneity bonding flow process of aluminium-aluminium, Jin-Jin as shown in Figure 8, technique is as follows:
(1) ceramic substrate, gold paste material, ruthenium are the preparation of resistance slurry;
(2) substrate cleaning and oven dry, shell clean and oven dry;
(3) printing of thick film conductor paste and oven dry (150 ℃, 10min);
(4) printing of resistance slurry and oven dry (150 ℃, 10min);
(5) film forming sintering (850 ℃, 10min, total time 35min);
(6) with laser resistor trimming method adjusting resistance;
(7) parameter and functional test;
(8) glass-glazed printing and oven dry (150 ℃, 10min);
(9) sintered glass glaze (500 ℃, 10min, total time 30min);
(10) form pad (bonding region) conductor fig;
(11) adopt stainless steel substrates or slope Mo alloy sheet, utilize the method for photoetching to carry out the preparation of bonding region machinery mask;
(12) utilize mechanical mask to carry out the preparation of nickel-chromium-aluminium laminated film in the high vacuum magnetic control platform, Ni-Cr:0.6 μ m, Al:3.0 μ m;
(13) scribing separates;
(14) thick film substrate is assembled on base;
(15) assembled semiconductor chip and other discrete components;
(16) connect, complete substrate with spun gold and be connected with the circuit of gold-plated pin with the circuit of completing semiconductor chip with silicon-aluminium wire bonding;
(17) sealing cap;
(18) performance test;
(19) burn-in screen test, leak check;
(20) warehouse-in is printed, packed to production code member.
Result as shown in Figure 2, although solved the homogeneity bonding problem of aluminium-aluminium, Jin-Jin, the quality conformance of bonding system is relatively poor, product percent of pass is low, have the bad hidden danger of reliability.
Technological process of the present invention as shown in Figure 9, is modified processing route in the dotted line frame in figure:
After trimming, be completed at thick-film resistor, before the mask deposition film, increase thick film bonding region surface evening technique, the concrete technology that increases part is as follows:
(1) preparing hardness of the abrasive grain is that 25GPa ± 5GPa, particle diameter are the golden polishing fluid of 50nm ± 10nm;
(2) by local polishing machine specialized, the gold bonding district that needs carry out aluminium-aluminium bonding is carried out chemico-mechanical polishing, surface smoothness is controlled in 0.1 μ m;
(3) washed with de-ionized water, oven dry;
(4) enter thin film deposition work operation;
All the other techniques are constant, and result has solved the quality conformance problem of homogeneity bonding system as shown in Figure 7, has improved the reliability of hybrid integrated circuit.
Claims (4)
1. method of improving thick film hybrid integrated circuit homogeneity bonding system quality conformance, it is characterized in that the method is from improving one by one the angle of each homogeneity bonding system quality conformance, adopt the topochemistry mechanical polishing method to realize, that is: after the thick-film resistor in original technique trims, is completed, before the mask deposition film, increase thick film bonding region surface evening technique, concrete grammar is: select suitable noble metal polishing fluid, by local polishing machine specialized, each bonding region is carried out polishing, make its surface smoothness≤0.1 μ m; Then, adopt the method for mechanical mask, in high vacuum sputtering unit or evaporator, at bonding region surface formation one deck aluminium film or nickel-chromium-aluminium laminated film or the chromium-copper-aluminium laminated film of polishing; At last, hybrid integrated circuit integrated technique routinely, semiconductor chip and chip components and parts are integrated on thick film substrate after processing, the bonding of semiconductor chip adopts silicon-aluminium wire bonding, adopt gold wire bonding between pin and substrate, can realize quality conformance is good, reliability is high Jin-Jin, aluminium-aluminium homogeneity bonding, thereby improve thick film hybrid integrated circuit homogeneity bonding system quality conformance.
2. the method for claim 1, is characterized in that the hardness of the abrasive grain of described noble metal polishing fluid in 5GPa～50GPa scope, particle diameter≤100nm.
3. the method for claim 1, is characterized in that the THICKNESS CONTROL of described aluminium film or nickel-chromium-aluminium laminated film or chromium-copper-aluminium laminated film is at 1～5 μ m.
4. the method for claim 1, is characterized in that described mechanical mask is the method that adopts photoetching, selective corrosion or laser ablation, transfers to the bonding region figure on stainless steel metal sheet or slope Mo alloying metal sheet and makes.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106960843A (en) * | 2017-04-10 | 2017-07-18 | 北方电子研究院安徽有限公司 | A kind of domain structure of the high-power mixing integrated circuit of space flight |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070111384A1 (en) * | 2003-12-24 | 2007-05-17 | Nobuhiro Kinoshita | Method of manufacturing a semiconductor device |
| CN101673693A (en) * | 2009-09-22 | 2010-03-17 | 贵州振华风光半导体有限公司 | Bonding system of high-reliability thick-film mixed integrated circuit and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070111384A1 (en) * | 2003-12-24 | 2007-05-17 | Nobuhiro Kinoshita | Method of manufacturing a semiconductor device |
| CN101673693A (en) * | 2009-09-22 | 2010-03-17 | 贵州振华风光半导体有限公司 | Bonding system of high-reliability thick-film mixed integrated circuit and manufacturing method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106960843A (en) * | 2017-04-10 | 2017-07-18 | 北方电子研究院安徽有限公司 | A kind of domain structure of the high-power mixing integrated circuit of space flight |
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Address after: 550018 Guizhou Province, Guiyang city new North Avenue No. 238 Patentee after: Guizhou Zhenhua Fengguang Semiconductor Co.,Ltd. Address before: 550018 Guizhou Province, Guiyang city new North Avenue No. 238 Patentee before: GUIZHOU ZHENHUA FENGGUANG SEMICONDUCTOR Co.,Ltd. |