CN103094273A - Electrostatic discharge protective element - Google Patents
Electrostatic discharge protective element Download PDFInfo
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- CN103094273A CN103094273A CN2011103471370A CN201110347137A CN103094273A CN 103094273 A CN103094273 A CN 103094273A CN 2011103471370 A CN2011103471370 A CN 2011103471370A CN 201110347137 A CN201110347137 A CN 201110347137A CN 103094273 A CN103094273 A CN 103094273A
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Abstract
The invention relates to an electrostatic discharge protective element. The electrostatic discharge protective element comprises a P type basement, a plurality of second P type well areas, a plurality of first P + type doped areas and a plurality of N + type doped areas. The P type basement comprises a first P type well area, an N type well area and an N type deep well area. The plurality of second P type well areas are arranged in the N type deep well area. The plurality of N + type doped areas and the plurality of N + type doped areas are alternately arranged in the first P type well area, the N type area and the plurality of second P type well areas The first P + type doped area of the first P type well area is connected with a first connecting end of an electrical connecting element of the N type deep well area. The doped area of the first P type well area is connected with a second connecting end of an electrical connecting element of the P type basement. The plurality of second P type well areas and the plurality of first N + type doped areas inside the plurality of second P type well areas form a diode string. The diode string is connected between the first N + type doped area inside the N type well area and the second connecting end in series.
Description
Technical field
The present invention relates to a kind of protection component, particularly relate to a kind of electric static discharge protector.
Background technology
Static discharge (electrostatic discharge; ESD) cause often integrated circuit generation static overstress (electrostatic overstress) or the main cause of permanent damage; therefore the common practice is to add electric static discharge protector between core circuit (core circuit) and weld pad (pad), to prevent the infringement of static discharge.In many electric static discharge protectors; diode triggered thyristor (diode-triggered silicon controlled rectifier; DTSCR) because having lower trigger voltage and the characteristic of fast conducting, and be widely used in all types of integrated circuits.
Fig. 1 is the profile that has known diode triggered thyristor now.See also shown in Figure 1ly, diode triggered thyristor 100 comprises P type substrate 110 and is configured in p type wells district 120 and N-type wellblock 131～134 in P type substrate 110.In addition, P+ type doped region 141～145 and N+ type doped region 151～155 alternately are configured in p type wells district 120 and N-type wellblock 131～134.On being electrically connected, a plurality of diodes that are made of P+ type doped region 142～145 and N-type wellblock 131～134 are serially connected between weld pad 101 and ground connection distribution GND1 mutually.Moreover P+ type doped region 141 and N+ type doped region 151 in p type wells district 120, and the P+ type doped region 146 in P type substrate 110 all are electrically connected to ground connection distribution GND1.
By this, the layout structure of thyristor 100 can equivalence one-tenth circuit diagram as shown in Figure 2.As shown in Figure 2, diode triggered thyristor 100 comprises the silicon-control rectifying circuit that is combined by PNP transistor MP21 and NPN transistor MN2, PNP transistor MP22～MP24 and the resistance R 2 that connects into Darlington configuration (Darlington configuration).In operation, esd event can be categorized into various modes, for example: PS pattern and NS pattern.Wherein, the PS pattern is weld pad 101 input one positive pulse signal and ground connection distribution GND1 ground connection, and the NS pattern is weld pad 101 input one undersuing and ground connection distribution GND1 ground connection.When the electrostatic signal from weld pad 101 is positive pulse signal, that is the esd event of PS pattern is when occuring, and PNP transistor MP22～MP24 will contribute small electric current, the silicon-control rectifying circuit that is combined by PNP transistor MP21 and NPN transistor MN2 with triggering.By this, the positive pulse signal from weld pad 101 can be directed to ground connection distribution GND1 by silicon-control rectifying circuit.
Yet when the electrostatic signal from weld pad 101 is undersuing, that is the esd event of NS pattern is when occuring, and diode triggered thyristor 100 can't provide discharge path.In other words, diode triggered thyristor 100 does not have the electrostatic discharge protection of NS pattern, so integrated circuit must additionally arrange reverse diode D2.In addition, when core circuit 102 normal running, will be biased under forward bias voltage drop by N-type wellblock 131～134 and the formed diode string of P+ type doped region 142～145.At this moment, in diode triggered thyristor 100, the PNP transistor MP22～MP24 of equivalence will produce leakage path longitudinally, and then cause diode triggered thyristor 100 to produce huge leakage current.
In other words, diode triggered thyristor 100 can't satisfy the condition of the required low-leakage current of high-speed transfer element, and then can't be applied on the high-speed transfer element.In addition, diode triggered thyristor 100 does not have the electrostatic discharge protection of NS pattern.
This shows, above-mentioned existing diode triggered thyristor obviously still has inconvenience and defective, and demands urgently further being improved in structure and use.In order to solve the problem of above-mentioned existence, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, completed by development but have no for a long time applicable design always, and common product does not have appropriate structure to address the above problem, this is obviously the problem that the anxious wish of relevant dealer solves.Therefore how to found a kind of electric static discharge protector of new structure, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Summary of the invention
The object of the invention is; overcome the defective that existing diode triggered thyristor exists; and provide a kind of electric static discharge protector of new structure; technical problem to be solved is to make it utilize p type wells district and N+ type doped region in N-type deep-well district to form the diode string; to intercept the generation of vertical leakage path; to can be applicable on the high-speed transfer element by this, be very suitable for practicality.
Another object of the present invention is to; overcome the defective that existing diode triggered thyristor exists; and provide a kind of electric static discharge protector of new structure; technical problem to be solved is to make it utilize N-type deep-well district and the substrate of P type to form reverse diode; to have by this electrostatic discharge protection of PS pattern and NS pattern, thereby more be suitable for practicality.
The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of electric static discharge protector according to the present invention proposes has the first link and the second link, and comprises the substrate of P type, M individual the second p type wells district, an a plurality of P+ type doped region and an a plurality of N+ type doped region, and M is the integer greater than 1.The substrate of P type has the first p type wells district, N-type wellblock and N-type deep-well district.Wherein, N-type deep-well district's electric connection the first link, the substrate of P type is electrically connected the second link.Described M the second p type wells district is disposed in N-type deep-well district.These P+ type doped regions are configured in respectively in the first p type wells district, N-type wellblock and these the second p type wellses districts.These N+ type doped regions are configured in respectively in the first p type wells district, N-type wellblock and these the second p type wellses districts, and these N+ type doped regions and these P+ type doped region alternate configurations.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid electric static discharge protector, the P+ type doped region and the N+ type doped region that wherein are positioned at the first p type wells district are electrically connected to the second link.Be positioned at the P+ type doped region that a P+ type doped region of N-type wellblock and a N+ type doped region are electrically connected to respectively the first link and first the second p type wells district.A N+ type doped region in i the second p type wells district is electrically connected to the P+ type doped region in i+1 individual the second p type wells district, and the N+ type doped region in M the second p type wells district is electrically connected to the second link, and i is integer and 1≤i≤(M-1).
Aforesaid electric static discharge protector, wherein said N-type wellblock are between the first p type wells district and N-type deep-well district, and the N-type wellblock contacts with the first p type wells district, and the N-type wellblock does not contact mutually with N-type deep-well district.
Aforesaid electric static discharge protector, wherein said M the second p type wells district does not contact mutually.
Aforesaid electric static discharge protector also comprises the 2nd N+ type doped region.Wherein, the 2nd N+ type doped region is configured in N-type deep-well district, and adjacent to M the second p type wells district, and N-type deep-well district is electrically connected the first link by the 2nd N+ type doped region.
Aforesaid electric static discharge protector also comprises the 2nd P+ type doped region.Wherein, the 2nd P+ type doped region is disposed in the substrate of P type, and adjacent to N-type deep-well district, and the substrate of P type is electrically connected the second link by the 2nd P+ type doped region.
The object of the invention to solve the technical problems also realizes by the following technical solutions.A kind of electric static discharge protector according to the present invention proposes has the first link and the second link, and comprises the substrate of P type, one second p type wells district, an a plurality of P+ type doped region and an a plurality of N+ type doped region.The substrate of P type has the first p type wells district, N-type wellblock and N-type deep-well district, and wherein N-type deep-well district is electrically connected the first link, and the substrate of P type is electrically connected the second link.The second p type wells district is disposed in N-type deep-well district.This P+ type doped region is configured in respectively in the first p type wells district, N-type wellblock and the second p type wells district.These N+ type doped regions are configured in respectively in the first p type wells district, N-type wellblock and the second p type wells district, and these N+ type doped regions and these P+ type doped region alternate configurations.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid electric static discharge protector, the P+ type doped region and the N+ type doped region that wherein are positioned at the first p type wells district are electrically connected to the second link.Be arranged in the P+ type doped region that a P+ type doped region of N-type wellblock and a N+ type doped region are electrically connected to respectively the first link and the second p type wells district.A N+ type doped region that is positioned at the second p type wells district is electrically connected to the second link.
Aforesaid electric static discharge protector, wherein said N-type wellblock are between this first p type wells district and this N-type deep-well district, and this N-type wellblock contacts with this first p type wells district, and this N-type wellblock does not contact mutually with this N-type deep-well district.
Aforesaid electric static discharge protector also comprises: one the 2nd N+ type doped region, be configured in this N-type deep-well district, and adjacent to this second p type wells district, and wherein this N-type deep-well district is electrically connected this first link by the 2nd N+ type doped region.
Aforesaid electric static discharge protector also comprises: one the 2nd P+ type doped region be disposed in this P type substrate, and adjacent to this N-type deep-well district, wherein this P type substrate is electrically connected this second link by the 2nd P+ type doped region.
The present invention compared with prior art has obvious advantage and beneficial effect.By technique scheme, electric static discharge protector of the present invention has following advantages and beneficial effect at least: the present invention is arranged on N-type deep-well district in the substrate of P type, and in N-type deep-well district, the diode string that is made of p type wells district and N+ type doped region is set.In addition, N-type deep-well district is electrically connected to the first link and connects, and the substrate of P type is electrically connected to the second link.By this, when electrostatic discharge event occurs, electric static discharge protector can utilize the diode string in N-type deep-well district to trigger its inner silicon-control rectifying circuit, or its inner backward diode of conducting.In addition, when the core circuit normal running, N-type deep-well district will be connected to weld pad by the first link of element, and then be biased under reverse voltage.By this, electric static discharge protector of the present invention will have the electrostatic discharge protection of PS pattern and NS pattern simultaneously, and can be applicable on the high-speed transfer element.
In sum, the invention relates to a kind of electric static discharge protector, it comprise have the first p type wells district, the P type substrate in N-type wellblock and N-type deep-well district, a plurality of the second p type wells district, an a plurality of P+ type doped region and an a plurality of N+ type doped region.These the second p type wellses district is disposed in N-type deep-well district.These P+ type doped regions and these P+ type doped region alternate configurations are in the first p type wells district, N-type wellblock and these the second p type wellses districts.The first link of the P+ type doped region in the N-type wellblock and N-type deep-well district's electric connection element.Doped region in the first p type wells district and the substrate of P type are electrically connected the second link of element.These N+ type doped regions of these the second p type wells districts and its inside form the N+ type doped region that is serially connected in the N-type wellblock and the diode string between the second link.The present invention has significant progress technically, and has obvious good effect, is really a new and innovative, progressive, practical new design.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above and other purpose of the present invention, feature and advantage can be become apparent, below especially exemplified by preferred embodiment, and the cooperation accompanying drawing, be described in detail as follows.
Description of drawings
Fig. 1 is the profile that has known diode triggered thyristor now.
Fig. 2 is the equivalent circuit diagram that has known diode triggered thyristor now.
Fig. 3 is the profile of the electric static discharge protector of one embodiment of the invention.
Fig. 4 is the equivalent circuit diagram in order to the electric static discharge protector of key diagram 3.
100: the diode triggered thyristor
110,310:P type substrate
120,320,351～352:P type wellblock
131～134,330:N type wellblock
141～146,361～366:P+ type doped region
151～155,371～376:N+ type doped region
GND1, GND3: ground connection distribution
101,301: weld pad
102,302: core circuit
MP21～MP24, MP41～MP44:PNP transistor
MN2, MN4:NPN transistor
R2, R4: resistance
D2, D41～D44: diode
300: electric static discharge protector
TM31: the first link
TM32: the second link
The 340:N type deep well area
Embodiment
Reach for further setting forth the present invention technological means and the effect that predetermined goal of the invention is taked; below in conjunction with accompanying drawing and preferred embodiment; its embodiment of electric static discharge protector, structure, feature and effect thereof to foundation the present invention proposes are described in detail as follows.
Relevant aforementioned and other technology contents of the present invention, Characteristic can be known to present in the following detailed description that coordinates with reference to graphic preferred embodiment.By the explanation of embodiment, when can be to reach technological means and the effect that predetermined purpose takes to get one more deeply and concrete understanding to the present invention, yet appended graphic only be to provide with reference to the use of explanation, the present invention is limited.
Fig. 3 is the profile of the electric static discharge protector of one embodiment of the invention; wherein electric static discharge protector 300 has the first link TM31 and the second link TM32, and for convenience of description, same the second link TM32 is indicated in respectively and does not exist together.See also shown in Figure 3ly, electric static discharge protector 300 comprises P type substrate 310, p type wells district 320, N-type wellblock 330, N-type deep-well district 340, a plurality of p type wellses district 351～353, a plurality of P+ type doped region 361～366 and a plurality of N+ type doped region 371～376.
In configuration, p type wells district 320, N-type wellblock 330 and N-type deep-well district 340 are disposed in P type substrate 310.In addition, N-type wellblock 330 is between p type wells district 320 and N-type deep-well district 340.N-type wellblock 330 contacts with p type wells district 320, and N-type wellblock 330 does not contact mutually with N-type deep-well district 340.Moreover p type wells district 351～353 is disposed in N-type deep-well district 340, and p type wells district 351～353 does not contact mutually.
On the other hand, p type wells district 320, N-type wellblock 330 and the p type wells district 351～353 that is disposed in N-type deep-well district 340 comprise a P+ type doped region and a N+ type doped region separately, for example: dispose P+ type doped region 361 and N+ type doped region 371 in p type wells district 320, dispose P+ type doped region 362 and N+ type doped region 372 in N-type wellblock 330.In addition, be arranged in the P+ type doped region 361～365 and N+ type doped region 371～375 alternate configurations in p type wells district 320, N-type wellblock 330 and p type wells district 351～353.
On being electrically connected, the P+ type doped regions 361 in p type wells district 320 are electrically connected to the second link TM32 with N+ type doped regions 371.P+ type doped region 362 in N-type wellblock 330 and N+ type doped region 372 are electrically connected to respectively the interior P+ type doped region 363 in the first link TM31 and p type wells district 351.For the doped region in p type wells district 351～353, N+ type doped region 373 is electrically connected to P+ type doped region 364, and N+ type doped region 374 is electrically connected to P+ type doped region 365, and N+ type doped region 375 is electrically connected to the second link TM32.
In addition, N+ type doped region 376 is configured in N-type deep-well district 340, and adjacent to p type wells district 353.Moreover N+ type doped region 376 is electrically connected to the first link TM31.In other words, N-type deep-well district 340 can be electrically connected to the first link TM31 by N+ type doped region 376.On the other hand, P+ type doped region 366 is disposed in P type substrate 310, and adjacent to N-type deep-well district 340.In addition, P+ type doped region 366 is electrically connected to the second link TM32.In other words, P type substrate 310 can be electrically connected to the second link TM32 by P+ type doped region 366.
Fig. 4 is the equivalent circuit diagram in order to the electric static discharge protector of key diagram 3.Please consult simultaneously Fig. 3 and shown in Figure 4; in practical application; the two ends TM31 of electric static discharge protector 300 and TM32 can be connected to respectively the weld pad 301 and ground connection distribution GND3 in integrated circuit, and the infringement of electric static discharge protector 300 in order to avoid electrostatic discharge event that core circuit 302 is caused.With regard to layout structure, N+ type doped region 371, p type wells district 320 and N-type wellblock 330 will form horizontal NPN transistor MN4, and P+ type doped region 362, N-type wellblock 330 and P type substrate 310 will form PNP transistor MP41 longitudinally.By this, NPN transistor MN4 and PNP transistor MP41 can form a silicon-control rectifying circuit.In addition, 4 of resistance R are the equivalent resistances that p type wells district 320 contributes.
Moreover p type wells district 351, N-type deep-well district 340 and P type substrate 310 will form PNP transistor MP42 longitudinally.Similarly, p type wells district 352, N-type deep-well district 340 and P type substrate 310 will form PNP transistor MP43 longitudinally, and p type wells district 353, N-type deep-well district 340 and P type substrate 310 will form PNP transistor MP44 longitudinally.On the other hand, p type wells district 351 will form diode D41 with N+ type doped region 373, and p type wells district 352 will form diode D42 with N+ type doped region 374, and p type wells district 353 and N+ type doped region 375 will form diode D43.That is p type wells district 351～353 and N+ type doped regions 373～375 in N-type deep-well district 340 will form a diode string, that is be connected in series by diode D41～D43 the diode string that forms.In addition, N-type deep-well district 340 and P type substrate 310 will form reverse diode D44.
In other words, p type wells district 320, N-type wellblock 330 and doped region 361～362 and 371～372 are mainly to consist of a silicon-control rectifying circuit, and the diode strings in N-type deep-well district 340 are to trigger described silicon-control rectifying circuit.Therefore, electric static discharge protector 300 is a kind of diode triggered thyristor (diode-triggered SCR).
In practical application, when the electrostatic signal from weld pad 301 is positive pulse signal, that is the esd event of PS pattern is when occuring, and the diode string will provide small electric current this moment, and then trigger by NPN transistor MN4 and the formed silicon-control rectifying circuit of PNP transistor MP41.By this, the positive pulse signal from weld pad 301 can be directed to by the large current path that silicon-control rectifying circuit provides ground connection distribution GND3.In addition, when the electrostatic signal from weld pad 301 is undersuing, that is the esd event of NS pattern is when occuring, and the diode D44 of this moment is conducting, so provide conducting to the path of ground connection distribution GND3 to undersuing.In other words, in practical application, electric static discharge protector 300 need not additionally to arrange a reverse diode, just has simultaneously the electrostatic discharge protection of PS pattern and NS pattern.
Moreover with regard to the layout structure of electric static discharge protector 300, the PNP transistor MP42～MP44 of equivalence can not form the Darlington configuration.In addition, the formed diode string of p type wells district and N+ type doped region is to be configured in N-type deep-well district 340, and N-type deep-well district 340 is to be electrically connected to weld pad 301.Therefore, when core circuit 302 normal running, N-type deep-well district 340 will be biased under reverse voltage, and then intercept the generation of vertical leakage path.That is when core circuit 302 normal running, the equivalent PNP transistor MP42～MP44 in electric static discharge protector 300 will can not produce leakage path.In other words, when core circuit 302 normal running, electric static discharge protector 300 can't produce huge leakage current.By this, electric static discharge protector 300 can satisfy the condition of the required low-leakage current of high-speed transfer element, and then can be applied on the high-speed transfer element.
It is worth mentioning that, the cited diode string of Fig. 3 embodiment is by 3 diode D41～the D42 serial connection forms, but it is not to limit the present invention, and this area has knows that usually the knowledgeable also can need arbitrarily according to design the composition number of change diode string.For instance, the diode strings in N-type deep-well district 340 can be connected in series by M diode and form, and M is the integer greater than 1.At this moment, N-type deep-well district 340 is interior will arrange M p type wells district.In addition, on being electrically connected, the P+ type doped region in the 1st p type wells district is electrically connected to the interior N+ type doped region 372 in N-type wellblock 330.N+ type doped region in i p type wells district is electrically connected to the P+ type doped region in i+1 p type wells district, and the N+ type doped region in M p type wells district is electrically connected to the second link TM32, and i is integer and 1≤i≤(M-1).
In addition, if be applied in low voltage operated under, the diode strings in N-type deep-well district 340 also can be made of single diode.At this moment, N-type deep-well district 340 is interior will configure single p type wells district.In addition, for single p type wells district in N-type deep-well district 340, its inner P+ type doped region is electrically connected to the N+ type doped region 372 in N-type wellblock 330, and its inner N+ type doped region is electrically connected to the second link TM32.
In sum, the present invention is arranged on N-type deep-well district in the substrate of P type, and in N-type deep-well district, the diode string that is made of p type wells district and N+ type doped region is set.By this, when electrostatic discharge event occurs, electric static discharge protector can utilize the diode string in N-type deep-well district to trigger its inner silicon-control rectifying circuit, or its inner backward diode of conducting.In addition, when the core circuit normal running, N-type deep-well district will be connected to weld pad by the first link of element, and then be biased under reverse voltage.Thus, can intercept the generation of vertical leakage path, and then suppress the generation of the leakage current of electric static discharge protector.In other words, electric static discharge protector of the present invention has the electrostatic discharge protection of PS pattern and NS pattern simultaneously, and can be applicable on the high-speed transfer element.
the above, it is only preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, although the present invention discloses as above with preferred embodiment, yet be not to limit the present invention, any those skilled in the art, within not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be not break away from the technical solution of the present invention content, any simple modification that foundation technical spirit of the present invention is done above embodiment, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (11)
1. electric static discharge protector is characterized in that it has one first link and one second link, and comprises:
One P type substrate has one first p type wells district, a N-type wellblock and a N-type deep-well district, and wherein this N-type deep-well district is electrically connected this first link, and this P type substrate is electrically connected this second link;
M the second p type wells district is disposed in this N-type deep-well district, and wherein M is the integer greater than 1;
A plurality of P+ type doped regions are configured in respectively in this first p type wells district, this N-type wellblock and those the second p type wellses districts; And
A plurality of N+ type doped regions are configured in respectively in this first p type wells district, this N-type wellblock and those the second p type wellses districts, and those N+ type doped regions and those P+ type doped region alternate configurations.
2. electric static discharge protector according to claim 1, the P+ type doped region and the N+ type doped region that it is characterized in that wherein being positioned at this first p type wells district are electrically connected to this second link, be positioned at the P+ type doped region that a P+ type doped region of this N-type wellblock and a N+ type doped region are electrically connected to respectively this first link and first the second p type wells district, a N+ type doped region in i the second p type wells district is electrically connected to the P+ type doped region in i+1 individual the second p type wells district, and the N+ type doped region in M the second p type wells district is electrically connected to this second link, i is integer and 1≤i≤(M-1).
3. electric static discharge protector according to claim 1; it is characterized in that wherein said N-type wellblock is between this first p type wells district and this N-type deep-well district; and this N-type wellblock contacts with this first p type wells district, and this N-type wellblock does not contact mutually with this N-type deep-well district.
4. electric static discharge protector according to claim 1 is characterized in that wherein those the second p type wellses districts is not connected mutually.
5. electric static discharge protector according to claim 1 characterized by further comprising:
One the 2nd N+ type doped region is configured in this N-type deep-well district, and adjacent to M the second p type wells district, and wherein this N-type deep-well district is electrically connected this first link by the 2nd N+ type doped region.
6. electric static discharge protector according to claim 1 characterized by further comprising:
One the 2nd P+ type doped region is disposed in this P type substrate, and adjacent to this N-type deep-well district, wherein this P type substrate is electrically connected this second link by the 2nd P+ type doped region.
7. electric static discharge protector is characterized in that it has one first link and one second link, and comprises:
One P type substrate has one first p type wells district, a N-type wellblock and a N-type deep-well district, and wherein this N-type deep-well district is electrically connected this first link, and this P type substrate is electrically connected this second link;
One second p type wells district is disposed in this N-type deep-well district;
A plurality of P+ type doped regions are configured in respectively in this first p type wells district, this N-type wellblock and this second p type wells district; And
A plurality of N+ type doped regions are configured in respectively in this first p type wells district, this N-type wellblock and this second p type wells district, and those N+ type doped regions and those P+ type doped region alternate configurations.
8. electric static discharge protector according to claim 7; the P+ type doped region and the N+ type doped region that it is characterized in that wherein being positioned at this first p type wells district are electrically connected to this second link; be arranged in the P+ type doped region that a P+ type doped region of this N-type wellblock and a N+ type doped region are electrically connected to respectively this first link and this second p type wells district, and a N+ type doped region that is positioned at this second p type wells district is electrically connected to this second link.
9. electric static discharge protector according to claim 7; it is characterized in that wherein said N-type wellblock is between this first p type wells district and this N-type deep-well district; and this N-type wellblock contacts with this first p type wells district, and this N-type wellblock does not contact mutually with this N-type deep-well district.
10. electric static discharge protector according to claim 7 characterized by further comprising:
One the 2nd N+ type doped region is configured in this N-type deep-well district, and adjacent to this second p type wells district, and wherein this N-type deep-well district is electrically connected this first link by the 2nd N+ type doped region.
11. electric static discharge protector according to claim 7 characterized by further comprising:
One the 2nd P+ type doped region is disposed in this P type substrate, and adjacent to this N-type deep-well district, wherein this P type substrate is electrically connected this second link by the 2nd P+ type doped region.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104952868A (en) * | 2015-01-23 | 2015-09-30 | 北京大学 | Grid-control PIN junction electrostatic discharge protection device triggered by diode chain |
| CN105552076A (en) * | 2016-01-21 | 2016-05-04 | 北京大学 | Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof |
| CN109950325A (en) * | 2017-12-21 | 2019-06-28 | 南亚科技股份有限公司 | Diode structure and its ESD protection circuit |
| CN110571215A (en) * | 2019-09-03 | 2019-12-13 | 深圳震有科技股份有限公司 | transient voltage suppressor based on DTSCR |
| WO2021213024A1 (en) * | 2020-04-20 | 2021-10-28 | 长鑫存储技术有限公司 | Electrostatic protection circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1466208A (en) * | 2002-07-01 | 2004-01-07 | 旺宏电子股份有限公司 | Electrostatic discharge protector and method for bipolar input pad |
| CN1607679A (en) * | 2003-10-16 | 2005-04-20 | 瑞昱半导体股份有限公司 | Diode structure in series connection with deep N well portion and method for forming same |
| US20050236674A1 (en) * | 2004-04-23 | 2005-10-27 | Nec Electronics Corporation | Electrostatic protection device |
| CN101777579A (en) * | 2009-01-12 | 2010-07-14 | 立锜科技股份有限公司 | Electrostatic protection element of isolated silicon-controlled rectifier |
-
2011
- 2011-10-31 CN CN201110347137.0A patent/CN103094273B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1466208A (en) * | 2002-07-01 | 2004-01-07 | 旺宏电子股份有限公司 | Electrostatic discharge protector and method for bipolar input pad |
| CN1607679A (en) * | 2003-10-16 | 2005-04-20 | 瑞昱半导体股份有限公司 | Diode structure in series connection with deep N well portion and method for forming same |
| US20050236674A1 (en) * | 2004-04-23 | 2005-10-27 | Nec Electronics Corporation | Electrostatic protection device |
| CN101777579A (en) * | 2009-01-12 | 2010-07-14 | 立锜科技股份有限公司 | Electrostatic protection element of isolated silicon-controlled rectifier |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104952868A (en) * | 2015-01-23 | 2015-09-30 | 北京大学 | Grid-control PIN junction electrostatic discharge protection device triggered by diode chain |
| CN104952868B (en) * | 2015-01-23 | 2018-01-23 | 北京大学 | A kind of grid-control PIN junction electrostatic discharge protector of diode chain triggering |
| CN105552076A (en) * | 2016-01-21 | 2016-05-04 | 北京大学 | Diode assist-triggered thyristor device and manufacturing method and integrated circuit thereof |
| CN105552076B (en) * | 2016-01-21 | 2018-05-01 | 北京大学 | Silicon-controlled device and its manufacture method, the integrated circuit of diode auxiliary triggering |
| CN109950325A (en) * | 2017-12-21 | 2019-06-28 | 南亚科技股份有限公司 | Diode structure and its ESD protection circuit |
| CN109950325B (en) * | 2017-12-21 | 2022-03-25 | 南亚科技股份有限公司 | Diode structure and electrostatic discharge protection circuit thereof |
| CN110571215A (en) * | 2019-09-03 | 2019-12-13 | 深圳震有科技股份有限公司 | transient voltage suppressor based on DTSCR |
| CN110571215B (en) * | 2019-09-03 | 2021-10-29 | 深圳震有科技股份有限公司 | Transient voltage suppressor based on DTSCR |
| WO2021213024A1 (en) * | 2020-04-20 | 2021-10-28 | 长鑫存储技术有限公司 | Electrostatic protection circuit |
| US11699697B2 (en) | 2020-04-20 | 2023-07-11 | Changxin Memory Technologies, Inc. | Electrostatic protection circuit |
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