CN103066096B - The manufacture method of back-illuminated type CMOS - Google Patents
The manufacture method of back-illuminated type CMOS Download PDFInfo
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- CN103066096B CN103066096B CN201310032592.0A CN201310032592A CN103066096B CN 103066096 B CN103066096 B CN 103066096B CN 201310032592 A CN201310032592 A CN 201310032592A CN 103066096 B CN103066096 B CN 103066096B
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Abstract
The invention provides a kind of manufacture method of back-illuminated type CMOS, the manufacture method of described back-illuminated type CMOS comprises: provide wafer bonding structure, and described wafer bonding structure comprises the logic wafer and pixel wafer that are bonded together; Groove is formed in described wafer bonding structure; Round and smooth process is performed to the opening of described groove; Utilize electroplating technology to fill described groove, form contact hole.In the manufacture method of back-illuminated type CMOS provided by the invention, round and smooth process is performed to the opening of described groove, the opening of described groove is made to become round and smooth, namely the opening angle of described groove is made to diminish, the speed of growth of the opening part electrodeposited coating of groove can be reduced thus, thus the phenomenon preventing groove from sealing too early, avoid in contact hole and form cavity, improve the reliability of contact hole.
Description
Technical field
The present invention relates to image sensor technical field, particularly a kind of manufacture method of back-illuminated type CMOS.
Background technology
Image sensor grows up on photoelectric technology basis, so-called image sensor, can experience optical image information exactly and convert thereof into the transducer of usable output signal.Image sensor can improve the visual range of human eye, people are made to see the microcosmos that naked eyes cannot be seen and macrocosm, see that people temporarily cannot arrive place's occurrence, see the various physics, the chemical change process that exceed naked eyes visual range, the generation evolution of life, physiology, pathology, etc.Visible image transducer plays very important effect in the culture of people, physical culture, production, life and scientific research.Can say, modern humans's activity cannot leave image sensor.
The principle that image sensor can adopt according to it and divide into charge coupled device (Charge-CoupledDevice) image sensor (that is being commonly called as CCD image sensor) and CMOS(ComplementaryMetalOxideSemiconductor) image sensor, wherein namely CMOS manufactures based on CMOS (Complementary Metal Oxide Semiconductor) (CMOS) technology.Because CMOS adopts traditional cmos circuit technique to make, therefore image sensor and the peripheral circuit required for it can be integrated, thus make CMOS have wider application prospect.
According to the difference of the position of reception light, CMOS can be divided into front illuminated CMOS and back-illuminated type CMOS, wherein, back-illuminated type CMOS is compared with front illuminated CMOS, maximum optimization part is exactly by the structural change of element internal, element input path by photosensitive layer turns direction, light can be entered from back side direct projection, avoid in front illuminated CMOS structure, light can be subject to the impact of structure between lenticule and photodiode and thickness, improve the usefulness of light receiver.
In the manufacture method of traditional back-illuminated type CMOS, logic region (logicarea) and pixel region (pixelarea) are integrated in same wafer, form device wafers (devicewafer); By described device wafers and a slide glass (carrierwafer) bonding, back side process is performed to described device wafers, forms back-illuminated type CMOS.In the manufacture method of this traditional back-illuminated type CMOS, because logic region and pixel region are integrated in same wafer, the technological requirement that logic region is many with pixel region is simultaneously different, and (degree of depth as STI is different, required STI technique is different etc.), therefore can cause complex process and uppity problem.
For this reason, prior art also been proposed a kind of manufacture method of back-illuminated type CMOS, in the method, is integrated in by logic region on a wafer, forms logic wafer; Pixel region is on another wafer integrated, form pixel wafer; By logic wafer and pixel wafer bonding, and by described logic wafer and pixel wafer interconnect, form back-illuminated type CMOS.Utilize the manufacture method of this rear a kind of back-illuminated type CMOS to form back-illuminated type CMOS, the many advantages such as chip is little, cost is low, sensor mass is high can be obtained.But, in the manufacture method of this rear a kind of back-illuminated type CMOS, the very large contact hole of depth-to-width ratio will be needed to interconnect described logic wafer and pixel wafer, wherein, the depth-to-width ratio order of magnitude of tens to (usually) of the contact hole needed for manufacture method of rear a kind of back-illuminated type CMOS comparatively before a kind of depth-to-width ratio (usually at the order of magnitude of a few ratio one) of the contact hole needed for manufacture method of back-illuminated type CMOS much bigger.
Please refer to Fig. 1, the comparison diagram of the schematic construction of the back-illuminated type CMOS that the schematic construction of its back-illuminated type CMOS formed for the manufacture method of the first back-illuminated type CMOS in prior art and the manufacture method of the second back-illuminated type CMOS are formed.As shown in Figure 1, wherein, the schematic construction of the back-illuminated type CMOS that the manufacture method that the structure A of Fig. 1 left part is the first back-illuminated type CMOS is formed; The schematic construction of the back-illuminated type CMOS that the manufacture method that the structure B of Fig. 1 right part is the second back-illuminated type CMOS is formed.For the manufacture method of the second back-illuminated type CMOS, required contact hole needs interconnect logic region and pixel region, also interconnect logic wafer and pixel wafer is namely needed, as can be seen from Figure 1, the depth-to-width ratio of required contact hole will be very large, than the depth-to-width ratio (contact hole needed for the manufacture method of the first back-illuminated type CMOS) of existing contact hole by much bigger.
The method forming described contact hole in prior art comprises: form groove, described grooves extend logic wafer and pixel wafer; Utilize electroplating technology to fill described groove, form contact hole.When forming the large contact hole of depth-to-width ratio by the method, the contact hole inside formed will produce empty (void).Concrete, please refer to Fig. 2, its transmission electron microscope (TEM) figure being the contact hole that utilizes electroplating technology to be formed in prior art.As shown in Figure 2, the contact hole utilizing existing method to be formed has cavity 1, and described cavity will reduce the reliability (reliability) of back-illuminated type CMOS.Therefore, in the manufacture process of back-illuminated type CMOS, how to avoid the cavity in contact hole to produce, the technical problem having become this area urgently to be resolved hurrily.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method of back-illuminated type CMOS, to solve in the manufacture process of existing back-illuminated type CMOS, there is in the contact hole formed the problem in cavity.
For solving the problems of the technologies described above, the invention provides a kind of manufacture method of back-illuminated type CMOS, the manufacture method of described back-illuminated type CMOS comprises:
There is provided wafer bonding structure, described wafer bonding structure comprises the logic wafer and pixel wafer that are bonded together;
Groove is formed in described wafer bonding structure;
Round and smooth process is performed to the opening of described groove;
Utilize electroplating technology to fill described groove, form contact hole.
Optionally, in the manufacture method of described back-illuminated type CMOS, the every side of opening after described round and smooth process has an arc-shaped corners.
Optionally, in the manufacture method of described back-illuminated type CMOS, the every side of opening after described round and smooth process has multiple pointed turning.
Optionally, in the manufacture method of described back-illuminated type CMOS, the cross-sectional width of the opening after described round and smooth process is 1.2 times ~ 3 times of the cross-sectional width of original opening.
Optionally, in the manufacture method of described back-illuminated type CMOS, round and smooth process is performed to the opening of described groove and comprises: utilize plasma process to bombard the opening of described groove.
Optionally, in the manufacture method of described back-illuminated type CMOS, the opening utilizing plasma process to bombard described groove comprises: utilize the plasma process of inert gas to bombard the opening of described groove.
Optionally, in the manufacture method of described back-illuminated type CMOS, utilize the plasma process of inert gas to bombard in the technique of the opening of described groove, gas flow is 30sccm ~ 200sccm.
Optionally, in the manufacture method of described back-illuminated type CMOS, utilize the plasma process of inert gas to bombard in the technique of the opening of described groove, radio-frequency power is 500W ~ 1500W.
Optionally, in the manufacture method of described back-illuminated type CMOS, the opening utilizing the plasma process of inert gas to bombard described groove comprises:
Utilize the plasma process of argon gas to bombard the opening of described groove, wherein, gas flow is 100sccm, and radio-frequency power is 800W.
Inventor finds, it is larger that electroplating technology has angle, the characteristic that the electrodeposited coating speed of growth is faster.Therefore, in existing technique, in the speed of growth of the opening part electrodeposited coating of groove faster than the inside of described groove, so very easily cause groove to seal too early, thus cause the problem in formed contact hole with cavity.And in the manufacture method of back-illuminated type CMOS provided by the invention, round and smooth process is performed to the opening of described groove, the opening of described groove is made to become round and smooth, namely the opening angle of described groove is made to diminish, the speed of growth of the opening part electrodeposited coating of groove can be reduced thus, thus the phenomenon preventing groove from sealing too early, avoid in contact hole and form cavity, improve the reliability of contact hole.
Accompanying drawing explanation
Fig. 1 is the comparison diagram of the schematic construction of the back-illuminated type CMOS that the schematic construction of the back-illuminated type CMOS that the manufacture method of the first back-illuminated type CMOS in prior art is formed and the manufacture method of the second back-illuminated type CMOS are formed;
Fig. 2 is transmission electron microscope (TEM) figure of the contact hole utilizing electroplating technology to be formed in prior art;
Fig. 3 is the process schematic utilizing electroplating technology to form contact hole in prior art;
Fig. 4 is the schematic flow sheet of the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention;
Fig. 5 a ~ 5d is the device profile schematic diagram that the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention is formed;
Fig. 6 is the transmission electron microscope figure of the contact hole that the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention obtains.
Embodiment
Be described in further detail below in conjunction with the manufacture method of the drawings and specific embodiments to the back-illuminated type CMOS that the present invention proposes.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
Inventor finds, it is larger that electroplating technology has angle, the characteristic that the electrodeposited coating speed of growth is faster.And for groove, the angle of its opening part is maximum, therefore, in existing technique, in the speed of growth of the opening part electrodeposited coating of groove faster than the inside of described groove, so very easily cause groove to seal too early, thus cause the problem in formed contact hole with cavity.Concrete, please refer to Fig. 3, it is the process schematic utilizing electroplating technology to form contact hole in prior art.As shown in Figure 3, in prior art, formed in the process of contact hole utilizing electroplating technology, the speed of growth of groove opening place electrodeposited coating is faster than the inside of groove, simultaneously whole groove structure is again the basically identical rectangular-shaped structure of cross-sectional width, therefore, cavity 1 will be had in the final contact hole formed, thus cause the reliability decrease of contact hole.
For this reason, present inventor proposes following technical scheme, concrete, please refer to Fig. 4, and it is the schematic flow sheet of the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention.As shown in Figure 4, the manufacture method of described back-illuminated type CMOS comprises:
S40: wafer bonding structure is provided, described wafer bonding structure comprises the logic wafer and pixel wafer that are bonded together;
S41: form groove in described wafer bonding structure;
S42: round and smooth process is performed to the opening of described groove;
S43: utilize electroplating technology to fill described groove, forms contact hole.
Concrete, please refer to Fig. 5 a ~ 5d, the device profile schematic diagram that the manufacture method of the back-illuminated type CMOS that it is the embodiment of the present invention is formed.
As shown in Figure 5 a, provide wafer bonding structure 50, described wafer bonding structure 50 comprises the logic wafer 51 and pixel wafer 52 that are bonded together.Wherein, described logic wafer 51 is integrated with logic region, described pixel wafer 52 is integrated with pixel region.Described logic wafer 51(comprises logic region), pixel wafer 52(comprises pixel region) and this bonding be between the two prior art, the application repeats no more this.
Then, as shown in Figure 5 b, in described wafer bonding structure 50, groove 53 is formed.Wherein, the through described logic wafer 51 of described groove 53 and pixel wafer 52.Concrete, etching technics can be performed to described wafer bonding structure 50, such as dry etch process, wet-etching technology etc., thus form groove 53 in described wafer bonding structure 50.By this process, described groove 53 is the basically identical rectangular-shaped structures of a cross-sectional width.
Then, as shown in Fig. 5 c-1, round and smooth process is performed to the opening of described groove 53, form the groove 53 ' with round and smooth opening.In the present embodiment, the every side of opening after process has an arc-shaped corners 500, thus, opening after described process will become round and smooth, its angle will diminish, thus reduce the speed of growth of opening part electrodeposited coating, namely the opening part of electrodeposited coating at groove 53 ' and the speed of growth difference of inside can be reduced, thus the phenomenon preventing groove from sealing too early, avoid forming cavity in contact hole.
In other embodiments of the invention (as shown in Fig. 5 c-2), also the every side of opening after processing can be made to have multiple pointed turning 500 ', thus, opening after described process will become round and smooth equally, its angle will diminish, thus will the speed of growth of opening part electrodeposited coating be reduced, namely can reduce the opening part of electrodeposited coating at groove and the speed of growth difference of inside, prevent the phenomenon that groove seals too early, avoid forming cavity in contact hole.
In addition, after performing round and smooth process to the opening of described groove 53, the groove 53 ' formed not only has round and smooth opening, and the cross-sectional width of this opening also will become large.The cross-sectional width of the opening after process can be 1.2 times ~ 3 times of the cross-sectional width of original opening.Thus, even if in the face of the speed of growth at the opening part electrodeposited coating of groove 53 ' is still faster than the situation of the inside of groove 53 ', the space that opening part due to groove 53 ' can be used for growing electrodeposited coating becomes large, thus also can prevent the phenomenon of groove 53 ' sealing too early, avoid forming cavity in contact hole, improve the reliability of contact hole.
Concrete, the technique opening of described groove 53 being performed to round and smooth process is realized by plasma process, namely utilizes plasma process to bombard described groove 53(Fig. 5 b) opening, thus obtain the groove 53 ' with round and smooth opening as shown in Figure 5 c.Preferably, utilize the plasma process of inert gas to bombard described groove 53(Fig. 5 b) opening.Wherein, concrete technology condition can adopt: gas flow is 30sccm ~ 200sccm, such as 30sccm, 50sccm, 70sccm, 100sccm, 120sccm, 150sccm, 170sccm, 200sccm; Radio-frequency power is 500W ~ 1500W, such as 500W, 550W, 600W, 700W, 750W, 800W, 900W, 1000W, 1100W, 1200W, 1300W, 1400W, 1500W.Due to the stable performance of inert gas, not easily react with other materials, therefore utilize the plasma process of inert gas to bombard described groove 53(Fig. 5 b) opening, the groove 53 ' with round and smooth opening of material/stable performance can be obtained.
In the present embodiment, specifically utilize the plasma process of argon gas to bombard the opening of described groove, wherein, gas flow is 100sccm, and radio-frequency power is 800W.At this, consider in existing technique, the use of argon gas is comparatively frequent, and cost is also relatively cheap, therefore adopts the plasma process of argon gas to bombard the opening of described groove; Further, be 100sccm selecting gas flow, when radio-frequency power is 800W, not only described reacting gas can be utilized fully, the waste of reacting gas can either be prevented, but also the deficiency of reacting gas can be avoided, thus improve process efficiency, reduce process costs, simultaneously, under such gas flow and radio-frequency power, the opening that shape is very round and smooth can be obtained, improve the quality of the back-illuminated type CMOS of follow-up formation.
After obtaining the groove 53 ' with round and smooth opening, then, as fig 5d, utilize electroplating technology to fill described groove 53 ', form contact hole 54.At this, due to the opening of described groove 53 ' round and smooth (angle is little) and cross-sectional width is larger, therefore after electroplating technology, the higher contact hole of reliability 54 can be obtained, concrete, avoid in contact hole and form cavity.In the present embodiment, the material utilizing electroplating technology to fill described groove 53 ' is metallic copper, and metallic copper has excellent electrical conductivity performance, and the contact hole 54 utilizing metallic copper to be formed can be good at interconnect described logic wafer 51 and pixel wafer 52.In other embodiments of the invention, other metal materials also can be used to fill described groove 53 ', such as silver, tungsten etc.
Further, please refer to Fig. 6, the transmission electron microscope figure of the contact hole that the manufacture method of the back-illuminated type CMOS that it is the embodiment of the present invention obtains.As shown in Figure 6, the contact hole reliability utilizing the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention to obtain is high, especially, avoids in contact hole and forms cavity.To this, can with further reference to Fig. 2, its transmission electron microscope figure being the contact hole that utilizes electroplating technology to be formed in prior art.Comparison diagram 6 and Fig. 2, can show the advantage that the contact hole reliability that utilizes the manufacture method of the back-illuminated type CMOS of the embodiment of the present invention to obtain is high further.
In summary, in the manufacture method of back-illuminated type CMOS provided by the invention, round and smooth process is performed to the opening of described groove, the opening of described groove is made to become round and smooth, namely make the opening angle of described groove diminish, the speed of growth of the opening part electrodeposited coating of groove can be reduced thus, thus the phenomenon preventing groove from sealing too early, avoid in contact hole and form cavity, improve the reliability of contact hole.
Foregoing description is only the description to present pre-ferred embodiments, any restriction not to the scope of the invention, and any change that the those of ordinary skill in field of the present invention does according to above-mentioned disclosure, modification, all belong to the protection range of claims.
Claims (6)
1. a manufacture method for back-illuminated type CMOS, is characterized in that, comprising:
There is provided wafer bonding structure, described wafer bonding structure comprises the logic wafer and pixel wafer that are bonded together;
Groove is formed in described wafer bonding structure;
Utilize plasma process to bombard the opening of described groove, the opening angle of described groove is diminished, every side of the opening of the described groove after plasma process bombardment has multiple pointed turning;
Utilize electroplating technology to fill described groove, form contact hole.
2. the manufacture method of back-illuminated type CMOS as claimed in claim 1, is characterized in that, the cross-sectional width of the opening of the described groove after plasma process bombardment is 1.2 times ~ 3 times of the cross-sectional width of original opening.
3. the manufacture method of the back-illuminated type CMOS as described in any one in claim 1 to 2, it is characterized in that, the opening utilizing plasma process to bombard described groove comprises: utilize the plasma process of inert gas to bombard the opening of described groove.
4. the manufacture method of back-illuminated type CMOS as claimed in claim 3, it is characterized in that, utilize the plasma process of inert gas to bombard in the technique of the opening of described groove, gas flow is 30sccm ~ 200sccm.
5. the manufacture method of back-illuminated type CMOS as claimed in claim 3, it is characterized in that, utilize the plasma process of inert gas to bombard in the technique of the opening of described groove, radio-frequency power is 500W ~ 1500W.
6. the manufacture method of back-illuminated type CMOS as claimed in claim 3, it is characterized in that, the opening utilizing the plasma process of inert gas to bombard described groove comprises:
Utilize the plasma process of argon gas to bombard the opening of described groove, wherein, gas flow is 100sccm, and radio-frequency power is 800W.
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| CN105282464B (en) * | 2015-11-26 | 2018-10-16 | 上海集成电路研发中心有限公司 | Curved surface stack imaging sensor |
| CN108257998A (en) * | 2018-01-23 | 2018-07-06 | 豪威科技(上海)有限公司 | CMOS image sensor and its manufacturing method |
| CN109461749A (en) * | 2018-11-09 | 2019-03-12 | 德淮半导体有限公司 | Stack TSV structure and its manufacturing method |
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