CN103033830A - Global position system (GPS) receiver power consumption control device and GPS receiver - Google Patents
Global position system (GPS) receiver power consumption control device and GPS receiver Download PDFInfo
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- CN103033830A CN103033830A CN2011103030132A CN201110303013A CN103033830A CN 103033830 A CN103033830 A CN 103033830A CN 2011103030132 A CN2011103030132 A CN 2011103030132A CN 201110303013 A CN201110303013 A CN 201110303013A CN 103033830 A CN103033830 A CN 103033830A
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Abstract
The invention is applied to the field of communication and provides a global position system (GPS) receiver power consumption control device and a GPS receiver. The GPS receiver power consumption control device comprises a temporary storage for storing a pre-set run time and a turn-off time, a first state control circuit for producing a corresponding run indication signal and a turn-off indication signal in a circulating and alternative mode according to the run time and the turn-off time when the GPS receiver is in a stable GPS signal trace state, a clock door control circuit for conducting door control operation of a clock signal to a GPS signal trace passage according to the run indication signal and the turn-off indication signal generated by the first state control circuit. The GPS receiver power consumption control device is capable of controlling the GPS signal trace passage to be at an intermittent run state through setting the corresponding run time and the turn-off time of the GPS signal trace passage of the GPS receiver when a satellite signal is good and trace state is stable, and therefore the power consumption of the whole GPS receiver is lowered.
Description
Technical field
The invention belongs to the communications field, relate in particular to a kind of GPS receiver power consumption control apparatus and GPS receiver.
Background technology
For portable equipments such as automatic navigator, mobile phone, net books, the height of power consumption is one of major criterion of weighing its performance quality, and therefore, the low power dissipation design of GPS receiver just seems particularly important in the portable equipment.
In the GPS receiver, usually possess be used to the trapping module of catching gps signal and a plurality of tracking channel for following the tracks of gps signal, and when good and GPS receiver tracking is in stable condition at gps signal, carrier wave and code phase are linear change at short notice, have metastable characteristic and gradual characteristic, therefore, when the GPS receiver acquisition behind gps signal, trapping module just no longer needs to carry out the work of catching of gps signal; When the GPS receiver operates in lower time of environmental aspect of signal stabilization, but all or part of tracking channel just no longer carries out the tracking work of gps signal in the short time.
Yet in traditional GPS Receiver Design, capturing unit and tracking channel but are in running status all the time, can't close the running status of this part module in the GPS receiver, thereby can't reach the purpose that reduces power consumption.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of GPS receiver power consumption control apparatus, is intended to solve existing each module of GPS receiver and is in constantly running status, causes the large problem of GPS receiver power consumption.
The embodiment of the invention is achieved in that a kind of GPS receiver power consumption control apparatus, and described device comprises:
Register is used for the default operation time of storage and shut-in time value, and described operation time and described shut-in time value are used for indicating respectively single working time and the single shut-in time of gps signal tracking channel;
The first state control circuit is used for when the GPS receiver enters stable gps signal tracking mode, gives birth to corresponding operation indicator signal and closes indicator signal according to the operation time of storing in the described register and shut-in time value cycle alternation real estate;
Clock gating circuit is used for the operation indicator signal that produces in real time according to described the first state control circuit and closes indicator signal is carried out clock signal to the gps signal tracking channel gate operation.
Another purpose of the embodiment of the invention is to provide a kind of GPS receiver, and described GPS receiver comprises aforesaid power consumption control apparatus.
In embodiments of the present invention, by the gps signal tracking channel to the GPS receiver corresponding operation time and shut-in time value are set, when good and tracking mode is stablized at satellite-signal, produce corresponding switch controlling signal according to operation time and shut-in time value, be in operation or closed condition with control gps signal tracking channel, reduced thus the power consumption of whole GPS receiver.
Description of drawings
Fig. 1 is the structural drawing of the GPS receiver power consumption control apparatus that provides of first embodiment of the invention;
Fig. 2 is the structural drawing of the GPS receiver power consumption control apparatus that provides of second embodiment of the invention;
Fig. 3 is the structural drawing of the GPS receiver power consumption control apparatus that provides of third embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.
In embodiments of the present invention, by the gps signal tracking channel to the GPS receiver corresponding operation time and shut-in time value are set, when good and tracking mode is stablized at satellite-signal, produce corresponding switch controlling signal according to operation time and shut-in time value, be in operation or closed condition with control gps signal tracking channel, reduced thus the power consumption of whole GPS receiver.
Fig. 1 shows the structure of the GPS receiver power consumption control apparatus that first embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with present embodiment.
With reference to Fig. 1, it is inner that this power consumption control apparatus is positioned at the GPS receiver, is the unit of the hardware cell, software unit or the software and hardware combining that run on GPS receiver inside, and wherein, this power consumption control apparatus comprises:
Register 11, the operation time that its storage is default and shut-in time value, described operation time and described shut-in time value are used for indicating respectively single working time and the single shut-in time of gps signal tracking channel.
The first state control circuit 12 when it enters stable gps signal tracking mode at the GPS receiver, is given birth to corresponding operation indicator signal and is closed indicator signal according to operation time and the shut-in time value cycle alternation real estate of storage in the register 11.
Because in the normal tracing process of gps signal, carrier wave and code phase are linear change at short notice, though therefore during this period the gps signal tracking channel be in closed condition, also can determine corresponding carrier wave and code phase.
In the present embodiment, operation time and shut-in time value are used for indicating respectively single working time and the single shut-in time of gps signal tracking channel under low-power consumption mode, be worth to come according to operation time and shut-in time the gps signal tracking channel is carried out corresponding Clock gating, when good and GPS receiver tracking is in stable condition when satellite-signal, can carry out at short notice the switching of running status and closed condition by cycle alternation ground control gps signal tracking channel, under the prerequisite that guarantees normal tracking gps signal, reduced to a certain extent the power consumption of GPS receiver thus.
In the present embodiment, generally speaking, when the carrier-to-noise ratio of tracking satellite is normal, can calculate the position coordinates of GPS receiver by almanac data, namely represent under the environmental aspect that the GPS receiver operates in signal stabilization this moment, can follow the tracks of normally and locate according to the gps satellite signal that receives.
Need to prove, mostly usually be provided with simultaneously some (generally being to have simultaneously 12 gps signal tracking channels) gps signal tracking channels in the GPS receiver, and generally speaking when gps signal is followed the tracks of, only open according to actual needs wherein a part of gps signal tracking channel.In embodiments of the present invention, when the gps signal tracking channel is in closed condition, namely refer to close whole gps signal tracking channels, when the gps signal tracking channel is in running status, namely refer to open according to actual needs wherein a part of gps signal tracking channel.
As one embodiment of the present of invention, this power consumption control apparatus also comprises:
The second state control circuit 14, its control gps signal trapping module is in running status or closed condition.
In the present embodiment, by the second state control circuit 14 is set, when the quantity of tracking satellite is inadequate, just controls the gps signal trapping module and be in running status, to catch new satellite; When the quantity of tracking satellite reaches positioning requirements, just control the gps signal trapping module and be in closed condition, thereby save system power dissipation.
In embodiments of the present invention, can control neatly the clock switch of gps signal tracking channel and gps signal trapping module according to the current running environment of GPS receiver with to the current tracking mode of gps signal, effectively reduce power consumption.
As one embodiment of the present of invention, for the modules in the GPS receiver, all can control flexibly the clock switch of each module in the GPS receiver by special state control circuit is set according to the described method of second embodiment of the invention, concrete methods of realizing is not enumerated one by one at this.
As an alternative embodiment of the invention, can also reduce accordingly the clock frequency of modules according to the current running environment of GPS receiver with to the current tracking mode of gps signal, to reach the purpose that reduces power consumption.
Fig. 2 shows the structure of the GPS receiver power consumption control apparatus that second embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with present embodiment.
In the present embodiment, after clock signal is carried out frequency division, by two phaselocked loops (phase locked loop, PLL) circuit is respectively dsp processor in the GPS receiver and all the other system modules provide clock signal, can adjust independently according to the complexity of current algorithm thus the clock frequency of dsp processor, to reduce the power consumption of GPS receiver, particularly, this power consumption control apparatus has comprised:
The one PLL circuit 21, it adjusts the frequency that offers the first clock signal of dsp processor in the GPS receiver.
In the present embodiment, the first clock signal that offers dsp processor is obtained by frequency division by the clock crystal oscillator source, and a PLL circuit 21 receives the first clock signal, and according to the output frequency of adjusting its PLL, to realize the frequency adjustment to the first clock signal.
The 2nd PLL circuit 22, it adjusts the frequency that offers the second clock signal of other module except dsp processor in the GPS receiver.
In the present embodiment, the second clock signal that offers other modules of system is obtained by frequency division by the clock crystal oscillator source, and the 2nd PLL circuit 22 receives the second clock signal, and according to the output frequency of adjusting its PLL, to realize the frequency adjustment to the second clock signal.
In the present embodiment, by two PLL circuit of design in the GPS receiver, adjust to realize the independent of dsp processor clock frequency.For the GPS receiver that can adjust flexibly track algorithm, when using complicated algorithm to carry out the tracking of gps signal, need dsp processor to operate in the higher reference clock frequency to realize higher operational performance, for example, dsp processor is operated under the clock frequency of 85MHz; When running environment good when satellite-signal and the GPS receiver is stablized, can use simple algorithm to carry out the tracking of gps signal, this moment, dsp processor may operate in the relatively low reference clock frequency, for example operate in the computing requirement that to satisfy system under the clock frequency of 48MHz, thus, by for different actual conditions, can adjust the clock frequency of dsp processor independently, with the power consumption of effective reduction GPS receiver.
Need to prove, generally, the selection of algorithm can be decided according to the carrier-to-noise ratio size that the gps signal tracing process calculates, for example, according to present experiment situation, when carrier-to-noise ratio greater than 30 the time, use simple algorithm; When carrier-to-noise ratio less than 30 the time, use complicated algorithm, the algorithm band Kalman Filtering that this moment is complicated can further improve the sensitivity of tracking.
Fig. 3 shows the structure of the GPS receiver power consumption control apparatus that third embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with present embodiment.
In the present embodiment, as shown in Figure 3, this power consumption control apparatus also comprises:
The first digital divider circuit 32 that is connected with a PLL circuit 31, by adjusting the first digital divider circuit 32, namely can realize further frequency division on the basis of a PLL circuit output frequency, to adjust more neatly the clock frequency that offers dsp processor.
The second digital divider circuit 34 that is connected with the 2nd PLL circuit 33 by adjusting the second digital divider circuit 34, namely can be realized further frequency division on the basis of the 2nd PLL circuit 33 output frequencies.
In the present embodiment, by carrying out frequency division for the clock frequency of dsp processor and other module of GPS receiver further, reach more neatly the effect of clock frequency independently being adjusted according to actual conditions, effectively reduce the power consumption of GPS receiver.
In embodiments of the present invention, when specifically adjusting clock frequency according to actual conditions, can only adjust the output frequency of PLL circuit, also can be on the basis that the output frequency of PLL circuit is adjusted, further come this clock frequency is adjusted by digital divider circuit, because the clock of dsp processor and the clock isolation of other system module are come, in GPS operation of receiver process, can adjust neatly according to the computational complexity of current system the clock frequency of dsp processor, and whole system can't the losing lock phenomenon occur following the tracks of because of the adjustment of dsp processor clock frequency, owing to when algorithm is simple, can suitably reduce the clock frequency of dsp processor, according to the linear relationship of dynamic power consumption size with clock frequency, reduced well system power dissipation.
As another embodiment of the present invention, can also reach the purpose that reduces power consumption by the power supply of selecting the shutdown system part of module.
Particularly, this power consumption control apparatus has comprised for the first power supply of the system clock territory circuit supply in the GPS receiver and has been the second source of the timer circuit power supply in the GPS receiver, by the power supply of the system clock territory circuit in the GPS receiver and the power supply of 32.768KHz timer circuit are isolated physically, namely be respectively above-mentioned two partial circuits by different power supplys and power.Because in the GPS receiver, 32.768KHz timer will keep timework all the time, therefore its power supply can not be closed, and under the pattern of the cold start-up of GPS receiver and warm start, the complete power supply of shutdown system clock zone circuit then, the almanac data that obtains before can using when start next time like this and the chronometric data of 32.768KHz timer are carried out rough location to satellite.In the present embodiment, can know that according to dynamic power consumption size and the linear relationship of voltage squared the power supply of shutdown system part of module is remarkable for the power consumption effect that reduces the GPS receiver.
The technique scheme that provides by the embodiment of the invention, in normal tracking situation, with 6 channels track commonly used, the GPS receiver of running frequency 100MHz is example, under the process conditions of 0.13 μ m, the power consumption index of GPS receiver conventional operation is 55mW, and the power consumption index can reach 20mW after the technical scheme that the employing embodiment of the invention provides, and greatly reduces the power consumption of GPS receiver.
The above only is preferred embodiment of the present invention, not in order to limiting the present invention, all any modifications of doing within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. GPS receiver power consumption control apparatus is characterized in that described device comprises:
Register is used for the default operation time of storage and shut-in time value, and described operation time and described shut-in time value are used for indicating respectively single working time and the single shut-in time of gps signal tracking channel;
The first state control circuit is used for when the GPS receiver enters stable gps signal tracking mode, gives birth to corresponding operation indicator signal and closes indicator signal according to the operation time of storing in the described register and shut-in time value cycle alternation real estate;
Clock gating circuit is used for the operation indicator signal that produces in real time according to described the first state control circuit and closes indicator signal is carried out clock signal to the gps signal tracking channel gate operation.
2. device as claimed in claim 1 is characterized in that, described device also comprises:
The second state control circuit is used for control gps signal trapping module and is in running status or closed condition.
3. device as claimed in claim 1 is characterized in that, described device also comprises:
The one PLL circuit is used for adjusting the frequency that the GPS receiver offers the first clock signal of dsp processor;
The 2nd PLL circuit is used for adjusting the frequency that the GPS receiver offers the second clock signal of other modules except dsp processor.
4. device as claimed in claim 3 is characterized in that, described device also comprises:
The first digital divider circuit that is connected with a described PLL circuit is used for the output frequency of a described PLL circuit is carried out frequency division.
5. device as claimed in claim 3 is characterized in that, described device also comprises:
The second digital divider circuit that is connected with described the 2nd PLL circuit is used for the output frequency of described the 2nd PLL circuit is carried out frequency division.
6. device as claimed in claim 1 is characterized in that, described device also comprises:
The first power supply is used to the system clock territory circuit supply in the GPS receiver;
Second source is used to the timer circuit power supply in the GPS receiver.
7. a GPS receiver is characterized in that, described GPS receiver comprises such as each described power consumption control apparatus of claim 1 to 6.
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| CN2011103030132A CN103033830A (en) | 2011-09-30 | 2011-09-30 | Global position system (GPS) receiver power consumption control device and GPS receiver |
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| CN103647558A (en) * | 2013-12-03 | 2014-03-19 | 北京中电华大电子设计有限责任公司 | Manchester encoder circuit |
| CN104142508A (en) * | 2013-05-09 | 2014-11-12 | 三星电子株式会社 | Method, apparatus and system for reducing power consumption in gnss receivers |
| CN104375152A (en) * | 2013-08-14 | 2015-02-25 | 优能通信科技（杭州）有限公司 | Electricity-saving satellite positioning method and terminal |
| CN105137457A (en) * | 2015-08-07 | 2015-12-09 | 北京利和顺达电子有限公司 | Power consumption management method and system for Beidou navigation positioning terminal |
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| CN105137457A (en) * | 2015-08-07 | 2015-12-09 | 北京利和顺达电子有限公司 | Power consumption management method and system for Beidou navigation positioning terminal |
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Application publication date: 20130410 |