CN103001604A

CN103001604A - Comprehensive filtering system based on field programmable analog array (FPAA) and field programmable gate array (FPGA) technology

Info

Publication number: CN103001604A
Application number: CN2012105093770A
Authority: CN
Inventors: 朱正伟; 孙广辉
Original assignee: Changzhou University
Current assignee: Liyang Chang Technology Transfer Center Co.,Ltd.
Priority date: 2012-12-04
Filing date: 2012-12-04
Publication date: 2013-03-27
Anticipated expiration: 2032-12-04
Also published as: CN103001604B

Abstract

The invention discloses a comprehensive filtering system based on field programmable analog array (FPAA) and field programmable gate array (FPGA) technology. The comprehensive filtering system is composed of an FPGA module and an FPAA filtering module. The FPGA module mainly finishes digital filter design and various frequencies required by the FPAA module. An FPAA filter is mainly used for finishing a signal processing circuit. By designing different controller intellectual property (IP) cores, a digital filtering function is achieved inside the FPGA. By combining different filtering CAB blocks of the FPAA, simulation filtering of various types and different orders is achieved. By comparing a digital filtering effect and a simulation filtering effect in real time, a double-filtering function of the simulation filtering and the digital filtering is achieved. By using the advantages of the FPGA technology on processing digital signals and the advantages of the FPAA technology on the simulation signals, processing effect research of the digital filtering and the simulation filtering is achieved. The comprehensive filtering system has the advantages of being fast and convenient to upgrade, rich in filter design types and the like.

Description

A kind of integrated filter system based on FPAA and FPGA technology

Technical field

The present invention relates to design of filter and Application of integrated circuit, belong to the signal process field.

Background technology

Along with the arrival in microsensor epoch, more and more important to the efficient processing of transducer small-signal, in microsignal modulate circuit to aobvious even more important of the extraction of useful signal.Present filter circuit mainly is divided into two analoglike filtering and digital filterings, analog filtering mainly be discrete component and in integrated scale circuits built, the design of sort circuit is more to designer's professional knowledge requirement, and higher to the working experience requirement of design, simultaneously debugging is difficulty relatively; Digital filtering at first will carry out analog-to-digital conversion with signal, inevitably like this loses many useful informations, and digital filtering requires highlyer to algorithm simultaneously, and then this operational capability to controller requires higher; The appearance of FPAA technology has well solved the problems referred to above.Introduced a kind of program-controlled filtering device in the Chinese patent 201020685324.0, can realize that low pass, high pass, band are logical, four kinds of filters of band resistance by functional switch in this patent, but the switching of filter of the same race is not dumb for it.

Summary of the invention

For the technical problem of above-mentioned existence, the invention provides a kind of can flexible design, the integrated filter system of the various digital filters of checking and analog filter.This integrated filter system takes full advantage of FPGA characteristics able to programme, on the constant basis of peripheral circuit, the chip internal circuit is carried out different programmings, realizes the processing capacity of every digital signal.In conjunction with FPAA technology on-line reconfiguration technology, in the situation of not cutting off the power supply, the parameter of circuit and structure are switched, make circuit flexibly, scope of design is more extensive.

Technical scheme of the present invention is: a kind of integrated filter system based on FPAA and FPGA technology comprises FPGA unit and FPAA filter unit.The FPGA unit comprises FPGA module, download module, memory module, input equipment and output equipment, be used for controlling whole circuit by the controller IP kernel, and provide frequency division to the various clock frequencies of FPAA module to finish the variety classes filter; The FPAA filter unit comprises FPAA filter module, signal pre-processing module and signal post-processing module, is used for realizing the different performance of analog filter, and realizes other analog circuit functions commonly used.

As a further improvement on the present invention, its programmable features in Digital Signal Processing of FPGA unit by using is realized various digital circuits, comprises frequency divider, controller IP, digital filter algorithm.

As a further improvement on the present invention, the FPAA filter unit is realized dissimilar, different types of filter circuit under the condition that does not change the peripheral hardware circuit.

As a further improvement on the present invention, described integrated filter system based on FPAA and FPGA technology mutually combines digital integrated circuit and analog integrated circuit.

As a further improvement on the present invention, reserve some interfaces in FPGA unit and the FPAA filter unit, be used for the user circuit of chip internal is upgraded.

Compared with prior art, the present invention has following advantage and beneficial effect.

1, the design is simple in structure, humanization designing, can fast design according to user's demand working method, the filtering kind to filter, to realize fertile assorted, the Chebyshev I class of FIR, IIR, pulse shaping, Bath, Chebyshev II class, Bezier and the self-designed all kinds of low passes of client, high pass, logical, the various filter functions of band resistance of band.

2, the present invention design can both can design digital filter, also can the design simulation filter, also can design the filter of both combinations simultaneously, and this well provides design of filter, verification platform for the filter researcher.

3, the present invention takes full advantage of FPGA and FPAA restructural characteristics, so that circuit can be upgraded to circuit on the basis that does not change existing hardware circuit.This is having widely market prospects aspect research and development experimental debugging and the colleges and universities' experimental system

4, the present invention tightly follows the electronics development trend.Electronics develops towards the FPMA future development,, domestic research and comparison to the FPAA technology is few simultaneously, and popularization at home has extremely important meaning to this platform to the FPAA technology.

Description of drawings

Fig. 1 is the overall structure block diagram that the present invention is based on the integrated filter system of FPAA and FPGA technology;

Fig. 2 is the power module schematic diagram;

Fig. 3 is FPGA unit schematic diagram;

Fig. 4 is FPAA filter unit schematic diagram;

Fig. 5 is the overall flow figure that the present invention is based on the integrated filter system of FPAA and FPGA technology.

Among the figure: 1, FPGA unit; 2, FPAA filter unit.

Embodiment

Below in conjunction with accompanying drawing the present invention is explained in further detail.

The FPGA module can design the digital filters such as FIR commonly used, IIR, pulse shaping filter among the present invention; Simultaneously the FPAA module can design low pass, high pass, band is logical, band resistance four class Baths are fertile assorted, Chebyshev I class, Chebyshev II class, Bezier and the self-designed various filter filtering functions of client, cut-off frequency and gain amplifier can accurately be set, be applicable to the filtering system of the following signal of amplitude 5v.The parameters of filter mainly arranges accordingly and can realize according to designer's demand.

Technical scheme of the present invention is: shown in Fig. 1, native system mainly contains two parts and forms FPGA unit and FPAA filter unit.Wherein the FPGA unit comprises download circuit, memory circuit, keyboard input circuit, LCD display circuit, whole circuit control is realized in this unit mainly design by the controller IP kernel, design simultaneously frequency division module to the various clock frequencies of FPAA module to finish the variety classes filter; The FPAA filter unit, mainly be to be consisted of by the FPAA minimum system, it mainly realizes the design of different performance analog filter, this module can realize that also other analog circuit functions commonly used realize the signal of tape handling is carried out filtering simultaneously, it also can realize other conditioning functions simultaneously, and Fig. 4 is FPAA filter unit schematic diagram.

The FPGA module is written into the relevant initialize routines such as the controller IP kernel that set in the memory module EPSC1 and frequency-division filter among Fig. 3, and the LCD liquid crystal display welcomes the interface, and then liquid crystal is pointed out corresponding set-up mode, and the user carries out corresponding operating according to prompting.Enter digital filter, analog filter or compound filter parameter by button the interface be set, in the compound filter mentality of designing of two kinds of filters once, the below is elaborated to two class filters.Among Fig. 3, pin 9,25,38,49,50,54,55,65,73,78,85,93,100,111,124,140,153,154,156,158,159,167,174,177,184,186,104 ground connection; Pin 51,53,66,79,155,157,178,190 meets 1.2V; Pin 7,29,42,62,71,83,91,98,109,122,136,148,166,172,183,194,202 meets 3.3V.

The digital filter setting up procedure: digital filter mainly is with filter module commonly used, leave filter Common Parameters interface, such as exponent number, kind, type etc., the user selects parameters according to the demand of oneself, then User select the program module that designed of parameter call to realize user's filtering requirements.

Analog filter setting up procedure: enter the frequency division setting according to liquid crystal prompting button, this setting comprises frequency values and the frequency division numerical value of the active crystal oscillator that FPGA uses, and controller IP kernel internal processes Automatically invoked frequency division computing function is real-time after designing calculates and supply with the frequency values of FPAA module behind the FPGA frequency division and be presented on the LCD.Next interface is the setting to the various parameters of analog filter, enters the parameter that next interface prompt arranges previously after the affirmation after design is finished, and again determines the parameter of the lower needed every filter of user.Determine key press rear, system just by the controller IP kernel according to parameter being configured the FPAA module that arranges.Whole like this hardware simulation filter circuit configuration is finished.

Reserved many interfaces in FPGA module and the FPAA module, the user can be according to the needs of oneself, and the circuit of chip internal is upgraded and then realized other difference in functionalitys.

The below describes as an example of AN221E04 example with EP2C5Q208, FPAA with FPGA, and the selection of chip is revised accordingly according to demand.

Any system works all be unable to do without power supply, Fig. 2 has provided the required various potential circuits of native system, native system mainly is applied to 1.2V, 3.3V and three kinds of voltages of 5V, and it is that example is carried out detailed explanation that FPGA adopts EP2C5Q208, the FPGA storage chip of 1.2V power supply to adopt the 5V power supply chip AN221E04 of 3.3V power supply EPCS1, FPAA chip selection Anadigm company.

The FPGA module is written into the relevant initialize routines such as the controller IP kernel that set in the memory module EPSC1, frequency divider, LCD demonstration among Fig. 3, and the interface is welcome in the LCD liquid crystal display, then liquid crystal is pointed out corresponding set-up mode, and the user carries out corresponding operating according to prompting.Enter digital filter, analog filter or compound filter parameter by button the interface be set, the whole installation flow chart of filter as shown in Figure 5, the below is elaborated to two class filters.

After entering the digital filter setting up procedure, entering second interface according to button prompting is that classification to digital filter arranges, and mainly contains FIR, IIR, pulse shaping three major types, simultaneously to kind and the isoparametric setting of exponent number of filter.Enter digital filter design parameter design interface after the affirmation.According to the filter parameter that second contact surface is selected, to passband width, cut-off frequency, pass band damping degree, the isoparametric setting of stopband attenuation degree of filter, the input of this part numerical value is to finish by the 4*4 keyboard.The 4th interface is that top setting is gathered, and shows the parameters of further confirming filter, calls internal algorithm configuration related circuit after the affirmation, finishes the design of digital filter.

After entering the analog filter setting up procedure, enter second interface according to liquid crystal prompting button frequency is carried out the frequency division setting, this setting comprises frequency values and the frequency division numerical value of the active crystal oscillator that FPGA uses, controller IP kernel internal processes Automatically invoked frequency division computing function is real-time after designing calculate supply with the frequency values of FPAA module and be presented at LCD behind the FPGA frequency division upper with for reference.

After the FPAA set of frequency is good, next the FPAA circuit is arranged.The 3rd interface of LCD is the setting to the filter parameters, and this interface comprises the type, filter order, the yield value of signal, the quantity of input signal, the secondary frequency division value of input clock, the setting of filter Fc value of kind, the filter of filter.According to entering parameters prompting circle after the prompting affirmation.

The 4th interface mainly shows the parameter that arranges previously, reaffirms the parameter of the needed every filter of lower user.Determine that key presses afterwards, the CAB piece number that single-chip microcomputer is used according to exponent number and other functions of selective filter is configured the basic blocks of circuit, then is configured according to different parameters each capacitance to the CAB piece selected.This configuration can realize the design to circuit under the prerequisite of not cutting off the power supply, so that the user can design and verify the filter circuit of oneself efficiently.

Claims

1. integrated filter system based on FPAA and FPGA technology, comprise FPGA unit (1) and FPAA filter unit (2), it is characterized in that: described FPGA unit (1) comprises FPGA module, download module, memory module, input equipment and output equipment, be used for controlling whole circuit by the controller IP kernel, and provide frequency division to the various clock frequencies of FPAA module to finish the variety classes filter; Described FPAA filter unit (2) comprises FPAA filter module, signal pre-processing module and signal post-processing module, is used for realizing the different performance of analog filter, and realizes other analog circuit functions commonly used.

2. the integrated filter system based on FPAA and FPGA technology according to claim 1, it is characterized in that: described FPGA unit (1) utilizes its programmable features in Digital Signal Processing to realize various digital circuits, comprises frequency divider, controller IP, digital filter algorithm.

3. the integrated filter system based on FPAA and FPGA technology according to claim 1, it is characterized in that: described FPAA filter unit (2) is realized dissimilar, different types of filter circuit under the condition that does not change the peripheral hardware circuit.

4. the described integrated filter system based on FPAA and FPGA technology of any one in 3 according to claim 1 is characterized in that: described integrated filter system mutually combines digital integrated circuit and analog integrated circuit.

5. the described integrated filter system based on FPAA and FPGA technology of any one in 3 according to claim 1, it is characterized in that: reserve some interfaces in described FPGA unit (1) and the FPAA filter unit (2), be used for the user circuit of chip internal is upgraded.