CN102969782B - Chip starting circuit - Google Patents

Chip starting circuit Download PDF

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CN102969782B
CN102969782B CN201210417249.3A CN201210417249A CN102969782B CN 102969782 B CN102969782 B CN 102969782B CN 201210417249 A CN201210417249 A CN 201210417249A CN 102969782 B CN102969782 B CN 102969782B
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power supply
resistance
switching tube
voltage
electric capacity
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CN102969782A (en
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熊文
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Shenzhen Invt Electric Co Ltd
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Shenzhen Invt Electric Co Ltd
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Abstract

The invention discloses a chip starting circuit which comprises a charging module, an auxiliary power supply and a first time delay module. The charging module comprises an input power supply, a charging control circuit and a first capacitor. The charging control circuit is connected between the input power supply and the first capacitor so as to control the input power supply to charge the first capacitor, voltage of the first capacitor forms a first starting power supply for starting a first chip, the auxiliary power supply is connected with the first starting power supply and is controlled by the first chip to supply electricity to the first chip, the first starting power supply supplies electricity to the first time delay module, and the first time delay module performs output to the charging control circuit so as to delay cut-off of the charging module. According to the chip starting circuit, the time delay module is adopted to prolong power supply time of the input power supply, so that the auxiliary power supply has enough time to be timely started to supply electricity to the chip, and the problem of instability in chip starting in the prior art is solved.

Description

Chip enable circuit
Technical field
The present invention relates to circuit engineering field, relate more specifically to a kind of chip enable circuit.
Background technology
Chip (as power supply control chip etc.) is the core component of integrated circuit, and the normal operation of chip is to ensureing that the overall work effect of circuit has important effect.Along with the extensive use of chip, people require more and more higher to the startup of chip, as required, start-up time is fast, loss is low and cost is low etc., and what is more important requires that chip enable process meets certain stability, to ensure normal startup and the stable operation of chip.
Prior art adopts start-up circuit as shown in Figure 1 usually, it comprises switching tube Q0, the switching tube Q0 of this circuit selects metal oxide semiconductor field effect tube (metal-oxide-semiconductor), the grid of metal-oxide-semiconductor Q0 is connected with input power VIN with the second resistance R2 through the first resistance R1 respectively with drain electrode, the grid of metal-oxide-semiconductor Q0 and source electrode are respectively through the first voltage-stabiliser tube Z1 and the first electric capacity C1 ground connection, wherein the grid of metal-oxide-semiconductor Q0 is connected with the negative electrode of the first voltage-stabiliser tube Z1, and namely the voltage VCC of described first electric capacity C1 can be used as the startup power supply of chip; The startup power supply VCC of chip also connects an accessory power supply simultaneously, and this accessory power supply comprises auxiliary winding M and the first diode D1, wherein starts power supply VCC and is connected with the negative electrode of the first diode D1, and the anode of the first diode D1 is by auxiliary winding M ground connection.
In above-mentioned start-up circuit, input power VIN starts moment, due to the existence of the burning voltage of voltage-stabiliser tube Z1, metal-oxide-semiconductor Q0 conducting, input power VIN is that the first electric capacity C1 charges through the second resistance R2 and metal-oxide-semiconductor Q0, the voltage VCC of the first electric capacity C1 constantly raises, and when after the starting resistor value reaching chip, chip is started working.After chip enable, the auxiliary winding M controlled by it starts working, and is after this directly chip power supply by accessory power supply.Metal-oxide-semiconductor Q0 grid voltage is the voltage stabilizing value of the first voltage-stabiliser tube Z1, and its source voltage constantly increases with the increase of the voltage of the first electric capacity C1, cause metal-oxide-semiconductor Q0 grid, the pressure drop of source electrode constantly reduces, when this pressure drop is less than the cut-in voltage of metal-oxide-semiconductor Q0, metal-oxide-semiconductor Q0 turns off, thus cut off the second resistance R2, reach the effect reduced the wastage.
Although chip enable circuit as above can reduce the wastage, but but exist and start unstable problem: when the startup power supply VCC of chip has just reached the starting resistor value of chip, metal-oxide-semiconductor Q0 is less than the cut-in voltage of metal-oxide-semiconductor Q0 and ends thus cut off charging circuit due to the pressure drop of its grid, source electrode, cause starting power supply VCC so short at the time compole at its starting resistor value place, as fruit chip does not start within this of short duration time, or auxiliary winding M fails to continue as chip power supply in time, easily occurs the situation of chip enable instability.
Summary of the invention
The object of this invention is to provide that a kind of to realize the stable chip enable circuit started short because starting power supply compole when the starting resistor place of chip with what solve existing for existing chip enable circuit, and the technical problem of the accessory power supply chip enable instability caused for chip power supply not prompt enough.
In order to realize object of the present invention, the technical solution adopted in the present invention is: provide a kind of chip enable circuit, it comprises charging module, accessory power supply and the first time delay module, described charging module comprises input power, charging control circuit and the first electric capacity, described charging control circuit to be connected between input power and the first electric capacity with control inputs power supply described first capacitor charging, the voltage of described first electric capacity forms the first startup power supply for starting the first chip, described accessory power supply and first starts power supply and is connected and is controlled by described first chip and is described first chip power supply, described first startup power supply is that the first time delay module is powered, described first time delay module exports charging control circuit to postpone to cut off charging module.
Its further technical scheme is: described first time delay module comprises the first delay circuit and the first switching circuit; First delay circuit comprises the 3rd diode, the 3rd resistance, the 4th resistance, the 3rd electric capacity and the 3rd voltage-stabiliser tube, the input voltage of this first delay circuit is the first startup power supply, this input voltage is connected with the negative electrode of the 3rd diode, the anode of the 3rd diode is successively through the 3rd resistance and the 3rd capacity earth, 4th resistor coupled in parallel is at the two ends of the branch road be made up of the 3rd diode and the 3rd resistance, and the negative electrode of the 3rd voltage-stabiliser tube is connected on the tie point of the 3rd resistance and the 3rd electric capacity; First switching circuit comprises the first switching tube, and the base stage of this first switching tube is connected with the anode of the 3rd voltage-stabiliser tube, and its collector electrode is connected with the grid of switching tube, its grounded emitter.
Its further technical scheme is: described charging control circuit comprises the first resistance, second resistance, switching tube, second diode and the second voltage-stabiliser tube, wherein the grid of switching tube is connected with input power with the second resistance through the first resistance respectively with drain electrode, the grid of switching tube is connected with the negative electrode of the second voltage-stabiliser tube, the source electrode of switching tube is connected with the anode of the second diode, the anode of the second diode is connected with the anode of the second voltage-stabiliser tube, the negative electrode of the second diode is through the first capacity earth, the two ends of described first electric capacity are also parallel with one the 4th voltage-stabiliser tube, the plus earth of the 4th voltage-stabiliser tube, described accessory power supply comprises auxiliary winding and the first diode, and wherein the negative electrode and first of the first diode starts power supply and is connected, and the anode of the first diode is through auxiliary winding earth.
Its further technical scheme is: described charging control circuit also comprises second switch pipe and the 6th resistance, described 6th resistance one end is connected with the source electrode of switching tube, the other end is connected with the anode of the second diode, the described collector electrode of second switch pipe is connected with the grid of switching tube, the base stage of second switch pipe is connected with the source electrode of switching tube, and the emitter of second switch pipe is connected with the anode of the second voltage-stabiliser tube.
Its further technical scheme is: described first time delay module also comprises the 5th resistance, between the base stage that described 5th resistance is connected to described first switching tube and emitter.
Its further technical scheme is: also comprise the second time delay module, described second time delay module comprises the second delay circuit, second switch circuit and the 5th electric capacity, wherein the second delay circuit and second switch circuit are all connected to described first startup power supply, described second switch circuit is connected to control the first startup power supply to described 5th capacitor charging between the second delay circuit and the 5th electric capacity, and the voltage of described 5th electric capacity forms the second startup power supply for starting the second chip.
Its further technical scheme is: described second delay circuit comprises the 7th resistance, the 4th electric capacity and the 5th voltage-stabiliser tube, the input voltage of this second delay circuit is the first startup power supply, described first starts power supply successively through the 7th resistance and the 4th capacity earth, and the negative electrode of the 5th voltage-stabiliser tube is connected on the tie point of the 7th resistance and the 4th electric capacity; Described second switch circuit comprises the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 3rd switching tube and the 4th switching tube, between the base stage that 8th resistance is connected to the 3rd switching tube and emitter, the emitter and first of the 3rd switching tube starts power supply and is connected, the base stage of the 3rd switching tube is connected through the collector electrode of the 9th resistance with the 4th switching tube, the grounded emitter of the 4th switching tube, the base stage of described 4th switching tube is connected through the anode of the 11 resistance with the 5th voltage-stabiliser tube; Described 5th electric capacity is connected between the collector electrode of the 3rd switching tube and the emitter of the 4th switching tube.
Its further technical scheme is: described second time delay module also comprises the tenth resistance, between the base stage that described tenth resistance is connected to described 4th switching tube and emitter.
Its further technical scheme is: described second time delay module also comprises the 4th diode, and the anode and first of described 4th diode starts power supply and is connected, and its negative electrode is connected with the emitter of the 3rd switching tube.
Its further technical scheme is: described switching tube is N-type metal-oxide-semiconductor.
Compared with prior art, chip enable circuit provided by the present invention extends the power-on time of input power by setting up one first time delay module, because first starts power supply to obtain the first time delay module delayed action at the starting resistor value place of chip, accessory power supply has start in time enough start-up times and is chip power supply, avoids the problem of the chip enable instability produced existing for prior art.In addition, the time of delay that the first time delay module produces is controlled, by selecting the parameter value of suitable circuit components to carry out the control lag time, so also solves uncontrollable technological deficiency start-up time in prior art.
By following description also by reference to the accompanying drawings, the present invention will become more clear, and these accompanying drawings are for explaining embodiments of the invention.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of existing chip enable circuit;
Fig. 2 is the circuit block diagram of chip enable circuit first embodiment of the present invention;
Fig. 3 is the physical circuit figure of the first embodiment shown in Fig. 2;
Fig. 4 is the circuit block diagram of chip enable circuit second embodiment of the present invention;
Fig. 5 is the physical circuit figure of the second embodiment shown in Fig. 2.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in embodiment, reference numerals similar in accompanying drawing represents similar assembly.Obviously, be only the present invention's part embodiment below by the embodiment of description, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Fig. 2 and Fig. 3 illustrates the first embodiment of chip enable circuit of the present invention.See Fig. 2, the chip enable circuit that the present embodiment provides comprises charging module 11, accessory power supply 12 and the first time delay module 13.Wherein, charging module 11 comprises input power VIN, charging control circuit 111 and the first electric capacity C1, described charging control circuit 111 is connected between input power VIN and the first electric capacity C1 and charges to described first electric capacity C1 with control inputs power supply VIN, the voltage of described first electric capacity C1 forms the first startup power supply VCC1 for starting the first chip (not shown), described accessory power supply 12 and first starts power supply VCC1 and is connected and is controlled by described first chip and is described first chip power supply, described first startup power supply VCC1 is also that the first time delay module 13 is powered simultaneously, described first time delay module 13 exports charging control circuit 111 to postpone to cut off charging module 11.
Particularly, see Fig. 3, described charging control circuit 111 comprises the first resistance R1, the second resistance R2, switching tube Q0, the second diode D2 and the second voltage-stabiliser tube Z2.In this example, switching tube Q0 selects metal-oxide-semiconductor, the grid of switching tube Q0 is connected with input power VIN with the second resistance R2 through the first resistance R1 respectively with drain electrode, the grid of switching tube Q0 is connected with the negative electrode of the second voltage-stabiliser tube Z2, the source electrode of switching tube Q0 is connected with the anode of the second diode D2, the anode of the second diode D2 is connected with the anode of the second voltage-stabiliser tube Z2, the negative electrode of the second diode D2 is through the first electric capacity C1 ground connection, in order to make first of the first chip the startup power supply VCC1 more stable, the 4th voltage-stabiliser tube Z4 is parallel with at the first electric capacity C1 two ends, the plus earth of the 4th voltage-stabiliser tube Z1.
Described accessory power supply 12 for being that chip power supply is to maintain the normal work of chip after chip enable.The accessory power supply 12 of the present embodiment comprises auxiliary winding M and the first diode D1, and wherein the negative electrode and first of the first diode D1 starts power supply VCC1 and is connected, and the anode of the first diode D1 is through auxiliary winding M ground connection.
Described first time delay module 13 comprises the first delay circuit 131 and the first switching circuit 132.Wherein, first delay circuit 131 comprises the 3rd diode D3, the 3rd resistance R3, the 4th resistance R4, the 3rd electric capacity C3 and the 3rd voltage-stabiliser tube Z3, the input voltage of this first delay circuit 131 is the first startup power supply VCC1, this input voltage is connected with the negative electrode of the 3rd diode D3, the anode of the 3rd diode D3 is successively through the 3rd resistance R3 and the 3rd electric capacity C3 ground connection, 4th resistance R4 is connected in parallel on the two ends of the branch road be made up of the 3rd diode D3 and the 3rd resistance R4, and the negative electrode of the 3rd voltage-stabiliser tube Z3 is connected on the tie point of the 3rd resistance R3 and the 3rd electric capacity C3.And the first switching circuit 132 comprises the first switching tube Q1, the base stage of this first switching tube Q1 is connected with the anode of the 3rd voltage-stabiliser tube Z3, and its collector electrode is connected with the grid of switching tube Q0, its grounded emitter.
Operation principle based on the chip enable circuit of foregoing circuit design is as follows: the moment accessing input power VIN at charging control circuit 111, the burning voltage of the second voltage-stabiliser tube Z2 clamper makes switching tube Q0 conducting, input power VIN is that the first electric capacity C1 charges through the second resistance R2 and switching tube Q0, the voltage (namely first starts power supply VCC1) of the first electric capacity C1 raises and is stable at the voltage stabilizing value of the 4th voltage-stabiliser tube Z4, voltage stabilizing value due to the 4th voltage-stabiliser tube Z4 is greater than the starting resistor value of the first chip, and the first chip can normally start; First startup power supply VCC1 is that the 3rd electric capacity C3 charges by the 4th resistance R4 simultaneously, the voltage of the 3rd electric capacity C3 constantly increases to the 3rd voltage-stabiliser tube Z3 conducting and makes the voltage between the first switching tube Q1 base stage and emitter be greater than the cut-in voltage of the first switching tube Q1, thus make the first switching tube Q1 conducting and drag down collector voltage and then the on-off switching tube Q0 of switching tube Q0, cut off charging module 11 and reduce the loss of whole circuit.
Wherein, first time delay module 13 makes first of chip to start power supply VCC1 can stablize a period of time when reaching the voltage stabilizing value of the 4th voltage-stabiliser tube Z4, auxiliary like this winding M has time enough to start and is chip power supply, make the start-up course of chip more stable, thus solve in prior art short because starting the power supply VCC compole when the starting resistor place of chip, and auxiliary winding M can not start the problem of the chip enable instability produced for chip power supply in time.The time of delay of the first time delay module 13 is controlled simultaneously, by selecting the value of suitable resistance, electric capacity and voltage-stabiliser tube to carry out the control lag time, so also solves uncontrollable technological deficiency start-up time in prior art.
When said chip start-up circuit normally works, if there is no the second diode D2's, then first start power supply VCC1 voltage can after the second voltage-stabiliser tube Z2 and the first switching tube Q1 ground connection, such first voltage starting power supply VCC1 can move ground to, therefore, the setting of the second diode D2 can efficiently avoid above-mentioned phenomenon.The electricity of the 3rd electric capacity C3 discharges via the 4th resistance R4 and very little the 3rd resistance R3 of resistance, because the resistance of the 3rd resistance R3 is very little, 3rd diode D3 of its series connection ensure that the 3rd resistance R3 only conducting in the 3rd electric capacity C3 discharge process effectively, makes discharge process speed accelerate like this.After the electric quantity consumption of the 3rd electric capacity C3 to the voltage stabilizing value being less than the 3rd voltage-stabiliser tube Z3, the 3rd voltage-stabiliser tube Z3 turns off, and the first switching tube Q1 is turned off, and then the grid voltage of switching tube Q0 is no longer dragged down, get back to initial condition.
Be important devices at above-mentioned charging control circuit 111 breaker in middle pipe Q0, if there is the situation of overcurrent, switching tube Q0 very easily damages.In order to effectively protect this switching tube Q0, the present embodiment also has additional second switch pipe Q2 and the 6th resistance R6 to form the current foldback circuit of switching tube Q0 in this partial circuit.Wherein, described second switch pipe Q2 selects triode, described 6th resistance R6 one end is connected with the source electrode of switching tube Q0, the other end is connected with the anode of the second diode D2, the collector electrode of described second switch pipe Q2 is connected with the grid of switching tube Q0, the base stage of second switch pipe Q2 is connected with the source electrode of switching tube Q0, and the emitter of second switch pipe Q2 is connected with the anode of the second voltage-stabiliser tube Z2.When this charging control circuit 111 normally works, because the source current of switching tube Q0 is less, the voltage at the 6th resistance R6 two ends, the i.e. base stage of second switch pipe Q2 and the voltage of emitter, littlely can't reach its starting resistor, therefore second switch pipe Q2 turns off; When there is super-high-current, the voltage at the 6th resistance R6 two ends can sharply increase, and makes second switch pipe Q2 conducting, and then on-off switching tube Q0, reaches the effect of protection switch pipe Q0.
In some circuit, often use multiple chip, because the job order of each chip is inconsistent, therefore need in the different moment for different chips provides startup power supply, the second embodiment of the present invention provides a kind of chip enable circuit that can provide different sequential for this reason.
See Fig. 4, the chip enable circuit of the present embodiment can be used for the chip (being respectively the first chip and the second chip) successively starting different timing requirements, this chip enable circuit, except comprising charging module 11, accessory power supply 12 and the first time delay module 13 in the first embodiment, has also set up the second time delay module 14.In the present embodiment, still start power supply VCC1 to start the first chip by the voltage of the first electric capacity C1 in charging module 11 as first, the above-mentioned circuit structure similar with the first embodiment does not repeat them here.
The second time delay module 14 that the present embodiment is set up is for starting the second chip, this second time delay module 14 comprises the second delay circuit 141, second switch circuit 142 and the 5th electric capacity C5, wherein the second delay circuit 141 and second switch circuit 142 are all connected to described first startup power supply VCC1, described second switch circuit 142 is connected to control the first startup power supply VCC1 to described 5th capacitor charging between the second delay circuit 141 and the 5th electric capacity, and the voltage of described 5th electric capacity C5 forms the second startup power supply VCC2 for starting the second chip.
Particularly, see Fig. 5, described second delay circuit 141 comprises the 7th resistance R7, the 4th electric capacity C4 and the 5th voltage-stabiliser tube Z5.The input voltage of this second delay circuit 141 is that first of the first chip starts power supply VCC1, described first starts power supply VCC1 successively through the 7th resistance R7 and the 4th electric capacity C4 ground connection, and the negative electrode of the 5th voltage-stabiliser tube Z5 is connected on the tie point of the 7th resistance R7 and the 4th electric capacity C4.Second switch circuit 142 comprises the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, the 11 resistance R11, the 3rd switching tube Q3 and the 4th switching tube Q4.In the present embodiment, the 3rd switching tube Q3 and the 4th switching tube Q4 selects triode.The emitter and first of the 3rd switching tube Q3 starts power supply VCC1 and is connected, the emitter of the 3rd switching tube Q3 is connected with its base stage through the 8th resistance R8, the base stage of the 3rd switching tube Q3 is connected with the collector electrode of the 4th switching tube Q4 through the 9th resistance R9, the grounded emitter of described 4th switching tube Q4; The base stage of described 4th switching tube Q4 is connected with the anode of the 5th voltage-stabiliser tube Z5 through the 11 resistance R11.5th electric capacity C5 is connected between the collector electrode of the 3rd switching tube Q3 and the emitter of the 4th switching tube Q4, and the voltage of the 5th electric capacity C5 is formed as the second startup power supply VCC2, is that the startup of the second chip is powered.
In the present embodiment, accessory power supply 12 is controlled by the second chip, therefore the first time delay module 13 starts power supply VCC2 by second to power, thus make after the second chip enable, first time delay module 13 just cuts off the power supply of input power VIN, then is that the first chip and the second chip are powered simultaneously by accessory power supply 12.
The specific works principle of foregoing circuit is as described below: first, and input power VIN is that the first electric capacity C1 charges through the second resistance R2 and switching tube Q0, and first starts power supply VCC1 raises gradually, and is the first chip power supply, this the first startup power supply VCC1 is that the 4th electric capacity C4 charges through the 7th resistance R7 simultaneously, the voltage of the 4th electric capacity C4 constantly increases to the 5th voltage-stabiliser tube Z5 conducting and makes the voltage between the base stage of the 4th switching tube Q4 and emitter be greater than the cut-in voltage of the 4th switching tube Q4, thus make the 4th switching tube Q4 conducting and make the 8th resistance R8 and the 9th resistance place branch road conducting, 3rd switching tube Q3 conducting when the voltage at the 8th resistance R8 two ends is greater than the cut-in voltage of the 3rd switching tube Q3, such first startup power supply VCC1 is that the 5th electric capacity C5 charges through the 3rd switching tube Q3, the voltage of the 5th electric capacity C5 is the second startup power supply VCC2, when second starts power supply VCC2 and raise the starting resistor that reaches the second chip gradually and start the second chip, started working by the auxiliary winding M of the second chip controls, be the first chip and the second chip power supply simultaneously, and in the second chip enable process, second starts power supply VCC2 turns off switching tube Q0 after the time delay of the first delay circuit 131, thus cuts off whole charging module 11 to save energy consumption.
Wherein, the second time of delay started between power supply VCC2 and first startup power supply VCC1 set by the selection of device in the second delay circuit 141, carried out the control lag time as selected the value of suitable resistance, electric capacity and voltage-stabiliser tube; First chip and the second chip continue power supply by accessory power supply 12 after startup completes.
Preferably, in order to prevent the adverse current of the 5th electric capacity C5 from causing adverse effect to device, start between power supply VCC1 and the emitter of the 3rd switching tube Q3 first and have additional the 4th diode D4, the negative electrode of the 4th diode D4 is connected with the emitter of the 3rd switching tube Q3.
Preferably, in order to allow the 4th switching tube Q4 work more stable, also can the base stage of the 4th switching tube Q4 be connected the tenth resistance R10 between emitter.
In the chip enable circuit of this second embodiment, because the startup of accessory power supply 12 is by the second chip controls, therefore the first time delay module 13 is just started working when the second chip enable, its input voltage is the second startup power supply VCC2, and switching tube Q0 turns off after the second chip enable completes; Understandably, if the startup of auxiliary winding M is by the first chip controls, then namely switching tube Q0 can turn off after the first chip enable, and now the input power of the first delay circuit 131 is the first startup power supply VCC1, and the start-up course of the second chip is powered by assisting winding M.Certainly, can also according to the needs of side circuit, increase the 3rd or the 4th time delay module etc., like this, can accomplish as multiple chip provides the startup power supply of different sequential.
As mentioned above, chip enable circuit provided by the present invention extends the power-on time of input power VIN by setting up one first time delay module 13, because first starts power supply to obtain the first time delay module delayed action at the starting resistor value place of chip, accessory power supply has start in time enough start-up times and is chip power supply, avoids the problem of the chip enable instability produced existing for prior art.And the time of delay that the first time delay module 13 produces is controlled, by selecting the parameter value of suitable circuit components to carry out the control lag time, so also solve uncontrollable technological deficiency start-up time in prior art.In addition, also can set up second, third time delay module for multiple chip provides the startup power supply of different sequential.
It should be noted that, in chip enable circuit of the present invention, each switching tube mainly plays on-off action at work, in actual applications, can select the device of on-off action as required, as triode, metal-oxide-semiconductor or IGBT etc.
More than in conjunction with preferred embodiment, invention has been described, but the present invention is not limited to the embodiment of above announcement, and should contain the various amendment carried out according to essence of the present invention.

Claims (9)

1. a chip enable circuit, it is characterized in that: comprise charging module (11), accessory power supply (12) and the first time delay module (13), described charging module (11) comprises input power (VIN), charging control circuit (111) and the first electric capacity (C1), described charging control circuit (111) is connected between input power (VIN) and the first electric capacity (C1) and charges to described first electric capacity (C1) with control inputs power supply (VIN), the voltage of described first electric capacity (C1) forms the first startup power supply (VCC1) for starting the first chip, described accessory power supply (12) and first starts power supply (VCC1) and is connected and is controlled by described first chip and is described first chip power supply, described first startup power supply (VCC1) is the first time delay module (11) power supply, described first time delay module (11) exports charging control circuit (111) to postpone to cut off charging module (11) wherein, described charging control circuit (111) comprises the first resistance (R1), second resistance (R2), switching tube (Q0), second diode (D2) and the second voltage-stabiliser tube (Z2), wherein the grid of switching tube (Q0) is connected with input power (VIN) with the second resistance (R2) through the first resistance (R1) respectively with drain electrode, the grid of switching tube (Q0) is connected with the negative electrode of the second voltage-stabiliser tube (Z2), the source electrode of switching tube (Q0) is connected with the anode of the second diode (D2), the anode of the second diode (D2) is connected with the anode of the second voltage-stabiliser tube (Z2), the negative electrode of the second diode (D2) is through the first electric capacity (C1) ground connection, the two ends of described first electric capacity (C1) are also parallel with one the 4th voltage-stabiliser tube (Z4), the plus earth of the 4th voltage-stabiliser tube (Z1), described first time delay module (13) comprises the first delay circuit (131) and the first switching circuit (132), first delay circuit (131) comprises the 3rd diode (D3), 3rd resistance (R3), 4th resistance (R4), 3rd electric capacity (C3) and the 3rd voltage-stabiliser tube (Z3), the input voltage of this first delay circuit (131) is the first startup power supply (VCC1), this input voltage is connected with the negative electrode of the 3rd diode (D3), the anode of the 3rd diode (D3) is successively through the 3rd resistance (R3) and the 3rd electric capacity (C3) ground connection, 4th resistance (R4) is connected in parallel on the two ends of the branch road be made up of the 3rd diode (D3) and the 3rd resistance (R4), the negative electrode of the 3rd voltage-stabiliser tube (Z3) is connected on the tie point of the 3rd resistance (R3) and the 3rd electric capacity (C3), first switching circuit (132) comprises the first switching tube (Q1), the base stage of this first switching tube (Q1) is connected with the anode of the 3rd voltage-stabiliser tube (Z3), its collector electrode is connected with the grid of switching tube (Q0), its grounded emitter.
2. chip enable circuit according to claim 1, is characterized in that:
Described accessory power supply (12) comprises auxiliary winding (M) and the first diode (D1), wherein the negative electrode and first of the first diode (D1) starts power supply (VCC1) and is connected, and the anode of the first diode (D1) is through auxiliary winding (M) ground connection.
3. chip enable circuit according to claim 1, it is characterized in that: described first time delay module (13) also comprises the 5th resistance (R5), between the base stage that described 5th resistance (R5) is connected to described first switching tube (Q1) and emitter.
4. chip enable circuit according to claim 1, it is characterized in that: described charging control circuit (111) also comprises second switch pipe (Q2) and the 6th resistance (R6), described 6th resistance (R6) one end is connected with the source electrode of switching tube (Q0), the other end is connected with the anode of the second diode (D2), the collector electrode of described second switch pipe (Q2) is connected with the grid of switching tube (Q0), the base stage of second switch pipe (Q2) is connected with the source electrode of switching tube (Q0), the emitter of second switch pipe (Q2) is connected with the anode of the second voltage-stabiliser tube (Z2).
5. the chip enable circuit according to any one of claim 1-4, it is characterized in that: also comprise the second time delay module (14), described second time delay module (14) comprises the second delay circuit (141), second switch circuit (142) and the 5th electric capacity (C5), wherein the second delay circuit (141) and second switch circuit (142) are all connected to described first startup power supply (VCC1), described second switch circuit (142) is connected between the second delay circuit (141) and the 5th electric capacity (C5) to control the first startup power supply (VCC1) to described 5th electric capacity (C5) charging, the voltage of described 5th electric capacity (C5) forms the second startup power supply (VCC2) for starting the second chip.
6. chip enable circuit according to claim 5, it is characterized in that: described second delay circuit (141) comprises the 7th resistance (R7), the 4th electric capacity (C4) and the 5th voltage-stabiliser tube (Z5), the input voltage of this second delay circuit (141) is the first startup power supply (VCC1), described first starts power supply (VCC1) successively through the 7th resistance (R7) and the 4th electric capacity (C4) ground connection, and the negative electrode of the 5th voltage-stabiliser tube (Z5) is connected on the tie point of the 7th resistance (R7) and the 4th electric capacity (C4);
Described second switch circuit (142) comprises the 8th resistance (R8), 9th resistance (R9), tenth resistance (R10), 11 resistance (R11), 3rd switching tube (Q3) and the 4th switching tube (Q4), wherein between the 8th resistance (R8) base stage that is connected to the 3rd switching tube (Q3) and emitter, the emitter and first of the 3rd switching tube (Q3) starts power supply (VCC1) and is connected, the base stage of the 3rd switching tube (Q3) is connected through the collector electrode of the 9th resistance (R9) with the 4th switching tube (Q4), the grounded emitter of the 4th switching tube (Q4), the base stage of described 4th switching tube (Q4) is connected through the anode of the 11 resistance (R11) with the 5th voltage-stabiliser tube (Z5),
Described 5th electric capacity (C5) is connected between the collector electrode of the 3rd switching tube (Q3) and the emitter of the 4th switching tube (Q4).
7. chip enable circuit according to claim 6, it is characterized in that: described second time delay module (14) also comprises the tenth resistance (R10), between the base stage that described tenth resistance (R10) is connected to described 4th switching tube (Q4) and emitter.
8. chip enable circuit according to claim 6, it is characterized in that: described second time delay module (14) also comprises the 4th diode (D4), the anode and first of described 4th diode (D4) starts power supply (VCC1) and is connected, and its negative electrode is connected with the emitter of the 3rd switching tube (Q3).
9. chip enable circuit according to claim 8, is characterized in that: described switching tube (Q0) is N-type metal-oxide-semiconductor.
CN201210417249.3A 2012-10-26 2012-10-26 Chip starting circuit Active CN102969782B (en)

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Publication number Priority date Publication date Assignee Title
CN104333722B (en) * 2014-10-30 2017-07-07 青岛歌尔声学科技有限公司 A kind of low-power consumption start-up circuit and a kind of LCD TV
CN105323925A (en) * 2015-11-04 2016-02-10 浙江榆阳电子有限公司 Power supply quick starting circuit
CN109067161B (en) * 2018-08-09 2024-07-30 中国铁道科学研究院集团有限公司 Power supply safety starting system
CN110729883A (en) * 2019-10-25 2020-01-24 天津航空机电有限公司 Quick start circuit applied to flyback converter
CN113555916A (en) * 2020-04-24 2021-10-26 沈阳晨讯希姆通科技有限公司 Charging circuit
CN112098739B (en) * 2020-05-27 2024-02-23 深圳天邦达科技有限公司 Battery pack short-circuit protection test circuit, circuit board and test equipment
CN115149790A (en) * 2022-06-25 2022-10-04 广州金升阳科技有限公司 Start control circuit and switching power supply system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101335513A (en) * 2007-06-27 2008-12-31 北京中电华大电子设计有限责任公司 Power-on system construction applicable to multiple power system smart cards
CN101729048A (en) * 2008-10-23 2010-06-09 佛山普立华科技有限公司 Delay circuit
CN202231609U (en) * 2011-08-03 2012-05-23 深圳市英威腾电气股份有限公司 Current-limiting device and electric system
CN202364112U (en) * 2011-11-20 2012-08-01 合肥华耀电子工业有限公司 Starting circuit of control chip of switching-mode power supply

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102158067B (en) * 2011-04-20 2013-03-27 广州金升阳科技有限公司 Starting circuit for switching power supply

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101335513A (en) * 2007-06-27 2008-12-31 北京中电华大电子设计有限责任公司 Power-on system construction applicable to multiple power system smart cards
CN101729048A (en) * 2008-10-23 2010-06-09 佛山普立华科技有限公司 Delay circuit
CN202231609U (en) * 2011-08-03 2012-05-23 深圳市英威腾电气股份有限公司 Current-limiting device and electric system
CN202364112U (en) * 2011-11-20 2012-08-01 合肥华耀电子工业有限公司 Starting circuit of control chip of switching-mode power supply

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