CN102968353B - A kind of fail address disposal route and device - Google Patents
A kind of fail address disposal route and device Download PDFInfo
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- CN102968353B CN102968353B CN201210417018.2A CN201210417018A CN102968353B CN 102968353 B CN102968353 B CN 102968353B CN 201210417018 A CN201210417018 A CN 201210417018A CN 102968353 B CN102968353 B CN 102968353B
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Abstract
The embodiment of the present invention provides a kind of fail address disposal route and device, relates to computer realm, while guarantee memory read-write is correct, can effectively improve the utilization factor of memory source.Concrete scheme is: read the fail address occurring the storage unit lost efficacy in the first memory stored in second memory, wherein, described fail address stores the unit occurring losing efficacy detected in operational process by operating system OS after, and described second memory is nonvolatile memory; When judging that the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address.The unloading phase that the present invention being mainly used in BIOS fail address processing procedure in.
Description
Technical field
The present invention relates to computer realm, particularly relate to a kind of fail address disposal route and device.
Background technology
Computer system is generally made up of processor, internal memory, input equipment, output device and bus five parts, wherein internal memory be used for specimens preserving device run needed for instruction and data.Internal memory is generally realize with the dynamic RAM (DynamicRandomAccessMemory, DRAM) of semiconductor technology, usually internal memory is made for the ease of changing the memory bar form comprising multiple dram chip.In order to the reliability of memory bar can be made to improve, memory bar often also add 1 or 2 error detection and correction (ErrorCheckingandCorrection, ECC) calibrating chip.
In the prior art, when routine access internal memory, if there is the mistake of a bit in the data in internal memory, can be detected by ECC check code and be corrected, make computing machine can continue normal operation, and record fail address by EEPROM (Electrically Erasable Programmable Read Only Memo) (ElectricallyErasableProgrammableRead-OnlyMemory, EEPROM).But when mistake is more than a bit, due to the error correcting capability exceeding ECC, ECC calibrating chip by error-detecting out but cannot correct, can only cause system cloud gray model mistake, also fail address will be recorded in EEPROM after mistake being detected.Record fail address is in order in system restart process, does not re-use the storage unit that fail address is corresponding, ensures normal program operation.
In the process that information of stating in realization stores, inventor finds prior art, and at least there are the following problems: the fail address of having recorded due to the shielding not adding differentiation after system restart, causes the waste of memory resource.
Summary of the invention
Embodiments of the invention provide a kind of fail address disposal route and device, while guarantee memory read-write is correct, can effectively improve the utilization factor of memory source.
A first aspect of the present invention, provides a kind of fail address disposal route, and the unloading phase of being applied to Basic Input or Output System (BIOS) (BasicInputOutputSystem, BIOS), described method comprises:
Read the fail address occurring the storage unit lost efficacy in the first memory stored in second memory; Wherein, described fail address stores after detecting by operating system (OperatingSystem, OS) unit occurring losing efficacy in operational process, and described second memory is nonvolatile memory;
When judging that the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address.
In conjunction with first aspect, in a kind of possible implementation, after there is the fail address of the storage unit lost efficacy in the first memory stored in described reading second memory, described fail address disposal route also comprises:
Judge the failure type of the storage unit of the appearance inefficacy that described fail address is corresponding, described failure type comprises soft failure and hard failure;
Judge the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described method also comprises:
When the failure type of the storage unit judging the appearance inefficacy that described fail address is corresponding is soft failure, then from described second memory, delete described fail address.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described method also comprises:
When judging that the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is static allocation, then starting protection mechanism.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, the failure type of the storage unit of the appearance inefficacy that the described fail address of described judgement is corresponding, comprising:
The storage unit that the appearance corresponding to described fail address was lost efficacy writes and read test; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit;
If the data read in described storage unit and the data consistent of write, then described storage unit is soft failure;
If the data read in described storage unit and the data of write inconsistent, then described storage unit is hard failure.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described first memory comprises dynamic RAM DRAM, and described second memory comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible,
Described starting protection mechanism comprises: prompting warning is also out of service; Or prompting warning is laid equal stress on starting system;
The described fail address of described shielding comprises: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when OS carries out read-write operation to described first memory.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible,
The address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
A second aspect of the present invention, provides a kind of fail address treating apparatus, and the unloading phase of being applied to BIOS, this device comprises:
Reading unit, for reading the fail address occurring the storage unit lost efficacy in the first memory that stores in second memory; Wherein, described fail address stores after detecting by operating system OS the unit occurring losing efficacy in operational process, and described second memory is nonvolatile memory;
Screen unit, is hard failure for the failure type when the storage unit that judge the appearance inefficacy that fail address that described reading unit reads is corresponding, and when the distribution type of described fail address is dynamic assignment, shields described fail address.
In conjunction with second aspect, in a kind of possibility implementation, described fail address treating apparatus, also comprises:
First judging unit, after reading at described reading unit the fail address occurring the storage unit lost efficacy in the first memory stored in second memory, judge the failure type of the storage unit that appearance corresponding to fail address that described reading unit reads was lost efficacy, described failure type comprises soft failure and hard failure;
Second judging unit, for judging the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation.
In conjunction with second aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described fail address treating apparatus also comprises:
Delete cells, for when the failure type of the storage unit that appearance corresponding to described fail address that described first judging unit judges was lost efficacy is soft failure, deletes described fail address from described second memory.
In conjunction with second aspect and above-mentioned possible implementation, in another kind of possibility implementation, described fail address treating apparatus, also comprises:
Protected location; failure type for the storage unit judging the appearance inefficacy that described fail address is corresponding when described first judging unit is hard failure; and the distribution type of described fail address that described second judging unit judges is when being static allocation, starting protection mechanism.
In conjunction with second aspect and above-mentioned possible implementation, in another kind of possibility implementation, described first judging unit, comprising:
Test module, storage unit corresponding to the fail address for reading described reading unit writes and read test; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit; When the data consistent of the data read in described storage unit and write, determine that described storage unit is soft failure; When the data of the data read in described storage unit and write are inconsistent, determine that described storage unit is hard failure.
In conjunction with second aspect and above-mentioned possible implementation, in another kind of possibility implementation, described first memory comprises dynamic RAM DRAM, and described second memory comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
In conjunction with second aspect and above-mentioned possible implementation, in another kind of possibility implementation,
Described protected location specifically for: prompting warning is also out of service; Or prompting warning is laid equal stress on starting system;
Described screen unit specifically for: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when OS carries out read-write operation to described first memory.
In conjunction with second aspect and above-mentioned possible implementation, in another kind of possibility implementation,
The address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
A kind of fail address disposal route provided by the invention and device, when the failure type of the storage unit that the appearance corresponding to fail address of recording was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address, with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art, distinguish soft failure address and hard failure address, only the dynamically allocate address of hard failure is shielded, avoid memory read-write to make mistakes, and the address space of soft failure can continue to use in internal memory, improve the utilization factor of memory headroom.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
A kind of fail address process flow figure that Fig. 1 provides for the embodiment of the present invention 1;
A kind of fail address process flow figure that Fig. 2 provides for the embodiment of the present invention 2;
A kind of fail address treating apparatus composition schematic diagram that Fig. 3 provides for the embodiment of the present invention 3;
The another kind of fail address treating apparatus composition schematic diagram that Fig. 4 provides for the embodiment of the present invention 3;
A kind of fail address treating apparatus figure that Fig. 5 provides for the embodiment of the present invention 4.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment 1
The embodiment of the present invention provides a kind of fail address disposal route, and the unloading phase of being applied to Basic Input or Output System (BIOS) (BasicInputOutputSystem, BIOS), as shown in Figure 1, the method can comprise:
101, the fail address occurring the storage unit lost efficacy in the first memory stored in second memory is read.
Wherein, after computer system resets, BIOS first brings into operation.BIOS reads in the first memory of storage the fail address occurring the storage unit lost efficacy from second memory, and carries out readwrite tests and matching addresses to it.Described fail address stores after detecting by operating system (OperatingSystem, OS) unit occurring losing efficacy in operational process.
102, when judging that the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, described fail address is shielded.
Wherein, after BIOS reads in the first memory of storage the fail address occurring the storage unit lost efficacy from second memory, readwrite tests is carried out to it, judges that the failure type of the storage unit of the appearance inefficacy that described fail address is corresponding is soft failure or hard failure.If hard failure then can carry out matching addresses to fail address, mate the memory headroom scope whether described fail address belongs to OS dynamic assignment, if this address belongs to the memory headroom scope of OS dynamic assignment, then shield this fail address; If this address belongs to the memory headroom scope of OS static allocation, then starting protection mechanism.
Concrete, OS refers to a software runtime environment, can be transmitting-receiving buffer zone (if network interface card is for sending or receive the buffer memory of data) the storage allocation space of consumer process (process as the application program that user starts) and peripherals based on this environment.The described fail address of described shielding comprises: the page address ranges at place, described fail address is set to reserved property, so that OS carries out no longer using described page address ranges when dynamic memory distributes to described first memory.That is, OS, when storage allocation space, would not use these addresses.
It should be noted that; after BIOS reads in the first memory of storage the fail address occurring the storage unit lost efficacy from second memory; also first matching addresses can be carried out to fail address; again readwrite tests is carried out to this fail address; according to matching result and test result; the memory headroom scope of dynamic assignment and the distribution type of described fail address is supported to be static allocation and the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure, then starting protection mechanism if judge that storage unit that appearance corresponding to this fail address was lost efficacy does not belong to.
Fail address provided by the invention disposal route, when the failure type of the storage unit that the appearance corresponding to fail address of recording was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address, with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art, distinguish soft failure address and hard failure address, only the dynamically allocate address of hard failure is shielded, avoid memory read-write to make mistakes, and the address space of soft failure can continue to use in internal memory, improve the utilization factor of memory headroom.
Embodiment 2
The embodiment of the present invention provides a kind of fail address disposal route, and as shown in Figure 2, the method can comprise:
201, when accessing first memory and losing efficacy, the fail address occurring to lose efficacy is stored in second memory; Wherein, described inefficacy comprises soft failure and hard failure.
Wherein, first memory comprises DRAM, and described second memory comprises EEPROM or flash.Internal memory is one of ingredient of computer system, is mainly used to the instruction and data needed for the operation of specimens preserving device.For the ease of changing the form often making the memory bar comprising multiple dram chip, on memory bar except having dram chip, also have the eeprom chip of a low capacity, eeprom chip can be visited by I2C bus.The information such as address wire figure place, data-line width, time sequence parameter of in store dram chip inside eeprom chip, concrete form has industrywide standard, the present invention is not described in detail at this, and processor can carry out allocate memory controller according to these information, ensures the normal access to memory bar.The capacity of eeprom chip is generally 256 bytes, and the relevant information of preserving the above dram chip only needs 128 bytes, so remaining space can be used for recording the fail address of dram chip on memory bar.
In the process of computer run, when processor access first memory lost efficacy, the fail address occurring to lose efficacy can be stored in second memory by processor.Concrete can be: when routine access internal memory, data all can read and verify according to ECC algorithm by processor together with corresponding check bit, if there is mistake in data and can correct, such as only has a bit errors, then so first error correcting is obtained correct data is recorded in second memory by fail address, and this computer-chronograph just can continue normal operation.But corrupt data is likely soft failure is also likely hard failure; and some memory headroom is protected in the process of operating system; therefore can not test immediately after corrupt data being detected; but test in the BIOS stage after system reboot will be waited until, distinguishing this inefficacy is hard failure or soft failure.If the more error correcting capability beyond ECC algorithm of mistake, such as there is two or more bit-errors simultaneously, so can only fail address be detected and correct data cannot be recovered, now also need to record fail address, because now system cannot continue to run, so must restart system.
Be understandable that, record fail address is to test when normally restarting, and is unavailable by place, the address page setup of hard failure, avoids restarting rear continuation and uses, otherwise once corrupt data accumulation exceeds ECC error correcting capability will cause fault.If same address is repeatedly accessed before the restart, there will be same address and be recorded situation repeatedly, therefore needed first to be confirmed whether recorded before recording address, thus reduce taking of EEPROM space.
202, after BIOS system reboot, the fail address occurring the storage unit lost efficacy is read in described second memory in the described first memory stored.
Wherein, after system reset terminates, BIOS first brings into operation, and performs test and initialization, such as processor, bridge sheet and various input-output apparatus to chip various in computing machine.And then BIOS can read the capacity of memory bar, time sequence parameter configure Memory Controller Hub, so that carry out read-write operation to memory bar from second memory.Then BIOS judges the access unit address information whether saving inefficacy in second memory, if there is preservation, reads the fail address of the first memory stored in second memory.And after reading fail address, directly can carry out next step process, namely read a fail address and process one, until the storage unit process of the inefficacy of the first memory recorded in second memory completes.
Also a form can be prepared especially when BIOS brings into operation, such as E820 table, E820 table can arrange the attribute of address realm corresponding to each fail address based on the fail address of the first memory stored in second memory, wherein can list address realm and the attribute of each section of memory headroom in E820 table, such as retain (reserved) or available (usable), so that use memory headroom according to the access rights of mark in E820 table after os starting, system can be run normally.
Wherein, it is appreciated that, in the prior art, the list item number of E820 table is limited, is determined, such as 32,64 by program design, the remaining storage space of EEPROM is also limited simultaneously, therefore can set two threshold values, first threshold records the list item number of hard failure unit place page address ranges in E820 table, and Second Threshold is the fail address number (comprising hard failure and soft failure) preserved in EEPROM.If there is the storage unit of inefficacy too much, such as there occurs repeatedly internal storage data between operating system runtime to make mistakes, make to be recorded to project sum in EEPROM beyond Second Threshold, or page sum corresponding to the hard failure identified by readwrite tests BIOS unloading phase, then can reporting fault alarm beyond first threshold.
The base unit retained due to memory headroom is 4KB page size, therefore during BIOS carries out readwrite tests, if multiple fail address is positioned at the same page, and have at least a storage unit lost efficacy to be hard failure, then only can retain a record in EEPROM.
203, corresponding to described fail address storage unit writes and read test, determines the failure type of the storage unit of the appearance inefficacy that described fail address is corresponding; If the described failure type occurring the storage unit lost efficacy is soft failure, then perform step 204; If the described failure type occurring the storage unit lost efficacy is hard failure, then perform step 205.
Wherein, when saving the access unit address information of inefficacy in reading second memory, can according to the fail address of the first memory stored in the second memory read, the storage unit corresponding to described fail address writes and read test, determine the failure type of the storage unit that described fail address is corresponding, wherein, generally there is following several possibility in the error in data in internal memory:
(1) production defect.Dram chip produces a small amount of failed storage unit in process of production due to defective workmanship, these unit cannot correctly be read and write, and are called hard failure.
(2) device damage.Dram chip produces a small amount of failed storage unit in operational process due to electric stress, these unit also cannot correctly be read and write, and is hard failure equally.
(3) bit saltus step.Due to the cosmic rays, power-supply fluctuation, signal cross-talk etc. that exist in working environment, these extraneous factors all can make a small amount of location information generation saltus step, such as become 0 from 1, this inefficacy only affects the information that storage unit is preserved, storage unit itself still can normally be read and write, and this situation is called soft failure.
Can find out, whether can read and write according to the storage unit of described inefficacy the storage unit just can distinguishing this inefficacy is normally hard failure or soft failure.Said write and read test for write data in described storage unit, then read data from described storage unit.When the data consistent of the data read in the storage unit that described fail address is corresponding and write, determine that described storage unit is soft failure; When the data of the data read in the storage unit that described fail address is corresponding and write are inconsistent, determine that described storage unit is hard failure.
204, from described second memory, described fail address is deleted.
Wherein, when BIOS is according to the result of readwrite tests, judge that the failure type of the storage unit of the appearance inefficacy that this fail address is corresponding is soft failure, so BIOS will delete this fail address from second memory.This is because for soft failure, it be because the impact of extraneous factor causes, there is randomness, storage unit itself did not lose efficacy, and the storage unit that the appearance that therefore this kind of fail address is corresponding was lost efficacy still can continue to use.So the type of the present invention to fail address judges, the fail address of the soft failure of error in data impact due to extraneous factor is caused to be deleted, make to read and write normal storage unit can continue to use, compared with prior art, improve the storage space utilization factor of internal memory.
Further, in order to avoid equipment, because memory address lost efficacy, gross error occurred, method of the present invention can also comprise the following steps:
205, the distribution type of the storage unit of the appearance inefficacy that described fail address is corresponding is judged; If the distribution type of described fail address is static allocation, then perform step 206; If the distribution type of described fail address is dynamic assignment, then perform step 207.
Wherein, when BIOS is according to the result of readwrite tests, when the failure type judging the storage unit that appearance corresponding to this fail address was lost efficacy is hard failure, the distribution type of the storage unit of the appearance inefficacy that this fail address is corresponding can be judged further, this is because for hard failure, if storage unit exists physical fault, the page at its place can not continue to use, and needs to be set to reserved property.But concerning processor, the purposes of whole memory headroom has certain planning, some memory headroom is that operating system can dynamic assignment, the address space that the transmitting-receiving buffer zone of such as I/O equipment, OS process take and the address space etc. that consumer process takies.If support that the internal storage location of dynamic assignment there occurs inefficacy, reserved property can be set to by BIOS, just obtain less than the address space shielded after such os starting, these address spaces would not be used, do not affect normal operation.But if the internal storage location of static allocation occurs to lose efficacy, OS can make mistakes because accessing the address space of these static allocation, affects the normal work of equipment.
206, starting protection mechanism.
Wherein, judge that the failure type of the storage unit that appearance corresponding to this fail address was lost efficacy is hard failure at BIOS according to the fail address of preserving in second memory; and when the distribution type of the storage unit of the appearance inefficacy that described fail address is corresponding is static allocation, BIOS can starting protection mechanism.Described protection mechanism can be prompting warning and out of service, also can be prompting warning and restarting systems, or also this fail address can be written in the storeies such as flash memory, so that follow-up misarrangement and maintenance.Such as, OS kernel is loaded into fixed address in internal memory by BIOS BIOS unloading phase, can not support the address of dynamic assignment, if having storage unit to occur mistake within the scope of this sector address, the normal work of equipment will be affected, can only report and alarm stop the continuation of BIOS to run.
The page address ranges at the storage unit place of 207, appearance corresponding for described fail address being lost efficacy is set to reserved property, not use the memory page that described page address ranges is corresponding when OS carries out address assignment.
Wherein, when according to the Page Range of the fail address of preserving in second memory, BIOS judges that the distribution type of the storage unit that appearance corresponding to this fail address was lost efficacy is dynamic assignment, the storage unit place page address ranges that appearance corresponding for described fail address was lost efficacy can be added BIOS and in advance be set to reserved property in ready E820 table by BIOS, operating system would not continue to use this section of memory headroom so after system start-up, ensure that system normal operation after restart.
Detecting that the distribution type of this fail address is dynamic assignment and the failure type of described fail address is hard failure, and added E820 table in be set to reserved property after, BIOS can continue to detect in second memory whether also there is fail address, if exist, continue to perform step 202-207, until the fail address of recording in second memory has all processed.
It should be noted that, in the embodiment of the present invention, step 203 determines that the failure type of the storage unit of the appearance inefficacy that fail address is corresponding and step 205 judge that the order of the distribution type of the storage unit of the appearance inefficacy that fail address is corresponding can be exchanged, namely also first can judge the distribution type of the storage unit that appearance corresponding to fail address was lost efficacy, then determine the failure type of the storage unit that appearance corresponding to fail address was lost efficacy.The embodiment of the present invention does not limit at this.
A kind of fail address provided by the invention disposal route, when the failure type of the storage unit that the appearance corresponding to fail address of recording was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address, with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art, distinguish soft failure address and hard failure address, only the dynamically allocate address of hard failure is shielded, avoid memory read-write to make mistakes, and the address space of soft failure can continue to use in internal memory, improve the utilization factor of memory headroom.
And; when the failure type of the storage unit that appearance corresponding to fail address was lost efficacy is hard failure and the distribution type of described fail address is static allocation; starting protection mechanism; with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art; by the Address Recognition of static allocation out; pre-cooling protection mechanism, avoids processor to continue to run generation gross error.
Embodiment 3
The embodiment of the present invention provides a kind of fail address treating apparatus, the unloading phase of being applied to BIOS, as shown in Figure 3, comprising: reading unit 31 and screen unit 32.
Reading unit 31, for reading the fail address occurring the storage unit lost efficacy in the first memory that stores in second memory; Wherein, described fail address stores after detecting by operating system OS the unit occurring losing efficacy in operational process, and described second memory is nonvolatile memory.
Screen unit 32, is hard failure for the failure type when the storage unit that judge the appearance inefficacy that fail address that described reading unit 31 reads is corresponding, and when the distribution type of described fail address is dynamic assignment, shields described fail address.
Further, as shown in Figure 4, this fail address treating apparatus can also comprise: the first judging unit 33, second judging unit 34.
First judging unit 33, for read in the first memory stored in second memory at described reading unit 31 occur lost efficacy storage unit fail address after, judge the failure type of the storage unit that appearance corresponding to fail address that described reading unit 31 reads was lost efficacy, described failure type comprises soft failure and hard failure.
Second judging unit 34, for judging the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation
Further, described fail address treating apparatus can also comprise: delete cells 35.
Delete cells 35, when the failure type of the storage unit of the appearance inefficacy that the described fail address for judging at described first judging unit 33 is corresponding is soft failure, deletes described fail address from described second memory.
Further, this fail address treating apparatus can also comprise: protected location 36.
Protected location 36; failure type for the storage unit judging the appearance inefficacy that described fail address is corresponding when described first judging unit 33 is hard failure; and the distribution type of described fail address that described second judging unit 34 judges is when being static allocation, starting protection mechanism.
Further, this first judging unit 33, comprising: test module 331.
Test module 331, writes and read test for the storage unit corresponding to the fail address of described reading unit 31 reading; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit; When the data consistent of the data read in described storage unit and write, determine that described storage unit is soft failure; When the data of the data read in described storage unit and write are inconsistent, determine that described storage unit is hard failure.
Further, described first memory comprises dynamic RAM DRAM, and described second memory comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
Further, described protected location 36 specifically for: prompting warning is also out of service, or prompting warning is laid equal stress on starting system.
Described screen unit 32 specifically for: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when OS carries out read-write operation to described first memory.
Further, the address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
A kind of fail address provided by the invention treating apparatus, when the failure type of the storage unit that the appearance corresponding to fail address of recording was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address, with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art, distinguish soft failure address and hard failure address, only the dynamically allocate address of hard failure is shielded, avoid memory read-write to make mistakes, and the address space of soft failure can continue to use in internal memory, improve the utilization factor of memory headroom.
And; when the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is static allocation; starting protection mechanism; with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art; by the Address Recognition of static allocation out; pre-cooling protection mechanism, avoids processor to continue to run generation gross error.
Embodiment 4
The embodiment of the present invention also provides a kind of fail address treating apparatus, as shown in Figure 5, comprising: processor 51, first memory 52, second memory 53 and BIOS storer 54, and this device can be PC or server, or other equipment.
In the present embodiment, described BIOS storer 54 stores bios program code, and from described BIOS storer 54, read these bios program codes after processor 51 powers on, processor 51 performs being implemented as follows of these program codes:
Processor 51, for reading the fail address of storage unit occurring in the first memory 52 that stores in second memory 53 losing efficacy.Wherein, described fail address stores after detecting by operating system OS the unit occurring losing efficacy in operational process, and described second memory is nonvolatile memory.
Described processor 51, the failure type of the storage unit also lost efficacy for the appearance corresponding when the fail address that described processor 51 reads be hard failure and the distribution type of described fail address is static allocation time, starting protection mechanism.
Described processor 51, be also hard failure for the storage unit corresponding when described fail address and the distribution type of described fail address is dynamic assignment time, shield described fail address.After subsequent processor 51 starts OS, occur that fail address can be stored in second memory 53 by the storage unit lost efficacy if detect in OS operational process.
Further, described processor 51, also for after reading the fail address occurring the storage unit lost efficacy in the first memory stored in second memory, judge the failure type of the storage unit of the appearance inefficacy that the fail address of reading is corresponding, described failure type comprises soft failure and hard failure, and judging the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation.
Further, described processor 51, when being also soft failure for the failure type of the storage unit lost efficacy in appearance corresponding to described fail address judged, deletes described fail address from described second memory 53.
Further, described processor 51, be also hard failure for the failure type of the storage unit lost efficacy when appearance corresponding to described fail address judged and the distribution type of described fail address is static allocation time, starting protection mechanism.
Further, described processor 51 also for: storage unit corresponding to fail address read is write and read test; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit; When the data consistent of the data read in described storage unit and write, determine that described storage unit is soft failure; When the data of the data read in described storage unit and write are inconsistent, determine that described storage unit is hard failure.
Further, described first memory 52 comprises dynamic RAM DRAM, and described second memory 53 comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
Further, described start unit 36 specifically for: prompting warning is also out of service, or prompting warning is laid equal stress on starting system.Described screen unit 32 specifically for: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when OS carries out read-write operation to described first memory.
Further, the address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
A kind of fail address provided by the invention treating apparatus, when the failure type of the storage unit that the appearance corresponding to fail address of recording was lost efficacy is hard failure and the distribution type of described fail address is dynamic assignment, shield described fail address, with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art, distinguish soft failure address and hard failure address, only the dynamically allocate address of hard failure is shielded, avoid memory read-write to make mistakes, and the address space of soft failure can continue to use in internal memory, improve the utilization factor of memory headroom.
And; when the failure type of the storage unit that appearance corresponding to described fail address was lost efficacy is hard failure and the distribution type of described fail address is static allocation; starting protection mechanism; with directly storage unit corresponding for all fail addresses is all set to compared with reserved property in prior art; by the Address Recognition of static allocation out; pre-cooling protection mechanism, avoids processor to continue to run generation gross error.
Through the above description of the embodiments, those skilled in the art can be well understood to the mode that the present invention can add required common hardware by software and realize, and can certainly pass through hardware, but in a lot of situation, the former is better embodiment.Based on such understanding, technical scheme of the present invention can embody with the form of software product the part that prior art contributes in essence in other words, this computer software product is stored in the storage medium that can read, as the floppy disk of computing machine, hard disk or CD etc., comprise some instructions and perform method described in each embodiment of the present invention in order to make a computer equipment (can be personal computer, server, or the network equipment etc.).
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (12)
1. a fail address disposal route, is characterized in that, the unloading phase of being applied to basic input-output system BIOS, described method comprises:
Described BIOS reads the fail address occurring the storage unit lost efficacy in the first memory stored in second memory; Wherein, described fail address stores the unit occurring losing efficacy detected in operational process by operating system OS after, and described second memory is nonvolatile memory;
Described BIOS judges the failure type of the storage unit of the appearance inefficacy that described fail address is corresponding, and described failure type comprises soft failure and hard failure; Judge the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation;
When the failure type of the storage unit judging the appearance inefficacy that described fail address is corresponding is hard failure, and the distribution type of described fail address is when being dynamic assignment, described BIOS shields described fail address, the described fail address of described shielding comprises: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when described OS carries out read-write operation to described first memory;
When the failure type of the storage unit judging the appearance inefficacy that described fail address is corresponding is soft failure, then described BIOS deletes described fail address from described second memory.
2. fail address according to claim 1 disposal route, is characterized in that, also comprise:
When the failure type of the storage unit judging the appearance inefficacy that described fail address is corresponding is hard failure, and when the distribution type of described fail address is static allocation, then starting protection mechanism.
3. fail address according to claim 1 disposal route, is characterized in that, the failure type of the storage unit of the appearance inefficacy that the described fail address of described judgement is corresponding, comprising:
The storage unit that the appearance corresponding to described fail address was lost efficacy writes and read test; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit;
If the data read in described storage unit and the data consistent of write, then described storage unit is soft failure;
If the data read in described storage unit and the data of write inconsistent, then described storage unit is hard failure.
4. the fail address disposal route according to any one of claim 1-3, is characterized in that, described first memory comprises dynamic RAM DRAM, and described second memory comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
5. fail address according to claim 2 disposal route, is characterized in that,
Described starting protection mechanism comprises: prompting warning is also out of service; Or prompting warning is laid equal stress on starting system.
6. fail address according to claim 1 disposal route, is characterized in that,
The address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
7. a fail address treating apparatus, is characterized in that, the unloading phase of being applied to basic input-output system BIOS, described device comprises:
Reading unit, for reading the fail address occurring the storage unit lost efficacy in the first memory that stores in second memory; Wherein, described fail address stores the unit occurring losing efficacy detected in operational process by operating system OS after, and described second memory is nonvolatile memory;
First judging unit, after reading at described reading unit the fail address occurring the storage unit lost efficacy in the first memory stored in second memory, judge the failure type of the storage unit that appearance corresponding to fail address that described reading unit reads was lost efficacy, described failure type comprises soft failure and hard failure;
Second judging unit, for judging the distribution type of described fail address, described distribution type comprises dynamic assignment and static allocation;
Screen unit, be hard failure for the failure type when the storage unit that judge the appearance inefficacy that fail address that described reading unit reads is corresponding, and the distribution type of described fail address is when being dynamic assignment, shield described fail address, described screen unit specifically for: the page address ranges at place, described fail address is set to reserved property, not re-use described page address ranges when OS carries out read-write operation to described first memory;
Delete cells, for when the failure type of the storage unit that appearance corresponding to described fail address that described first judging unit judges was lost efficacy is soft failure, deletes described fail address from described second memory.
8. fail address according to claim 7 treating apparatus, is characterized in that, also comprise:
Protected location; failure type for the storage unit judging the appearance inefficacy that described fail address is corresponding when described first judging unit is hard failure; and the distribution type of described fail address that described second judging unit judges is when being static allocation, starting protection mechanism.
9. fail address according to claim 7 treating apparatus, is characterized in that, described first judging unit, comprising:
Test module, storage unit corresponding to the fail address for reading described reading unit writes and read test; Wherein, said write and read test for write data in described storage unit, then read data from described storage unit; When the data consistent of the data read in described storage unit and write, determine that described storage unit is soft failure; When the data of the data read in described storage unit and write are inconsistent, determine that described storage unit is hard failure.
10. the fail address treating apparatus according to any one of claim 7-9, it is characterized in that, described first memory comprises dynamic RAM DRAM, and described second memory comprises EEPROM (Electrically Erasable Programmable Read Only Memo) EEPROM or flash storer.
11. fail address according to claim 8 treating apparatus, is characterized in that,
Described protected location specifically for: prompting warning is also out of service; Or prompting warning is laid equal stress on starting system.
The treating apparatus of 12. fail addresses according to claim 7, is characterized in that,
The address of dynamic assignment comprises: the transmitting-receiving buffer zone of the address space that the address space that OS process takies, consumer process take and I/O I/O equipment;
The address of static allocation comprises: the address space that OS kernel takies, BIOS buffer zone and screen buffer.
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| US9691505B2 (en) * | 2015-03-27 | 2017-06-27 | Intel Corporation | Dynamic application of error correction code (ECC) based on error type |
| JP6363587B2 (en) | 2015-12-14 | 2018-07-25 | 株式会社ソニー・インタラクティブエンタテインメント | Information processing apparatus and warning presenting method |
| CN115757196B (en) * | 2022-11-09 | 2023-09-01 | 超聚变数字技术有限公司 | Memory, memory access method and computing device |
| CN115934588B (en) * | 2023-03-10 | 2023-08-04 | 长鑫存储技术有限公司 | Failure address processing method and device and electronic equipment |
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