CN102957400B - A kind of broadband amplitude equalization compensation device - Google Patents
A kind of broadband amplitude equalization compensation device Download PDFInfo
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- CN102957400B CN102957400B CN201110249364.XA CN201110249364A CN102957400B CN 102957400 B CN102957400 B CN 102957400B CN 201110249364 A CN201110249364 A CN 201110249364A CN 102957400 B CN102957400 B CN 102957400B
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Abstract
The present invention relates to a kind of broadband amplitude equalization compensation device, comprise signal input part, phasing coupler, detection module, clock source, A/D circuit, FPGA and test module; Described signal input part is connected with phasing coupler, described phasing coupler one end is connected with test module, the other end and detection model calling, and described detection module, A/D circuit, FPGA connect successively, described FPGA is connected with test module, and described clock source is connected with A/D circuit.Compared with prior art, the present invention has design succinctly easy, the advantage such as cost is low, good stability.
Description
Technical field
The present invention relates to a kind of broadband correlation technique, especially relate to a kind of broadband amplitude equalization compensation device.
Background technology
Broadband test device general at present, the amplitude measurements for measured signal can change along with the change of external environment or the increase of service time, thus affects the accuracy of amplitude measurement.Broadband test device Amplitude Compensation generally adopts following two kinds of modes:
1, calibrating cable, calibration source are connected with testing apparatus, step value of manually adjusting frequency, testing apparatus arranges corresponding Frequency point, and the measurement difference of calibration source and testing apparatus is preserved, as offset data;
2, calibrating cable, calibration source are connected with testing apparatus, and the network interface of the network interface of calibration source or GPIB mouth and testing apparatus or GPIB are connected, testing apparatus adopts special calibration procedure, software arranges the frequency values of calibration source and testing apparatus simultaneously, equally difference is preserved, as offset data.
These two kinds of compensation ways all need external calibration source and calibrating cable, and then need repeatedly to connect calibration source when certainty of measurement requires high and calibrate, if frequency band is wider, then the alignment time is doubled and redoubled; Meanwhile, because often need to connect calibration source and testing apparatus by joint, the uncertainty in measurement is also brought.And testing apparatus is to outside work, then needs to carry a calibration source more, also bring inconvenience.
Summary of the invention
Object of the present invention be exactly in order to overcome above-mentioned prior art exist defect and provide a kind of design succinctly easy, cost is low, the broadband amplitude equalization compensation device of good stability.
Object of the present invention can be achieved through the following technical solutions:
A kind of broadband amplitude equalization compensation device, is characterized in that, comprise signal input part, phasing coupler, detection module, clock source, A/D circuit, FPGA and test module; Described signal input part is connected with phasing coupler, described phasing coupler one end is connected with test module, the other end and detection model calling, and described detection module, A/D circuit, FPGA connect successively, described FPGA is connected with test module, and described clock source is connected with A/D circuit;
Measured signal is input in phasing coupler by described signal input part, phasing coupler exports a road to test module, export another road to detection module, front end signal is divided into two-way by described detection module, and process respectively, A/D circuit is sent to after process, after two-way detecting circuit is converted to digital signal by A/D circuit, send to FPGA data processing module, data processing module by the two-way detection data of front end respectively by two different comparators, judge which circuit-switched data is effective, effective data group will be chosen to output to linear interpolation compensating unit, linear interpolation compensating unit carries out linear interpolation compensation to the frequency response value under different frequency, then with data processing module process after data carry out summation operation, the accurate range value obtained is exported to test module, test module is revised actual web angle value in real time according to accurate range value, to ensure that the precision of amplitude measurement is with accurate.
Also comprise thermostat, described phasing coupler, detection module, clock source, A/D circuit, FPGA put into thermostat, keep temperature constant state, eliminate the uncertainty of the measurement that exterior temperature change is brought.
The amplitude compensation value that described frequency response value is signal after by thermostat under different frequency.
Also comprise display screen, be presented at display screen during measurement amplitude fructufy.
This supplementary device, by detecting measured signal amplitude size in real time as calibration reference, does not need to connect separately external calibration signal source.
Described detection module comprises power splitter, the first fixed attenuator, the second fixed attenuator, high-power detection module and low-level detection module, described power splitter is connected with the first fixed attenuator, the second fixed attenuator respectively, the first described fixed attenuator and high-power detection model calling, the second described fixed attenuator and low-level detection model calling;
Front end signal is divided into two-way by described power splitter, leads up to the first fixed attenuator, and signal is carried out large decay, then high-power detection module is entered into, voltage passing ratio after detection amplifies, and adjusts effective detecting circuit output area, sends into A/D circuit front-end; Another road signal, by the second fixed attenuator, carries out little decay signal, then enters into low-level detection module, and the voltage after detection, by different scale amplifying, adjusts effective detecting circuit to different range, sends into A/D circuit front-end.
This compensation arrangement obtains the amplitude size of measured signal by the mode of directional coupler, detection module and FPGA.
Compared with prior art, the present invention has the following advantages:
1) design succinctly easy, cost is low, good stability, can be widely used in the testing apparatus such as spectrum analyzer, radio-frequency transmitter.
2) amplitude calibration offset data can be provided in real time, not need interrupt test to calibrate separately, while saving Measuring Time, ensure that the accuracy of measurement.
3) save external calibration source and external cable, eliminate the measuring uncertainty that repeatedly stube cable brings.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention;
Fig. 2 is the structural representation of detection module of the present invention;
Fig. 3 is the structural representation of data processing module of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment
As shown in Figure 1, a kind of broadband amplitude equalization compensation device, comprises signal input part 1, phasing coupler 2, detection module 3, clock source 4, A/D circuit 5, FPGA6, test module 7 and thermostat 8; Described signal input part 1 is connected with phasing coupler 2, described phasing coupler 2 one end is connected with test module 7, the other end is connected with detection module 3, described detection module 3, A/D circuit 5, FPGA6 connect successively, described FPGA6 is connected with test module 7, and described clock source 4 is connected with A/D circuit 5; Described phasing coupler 2, detection module 3, clock source 4, A/D circuit 5, FPGA6 put into thermostat 8, keep temperature constant state, eliminate the uncertainty of the measurement that exterior temperature change is brought.
Phasing coupler 2: measured signal coupling power is exported a road, for being supplied to the power input of detection module.
As shown in Figure 2, detection module 3: comprise power splitter 31, first fixed attenuator 32, second fixed attenuator 33, high-power detection module 34 and low-level detection module 35, described power splitter 31 is connected with the first fixed attenuator 32, second fixed attenuator 33 respectively, the first described fixed attenuator 32 is connected with high-power detection module 34, and the second described fixed attenuator 33 is connected with low-level detection module 35;
Front end signal is divided into two-way by described power splitter 31, leads up to the first fixed attenuator 32, and signal is carried out large decay, then high-power detection module 34 is entered into, voltage passing ratio after detection amplifies, and adjusts effective detecting circuit output area, sends into A/D circuit front-end; Another road signal, by the second fixed attenuator 33, carries out little decay signal, then enters into low-level detection module 35, and the voltage after detection, by different scale amplifying, adjusts effective detecting circuit to different range, sends into A/D circuit front-end.
As shown in Figure 3, data processing module: the two-way detection data of front end, by two different comparators, judges which circuit-switched data is effective, then chooses effective data group to output to linear interpolation compensating unit.
A/D circuit 5: the data of real-time sampling detection module.
Clock source 4: provide high speed sampling clock to A/D.
FPGA6: the data after process A/D, obtain high-precision amplitude measurements, and give test module by data.
Operation principle: measured signal is input in phasing coupler 2 by signal input part 1, phasing coupler 2 exports a road to test module 7, export another road to detection module 3, described detection module 3 calculates the magnitude of voltage corresponding with measured signal amplitude in real time, passing ratio amplifies (reducing) circuit, adjustment magnitude of voltage size, to meet the A/D input interface voltage requirements with rear end.Then after corresponding voltage value being converted to digital signal by A/D circuit 5, send to FPGA6, value after the frequency response value of storage and A/D processing of circuit carries out obtaining accurate range value after summation processes by FPGA6, export to test module 7, test module 7 is revised actual web angle value in real time according to accurate range value, to ensure that the precision of amplitude measurement is with accurate.The amplitude compensation value that described frequency response value is signal after by thermostat under different frequency.
The present invention can cpu peripheral and display screen, and display when measuring amplitude fructufy on a display screen, separately as a band amplitude measurement mechanism; Also can be used as a module of other measurement mechanisms, as real-time Amplitude Compensation standard foundation simultaneously.
Claims (6)
1. a broadband amplitude equalization compensation device, is characterized in that, comprises signal input part, phasing coupler, detection module, clock source, A/D circuit, FPGA and test module; Described signal input part is connected with phasing coupler, described phasing coupler one end is connected with test module, the other end and detection model calling, and described detection module, A/D circuit, FPGA connect successively, described FPGA is connected with test module, and described clock source is connected with A/D circuit;
Measured signal is input in phasing coupler by described signal input part, phasing coupler exports a road to test module, export another road to detection module, front end signal is divided into two-way by described detection module, and process respectively, A/D circuit is sent to after process, after two-way detecting circuit is converted to digital signal by A/D circuit, send to FPGA data processing module, data processing module by the two-way detection data of front end respectively by two different comparators, judge which circuit-switched data is effective, effective data group will be chosen to output to linear interpolation compensating unit, linear interpolation compensating unit carries out linear interpolation compensation to the frequency response value under different frequency, then with data processing module process after data carry out summation operation, the accurate range value obtained is exported to test module, test module is revised actual web angle value in real time according to accurate range value, to ensure that the precision of amplitude measurement is with accurate,
Described detection module comprises power splitter, the first fixed attenuator, the second fixed attenuator, high-power detection module and low-level detection module, described power splitter is connected with the first fixed attenuator, the second fixed attenuator respectively, the first described fixed attenuator and high-power detection model calling, the second described fixed attenuator and low-level detection model calling;
Front end signal is divided into two-way by described power splitter, leads up to the first fixed attenuator, and signal is carried out large decay, then high-power detection module is entered into, voltage passing ratio after detection amplifies, and adjusts effective detecting circuit output area, sends into A/D circuit front-end; Another road signal, by the second fixed attenuator, carries out little decay signal, then enters into low-level detection module, and the voltage after detection, by different scale amplifying, adjusts effective detecting circuit to different range, sends into A/D circuit front-end.
2. a kind of broadband amplitude equalization compensation device according to claim 1, it is characterized in that, also comprise thermostat, described phasing coupler, detection module, clock source, A/D circuit, FPGA put into thermostat, keep temperature constant state, eliminate the uncertainty of the measurement that exterior temperature change is brought.
3. a kind of broadband amplitude equalization compensation device according to claim 2, is characterized in that, the amplitude compensation value that described frequency response value is signal after by thermostat under different frequency.
4. a kind of broadband amplitude equalization compensation device according to claim 1, is characterized in that, also comprise display screen, is presented at display screen during measurement amplitude fructufy.
5. a kind of broadband amplitude equalization compensation device according to claim 1, is characterized in that, this compensation arrangement, by detecting measured signal amplitude size in real time as calibration reference, does not need to connect separately external calibration signal source.
6. a kind of broadband amplitude equalization compensation device according to claim 1, is characterized in that, this compensation arrangement obtains the amplitude size of measured signal by the mode of directional coupler, detection module and FPGA.
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| CN201110249364.XA CN102957400B (en) | 2011-08-26 | 2011-08-26 | A kind of broadband amplitude equalization compensation device |
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| CN201110249364.XA CN102957400B (en) | 2011-08-26 | 2011-08-26 | A kind of broadband amplitude equalization compensation device |
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| CN102957400B true CN102957400B (en) | 2015-08-19 |
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| CN109541309B (en) * | 2018-12-18 | 2020-12-01 | 深圳市鼎阳科技股份有限公司 | Spectrum analyzer and signal processing method thereof |
| CN112272036B (en) * | 2020-12-24 | 2021-03-23 | 深圳市鼎阳科技股份有限公司 | Temperature compensation device and method for radio frequency receiver and radio frequency receiver |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101308175A (en) * | 2008-07-14 | 2008-11-19 | 北京航大智慧科技有限公司 | Phase spectrum analyzer |
| CN101841901A (en) * | 2009-12-30 | 2010-09-22 | 中国科学院电子学研究所 | Closed-loop automatic gain automatic control device and method for radio-frequency channel |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101308175A (en) * | 2008-07-14 | 2008-11-19 | 北京航大智慧科技有限公司 | Phase spectrum analyzer |
| CN101841901A (en) * | 2009-12-30 | 2010-09-22 | 中国科学院电子学研究所 | Closed-loop automatic gain automatic control device and method for radio-frequency channel |
Non-Patent Citations (1)
| Title |
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| 射频频谱分析仪的设计研究;梁强;《中国优秀硕士学位论文全文数据库•工程科技II辑》;20060915(第9期);正文第41-45页 * |
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Address after: Block C, No. 7, Lane 205, Gaoji Road, Songjiang District, Shanghai, 201601 Patentee after: Chuangyuan Xinke (Shanghai) Technology Co.,Ltd. Address before: 201611 Shanghai Songjiang District Chedun town Xiangche Road No. 206 Patentee before: TRANSCOM INSTRUMENTS Co.,Ltd. |