CN102880591A - 3780-point discrete Fourier transformation processing method and circuit - Google Patents

3780-point discrete Fourier transformation processing method and circuit Download PDF

Info

Publication number
CN102880591A
CN102880591A CN2012102725158A CN201210272515A CN102880591A CN 102880591 A CN102880591 A CN 102880591A CN 2012102725158 A CN2012102725158 A CN 2012102725158A CN 201210272515 A CN201210272515 A CN 201210272515A CN 102880591 A CN102880591 A CN 102880591A
Authority
CN
China
Prior art keywords
wfta
data
storer
level
operation result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012102725158A
Other languages
Chinese (zh)
Other versions
CN102880591B (en
Inventor
顾明飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Kaitengsifang Sifang Digital Broadcast & Television Equipment Co Ltd
Original Assignee
Chengdu Kaitengsifang Sifang Digital Broadcast & Television Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Kaitengsifang Sifang Digital Broadcast & Television Equipment Co Ltd filed Critical Chengdu Kaitengsifang Sifang Digital Broadcast & Television Equipment Co Ltd
Priority to CN201210272515.8A priority Critical patent/CN102880591B/en
Publication of CN102880591A publication Critical patent/CN102880591A/en
Application granted granted Critical
Publication of CN102880591B publication Critical patent/CN102880591B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Complex Calculations (AREA)

Abstract

The invention discloses a 3780-point discrete Fourier transformation processing method and a 3780-point discrete Fourier transformation processing circuit and relates to a Fourier transformation processor in an orthogonal frequency division multiplexing (OFDM) system. The invention is characterized in that 3780-point discrete data are resolved into 3*3*3*4*5*7 and sequentially subjected to first-stage 3-point Winograd Fourier transformation algorithm (WFTA) operation processing, second-stage 3-point WFTA operation processing, third-stage 3-point WFTA operation processing, fourth-stage 4-point WFTA operation processing, fifth-stage 5-point WFTA operation processing and sixth-stage 7-point WFTA operation processing; a data sequence after operation processing is adjusted; and a processing result is output. The invention is mainly applicable to a modulator-demodulator in a Chinese ground digital television.

Description

Leaf transformation disposal route and circuit in a kind of 3780 point discrete Fouriers
Technical field
The present invention relates to the fourier transform processor in a kind of OFDM (OFDM) system, refer more particularly to the modulator-demodular unit in the Chinese terrestrial DTV.
Background technology
Explanation of technical terms in the literary composition:
OFDM: OFDM;
FFT: Fast Fourier Transform (FFT);
IFFT: inverse fast Fourier transform;
PFA: prime factor algorithm is a kind of of fast fourier transform algorithm.
The WFTA:Winograd Fourier transform.
Use the OFDM technology in China's ground digital transmission standard, adopted 3780 FFT/IFFT processors to realize the signal modulating/demodulating.For transmitting terminal and receiving end, 3780 FFT/IFFT processors are not only quite crucial, and implement and have certain complexity.
In the existing implementation, more typical scheme is to utilize mixed base, PFA and WFTA algorithm to resolve into 63 * 60 (schemes 1) or 27 * 140 (schemes 2) with 3780, then progressively realizes stage by stage 3780 FFT/IFFT.
The specific practice of described scheme 1 is:
S1: calculate 63 FFT;
S2: result of calculation multiply by twiddle factor before;
S3: calculate again 60 FFT.
The specific practice of described scheme 2 is:
S1: calculate 140 FFT;
S2: calculate 27 FFT.
Yet no matter scheme 1 or scheme 2, the algorithm that they combine at WFTA, PFA, mixed base has used too many cycling.With 60 FFT computing examples in the scheme 1, it needs 20 3 WFTA computings, 15 4 WFTA, 22 5 WFTA; 140 FFT in the scheme 2, it needs 35 4 WFTA computings, 28 5 WFTA, 20 7 WFTA, cycle index is too many, and water operation is difficult to realize that processing delay is very large.And the linking between the small point WFTA computing of each decomposition need to be used for storage intermediate operations result's buffer memory (such as the 1st time in 20 3 WFTA computings of 60 FFT computings of scheme 1, the partial results that needs the 1st 3 WFTA computings of buffer memory in order to connect the 1st 3 WFTA computings and the 2nd 3 WFTA computings), this has not only consumed the RAM resource, has strengthened simultaneously the time delay of whole system.
Summary of the invention
Flowing water program for the time delay that reduces to greatest extent system, conserve storage, simplification computings at different levels the present invention proposes a kind of 3780 FFT disposal routes and circuit.
The leaf transformation disposal route may further comprise the steps in 3780 point discrete Fouriers that the present invention adopts: 3780 discrete datas of ordered pair are carried out 3 WFTA calculation process of the first order, 3 the WFTA calculation process in the second level, 3 WFTA calculation process of the third level, 4 WFTA calculation process of the fourth stage, 5 WFTA calculation process of level V, the 6th grade of 7 WFTA calculation process successively, adjust afterwards the order through the data after the 6th grade of 7 WFTA calculation process, export at last result.
Preferably, the step of 3 WFTA calculation process of the described first order is:
S101: described 3780 discrete datas enter 3 WFTA calculation process of the first order successively, deposit successively 2519 data of the 0th data to that are introduced in storer 1_1, storer 1_2; Described storer 1_1, storer 1_2 are 1260 storer;
S102: when the 2520th data arrive, get the 0th data and the 1260th data, the 0th data, the 1260th data and the 2520th data are carried out 3 FFT calculation process, obtain the 1st group of the 0th one-level FFT operation result, the 1st one-level FFT operation result and the 2nd one-level FFT operation result; With the 1st one-level FFT operation result of the 1st group and the 2nd one-level FFT operation result respectively with twiddle factor rear corresponding described storer 1_1, the storer 1_2 of depositing back that multiply each other;
Repeating step S102, until the 3779th data arrive, get the 1259th data and the 2519th data, the 1259th data, the 2519th data and the 3779th data are carried out 3 FFT calculation process, obtain the 1260th group the 0th one-level FFT operation result, the 1st one-level FFT operation result and the 2nd one-level FFT operation result; With the 1st one-level FFT operation result in the 1260th group and the 2nd one-level FFT operation result respectively with twiddle factor rear corresponding described storer 1_1, the storer 1_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th one-level FFT operation result in a group, just the 0th one-level FFT operation result sent to 3 the WFTA calculation process in the second level successively, until the 0th one-level FFT operation result in the 1260th group sent to 3 the WFTA calculation process in the second level;
S103: the data among the storer 1_1 successively order are sent to 3 the WFTA calculation process in the second level;
S104: the data among the storer 1_2 successively order are sent to 3 the WFTA calculation process in the second level.
Preferably, 3 the WFTA calculation process in the described second level are used for comprising step:
S201: deposit front 840 data of 3 WFTA calculation process of first order output successively order in storer 2_1 and storer 2_2; Described storer 2_1 and storer 2_2 are 420 storer;
S202: when 3 WFTA calculation process of the first order are exported the 840th data, read the 0th data and the 420th data, the 0th data, the 420th data and the 840th data are carried out 3 FFT calculation process, obtain the 1st group of the 0th secondary FFT operation result, the 1st secondary FFT operation result and the 2nd secondary FFT operation result; With the 1st secondary FFT operation result and the 2nd secondary FFT operation result respectively with twiddle factor rear corresponding described storer 2_1, the storer 2_2 of depositing back that multiply each other;
Repeating step S202, until the 1259th data arrive, get the 419th data and the 839th data, the 419th data, the 839th data and the 1259th data are carried out 3 FFT calculation process, obtain the 420th group of the 0th secondary FFT operation result, the 1st secondary FFT operation result and the 2nd secondary FFT operation result; With the 1st secondary FFT operation result in the 420th group and the 2nd secondary FFT operation result respectively with twiddle factor rear corresponding described storer 2_1, the storer 2_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th secondary FFT operation result in a group, just the 0th secondary FFT operation result sent to 3 WFTA calculation process of the third level successively, until the 0th secondary FFT operation result in the 420th group sent to 3 WFTA calculation process of the third level;
S203: the data among the storer 2_1 successively order are sent to 3 WFTA calculation process of the third level;
S204: the data among the storer 2_2 successively order are sent to 3 WFTA calculation process of the third level.
Preferably, 3 WFTA calculation process of the described third level are used for comprising step:
S301: deposit front 280 data of 3 the WFTA calculation process in second level output successively order in storer 3_1 and storer 3_2; Described storer 3_1 and storer 3_2 are 140 storer;
S302: when 3 the WFTA calculation process in the second level are exported the 280th data, read the 0th data and the 140th data, the 0th data, the 140th data and the 280th data are carried out 3 FFT calculation process, obtain the 1st group of the 0 0th. 3 grade of FFT operation result, the 0 1st. 3 grade of FFT operation result and the 0 2nd. 3 grade of FFT operation result; With the 0 1st. 3 grade of FFT operation result and the 2nd three grades of FFT operation results respectively with twiddle factor rear corresponding described storer 3_1, the storer 3_2 of depositing back that multiply each other;
Repeating step S302, until the 419th data arrive, get the 139th data and the 279th data, the 139th data, the 279th data and the 419th data are carried out 3 FFT calculation process, obtain the 140th group of the 0 0th. 3 grade of FFT operation result, the 0 1st. 3 grade of FFT operation result and the 0 2nd. 3 grade of FFT operation result; With the 1st three grades of FFT operation result in the 140th group and the 0 2nd. 3 grade of FFT operation result respectively with twiddle factor rear corresponding described storer 3_1, the storer 3_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0 0th. 3 grade of FFT operation result in a group, just the 0th three grades of FFT operation results are sent to 4 WFTA calculation process of the fourth stage, until the 0 0th. 3 grade of FFT operation result in the 140th group sent to 4 WFTA calculation process of the fourth stage;
S303: the data among the storer 3_1 successively order are sent to 4 WFTA calculation process of the fourth stage;
S304: the data among the storer 3_2 successively order are sent to 4 WFTA calculation process of the fourth stage.
Preferably, 4 WFTA calculation process of the described fourth stage are used for comprising step:
S401: deposit front 105 data of 3 WFTA calculation process of third level output successively order in storer 4_1, storer 4_2 and storer 4_3; Described storer 4_1, storer 4_2, storer 4_3 are respectively 35 storer;
S402: when 3 WFTA calculation process of the third level are exported the 105th data, read the 0th data, the 35th data, the 70th data, the 0th data, the 35th data, the 70th data and the 105th data are carried out 4 FFT calculation process, obtain the 1st group of the 0th level Four FFT operation result, the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result; With the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result respectively with twiddle factor rear corresponding described storer 4_1, storer 4_2 and the storer 4_3 of depositing back that multiply each other;
Repeating step S402, until the 139th data arrive, get the 34th data, the 69th data and the 104th data, the 34th data, the 69th data, the 104th data and the 139th data are carried out 4 FFT calculation process, obtain the 35th group of the 0th level Four FFT operation result, the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result; With the 1st level Four FFT operation result in the 35th group, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result respectively with twiddle factor rear corresponding described storer 4_1, storer 4_2 and the storer 4_3 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th level Four FFT operation result in a group, just the 0th level Four FFT operation result sent to 5 WFTA calculation process of level V, until the 35th group the 0th level Four FFT operation result sent to 5 WFTA calculation process of level V;
S403: the data among the storer 4_1 successively order are sent to 5 WFTA calculation process of level V;
S404: the data among the storer 4_2 successively order are sent to 5 WFTA calculation process of level V;
S405: the data among the storer 4_3 successively order are sent to 5 WFTA calculation process of level V.
Preferably, 5 WFTA calculation process of described level V are used for comprising step:
S501: deposit front 28 data of 4 WFTA calculation process of fourth stage output successively order in storer 5_1, storer 5_2, storer 5_3, storer 5_4; Described storer 5_1, storer 5_2, storer 5_3, storer 5_5 are respectively 7 storer;
S502: when 4 WFTA calculation process of the fourth stage are exported the 28th data, read the 0th data, the 7th data, the 14th data, the 21st data, the 0th data, the 7th data, the 14th data, the 21st data and the 28th data are carried out 5 FFT calculation process, obtain the 1st group of the 0th Pyatyi FFT operation result, the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result; With the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result respectively with twiddle factor rear corresponding described storer 5_1, storer 5_2, storer 5_3 and the storer 5_4 of depositing back that multiply each other;
Repeating step S502, until the 34th data arrive, get the 6th data, the 13rd data, the 20th data and the 27th data, the 6th data, 1_3 point data, the 20th data, the 27th data and the 34th data are carried out 5 FFT calculation process, obtain the 7th group of the 0th Pyatyi FFT operation result, the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result; With the 1st Pyatyi FFT operation result in the 7th group, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result respectively with twiddle factor rear corresponding described storer 5_1, storer 5_2, storer 5_3 and the storer 5_4 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th Pyatyi FFT operation result in a group, just the 0th Pyatyi FFT operation result sent to the 6th grade of 7 WFTA calculation process, until the 0th Pyatyi FFT operation result in the 7th group sent to the 6th grade of 7 WFTA calculation process;
S503: the data among the storer 5_1 successively order are sent to the 6th grade of 7 WFTA calculation process;
S504: the data among the storer 5_2 successively order are sent to the 6th grade of 7 WFTA calculation process;
S505: the data among the storer 5_3 successively order are sent to the 6th grade of 7 WFTA calculation process;
S506: the data among the storer 5_4 successively order are sent to the 6th grade of 7 WFTA calculation process.
Preferably, described the 6th grade 7 WFTA calculation process steps are 7 WFTA calculation process of serial step; After the 6th grade of 7 WFTA calculation process have been finished 3780 data calculation process, will export after the whole order of calculation process result.
Leaf transformation treatment circuit in 3780 point discrete Fouriers among the present invention comprises 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi, six grades of 7 WFTA operation processing unit and whole order unit;
Described WFTA operation processing unit at different levels and whole order unit all have data input pin and data output end, and WFTA operation processing unit at different levels and whole order unit all have enable signal output terminal and enable signal input end;
In the described WFTA operation processing unit at different levels, the data output end of the WFTA operation processing unit of upper level is connected with the data input pin of the WFTA operation processing unit of next stage; The enable signal output terminal of the WFTA operation processing unit of upper level is connected with the enable signal input end of the WFTA operation processing unit of next stage; The data output end of six grades of 7 WFTA operation processing unit is connected with whole order cell data input end; The enable signal output terminal of six grades of 7 WFTA operation processing unit is connected with whole order cell enable signal input part.
Preferably, in 3 WFTA operation processing unit of described one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi arbitrarily one-level WFTA operation processing unit all have storer, WFTA unit, control module, twiddle factor multiplication unit and selector switch; One-level is inner arbitrarily in 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi: described control module all has signal with storer, WFTA unit and is connected;
Control module is used for the storer that receives the data of upper level WFTA operation processing unit output and store WFTA operation processing unit at the corresponding levels into until storer is filled with, reads the enable signal of the data of the storer of WFTA operation processing unit at the corresponding levels, the enable signal that receives the output of upper level WFTA operation processing unit, output WFTA operation processing unit output at the corresponding levels; Be used for that data are sent into the WFTA unit and carry out the FFT computing;
The WFTA unit is used for carrying out the FFT computing;
Described selector switch is used for the first number of the operation result of WFTA unit output is sent into next stage WFTA operation processing unit; And be used for the data of the storer of WFTA operation processing unit at the corresponding levels are sent into next stage WFTA operation processing unit;
Described twiddle factor multiplication unit is used for the number except the first number with the operation result of WFTA unit output and is rotated the storer of depositing back WFTA operation processing unit at the corresponding levels after the factor multiplying.
Preferably, the amount of memory of 3 WFTA operation processing unit of described one-level is 2, and every memory span is 1260 points, and the WFTA unit in 3 WFTA operation processing unit of one-level is 3 WFTA unit;
The amount of memory of 3 WFTA operation processing unit of secondary is 2, and every memory span is 420 points, and the WFTA unit in 3 WFTA operation processing unit of secondary is 3 WFTA unit;
The amount of memory of three grades of 3 WFTA operation processing unit is 2, and every memory span is 140 points, and the WFTA unit in three grades of 3 WFTA operation processing unit is 3 WFTA unit;
The amount of memory of 4 WFTA operation processing unit of level Four is 3, and every memory span is 35 points, and the WFTA unit in 4 WFTA operation processing unit of level Four is 4 WFTA unit;
The amount of memory of 5 WFTA operation processing unit of Pyatyi is 4, and every memory span is 7 points, and the WFTA unit in 5 WFTA operation processing unit of Pyatyi is 5 WFTA unit;
Six grades of 7 WFTA operation processing unit comprise control circuit and WFTA unit, and described WFTA unit is 7 WFTA unit of serial sequential organization; 7 WFTA unit that control circuit in six grades of 7 WFTA operation processing unit is used for receiving the data of upper level WFTA operation processing unit output behind the enable signal of receiving the output of higher level WFTA operation processing unit and sends into successively the serial sequential organization; The data output end of described 7 WFTA unit is connected with the data input pin of whole order unit.
In sum, owing to adopted technique scheme, the invention has the beneficial effects as follows:
1. adopt flow system to process 3780 FFT computings, avoid using in the prior art recycle design to process computing, reduced the complexity of system, system realizes simpler, thereby operation efficiency significantly improves the time delay that has reduced system;
2. saved storage space.
Description of drawings
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein:
Fig. 1 is 3 WFTA sequential block diagrams in the circuit of the present invention;
Fig. 2 is 4 WFTA sequential block diagrams in the circuit of the present invention;
Fig. 3 is 5 WFTA sequential block diagrams in the circuit of the present invention;
The theory diagram of Fig. 4 circuit of the present invention;
Fig. 5 A is 7 WFTA sequential block diagram the first half in the circuit of the present invention;
Fig. 5 B map interlinking 5A is 7 WFTA sequential block diagram the latter halfs in the circuit of the present invention.
Embodiment
Disclosed all features in this instructions, or the step in disclosed all methods or the process except mutually exclusive feature and/or step, all can make up by any way.
Disclosed arbitrary feature in this instructions (comprising any accessory claim, summary and accompanying drawing) is unless special narration all can be replaced by other equivalences or the alternative features with similar purpose.That is, unless special narration, each feature is an example in a series of equivalences or the similar characteristics.
The invention discloses leaf transformation treatment circuit in a kind of 3780 point discrete Fouriers, comprise 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi, six grades of 7 WFTA operation processing unit and whole order unit;
Described WFTA operation processing unit at different levels and whole order unit all have data input pin, data output end, enable signal output terminal and enable signal input end.
In the described WFTA operation processing unit at different levels, the data output end of the WFTA operation processing unit of upper level is connected (for example: the data input pin of 3 WFTA operation processing unit of the data output end of 3 WFTA operation processing unit of one-level and secondary is connected) with the data input pin of the WFTA operation processing unit of next stage; The enable signal output terminal of the WFTA operation processing unit of upper level is connected with the enable signal input end of the WFTA operation processing unit of next stage, the WFTA operation processing unit of upper level also can the output enable signal in the output valid data in order to start the WFTA operation processing unit of next stage; The data output end of six grades of 7 WFTA operation processing unit is connected with whole order cell data input end; The enable signal output terminal of six grades of 7 WFTA operation processing unit is connected with whole order cell enable signal input part.
In 3 WFTA operation processing unit of described one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi arbitrarily one-level WFTA operation processing unit all have storer, WFTA unit, control module, twiddle factor multiplication unit and selector switch.
One-level WFTA operation processing unit is inner arbitrarily in 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi: described control module all has signal with storer, WFTA unit and is connected.Control module is used for receiving the enable signal of the enable signal of upper level WFTA operation processing unit output, the data that receive the output of upper level WFTA operation processing unit, the data that read the storer of WFTA operation processing unit at the corresponding levels, output WFTA operation processing unit output at the corresponding levels; Be used for that also the data of the storer of the data of upper level WFTA operation processing unit output, WFTA operation processing unit at the corresponding levels are sent into the WFTA unit and carry out the FFT computing; Control module also is used for the data of the storer of WFTA operation processing unit at the corresponding levels are write the storer of next stage WFTA operation processing unit.
WFTA unit in 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi is used for carrying out the FFT computing for the WFTA unit of parallel sequential organization.
Described selector switch is used for the first number with the operation result of WFTA unit output and deposits the storer of next stage WFTA operation processing unit in and be used for the data of the storer of WFTA operation processing unit at the corresponding levels are sent into next stage WFTA operation processing unit.
Described twiddle factor multiplication unit is used for the number except the first number with the operation result of WFTA unit output and multiply by successively the storer of depositing back WFTA operation processing unit at the corresponding levels behind the twiddle factor.
Concrete, the amount of memory of 3 WFTA operation processing unit of one-level is 2, and every memory span is 1260 points, and the WFTA unit in 3 WFTA operation processing unit of one-level is 3 WFTA unit.
The amount of memory of 3 WFTA operation processing unit of secondary is 2, and every memory span is 420 points, and the WFTA unit in 3 WFTA operation processing unit of secondary is 3 WFTA unit.
The amount of memory of three grades of 3 WFTA operation processing unit is 2, and every memory span is 140 points, and the WFTA unit in three grades of 3 WFTA operation processing unit is 3 WFTA unit.
The amount of memory of 4 WFTA operation processing unit of level Four is 3, and every memory span is 35 points, and the WFTA unit in 4 WFTA operation processing unit of level Four is 4 WFTA unit.
The amount of memory of 5 WFTA operation processing unit of Pyatyi is 4, and every memory span is 7 points, and the WFTA unit in 5 WFTA operation processing unit of Pyatyi is 5 WFTA unit.
Six grades of 7 WFTA operation processing unit comprise control circuit and WFTA unit, and described WFTA unit is 7 WFTA unit of serial sequential organization; 7 WFTA unit that control circuit in six grades of 7 WFTA operation processing unit is used for receiving the data of upper level WFTA operation processing unit output behind the enable signal of receiving the output of higher level WFTA operation processing unit and sends into successively the serial sequential organization; The data output end of described 7 WFTA unit is connected with the data input pin of whole order unit.
Because when carrying out the FFT computing, the order of operation result can be upset, no longer corresponding with the sequence before the calculating, therefore also need the FFT operation result is carried out whole order.Described whole order unit has storer, is used for the result of calculation of six grades of 7 WFTA operation processing unit outputs is sequentially adjusted, and is correct order.
The method of work of leaf transformation treatment circuit is such in above-mentioned 3780 point discrete Fouriers:
3780 data enter 3 WFTA operation processing unit of one-level under synchronous clock.The computing of the first order only needs the data of buffer memory 2 * 1260.Its data stream is such: when the data of current 3780 FFT/IFFT modules are effective, 2520 data that the control module of 3 WFTA operation processing unit of one-level will be introduced into are sequentially deposited (RAM1_1 among two 1260 the RAM, RAM1_2), when depositing the 2520th number, read simultaneously two 1260 RAM(RAM1_1, RAM1_2) x in (0) and x (1260) two numbers, when x (2520), when namely the 2521st number is come, x (0) and x (1260) also are read out simultaneously, so just can be with this three number (x (0), x (1260), x (2520)) sends simultaneously 3 WFTA unit to and go computing, data afterwards (x (1), x (1261), x (2521)) are until (x (1259), x (2519), x (3779)) all be to send to like this 3 WFTA unitary operations.
The result of each 3 WFTA unitary operations is 3 FFT operation result, and this operation result of 3 is designated as (X (0), X (1), X (2)) successively with its natural order, with X (1), X (2) respectively with twiddle factor e -2 π kj/3780, e -4 π kj/3780Wherein, j is imaginary part unit, the number of times of 3 WFTA unitary operations of the corresponding one-level of k gets 0,1,2,3 successively ... 1259, multiplying each other also, corresponding being written back to (is about to and X(1) among the RAM1_1 and RAM1_2 at the corresponding levels be written back among the RAM1_1 of the corresponding levels, X (2) is written back among the RAM1_2), X (0) is sent to 3 WFTA operation processing unit of secondary.The number of times of 3 WFTA unitary operations of the corresponding one-level of above-mentioned k gets 0,1,2,3 successively ... 1259, that is to say that the X (1) of 3 FFT operation results of the 1st group of one-level multiply by e -2 * 0 π j/3780After be written back among the RAM1_1, X (2) multiply by e -4 * 0 π j/3780After be written back among the RAM1_2; The X (1) of 3 FFT operation results of the 2nd group of one-level multiply by e -2 * 1 π j/3780After be written back among the RAM1_1, X (2) multiply by e -4 * 1 π j/3780After be written back among the RAM1_2; The X (1) of 3 FFT operation results of the 3rd group of one-level multiply by e -2 * 2 π j/3780After be written back among the RAM1_1, X (2) multiply by e -4 * 2 π j/3780After be written back among the RAM1_2, by that analogy, until the X (1) of 3 FFT operation results of the 1260th group of one-level multiply by e -2 * 1259 π j/3780After be written back among the RAM1_1, X (2) multiply by e -4 * 1259 π j/3780After be written back among the RAM1_2.
As X (0) when counting down to the 1260th number, namely calculate the first number X(0 of the 1260th group of one-level FFT operation result) and deliver to the RAM of 3 WFTA operation processing unit of secondary after, selector switch begins to read the data of RAM1_1 to 3 WFTA operation processing unit of secondary, begin simultaneously front 1260 data of the data of next frame are stored among the RAM1_1, to form flowing structure.Finish and read among the RAM1_1 after 1260 numbers, selector switch again order reads among the RAM1_2 1260 numbers and delivers to 3 WFTA operation processing unit of secondary, begins simultaneously 1260 data in centre of the data of next frame are stored among the RAM1_2, to form flowing structure.Later on cycling.
3 WFTA operation processing unit of secondary are processed the output data of 3 WFTA operation processing unit of one-level, finish after 3 WFTA computings and with result's output and deliver to three grades of 3 WFTA operation processing unit.
3 WFTA operation processing unit of secondary only need the data of buffer memory 2 * 420, when the output data of 3 WFTA operation processing unit of one-level are effective, the control module output enable signal of 3 WFTA operation processing unit of one-level, 840 data that the control module of 3 WFTA operation processing unit of secondary will be introduced into are sequentially deposited (RAM2_1 among two 420 the RAM, RAM2_2), when depositing the 840th number, read simultaneously two 420 RAM(RAM2_1, RAM2_2) x in (0) and x (420) two numbers, when x (840), when namely the 841st number is come, x (0) and x (420) also are read out simultaneously, so just can be with this three number (x (0), x (420), x (840)) the WFTA arithmetic element of sending simultaneously at 3 is gone computing, later data (x (1), x (421), x (841)) are until (x (419), x (839), x (1259)) all be to send to like this 3 WFTA unitary operations.
Same, the result of each 3 WFTA unitary operations is 3 FFT operation result, remembers this operation result of 3 for (X (0), X (1), X (2)), with X (1), and X (2) and twiddle factor e -2 π kj/1260, e -4 π kj/1260Wherein, j is imaginary part unit, the number of times of 3 WFTA unitary operations of the corresponding secondary of k gets 0 successively, 1,2,3, the concrete value of 419(k is referring to 3 WFTA unitary operations of one-level process), multiply each other and corresponding be written back to that (X (1) is written back to RAM2_1 among 2 RAM at the corresponding levels, X (2) is written back to RAM2_2), X (0) is sent to three grades of 3 WFTA operation processing unit, as X (0) when counting down to the 420th number, after namely calculating the 420th group of FFT result's X (0) and delivering to three grades of 3 WFTA operation processing unit, selector switch begins to read data to three grade 3 WFTA operation processing unit of RAM2_1, control module stores front 420 data of the output of the first order among the RAM2_1 into simultaneously, to form flowing structure.Finish and read among the RAM2_1 after 420 numbers, selector switch again order reads among the RAM2_2 420 and counts to three grades of 3 WFTA operation processing unit, and control module stores second 420 data of the output of the first order among the RAM2_2 into simultaneously, to form flowing structure.Later on cycling.
Three grades of 3 WFTA operation processing unit are processed the output data of 3 WFTA operation processing unit of secondary, finish 3 WFTA and 4 WFTA operation processing unit of level Four are delivered in output.
Three grades of 3 WFTA operation processing unit only need the data of buffer memory 2 * 140, when the output of 3 WFTA operation processing unit of secondary is effective, 3 WFTA operation processing unit of secondary output enable signal, 280 data that the control module of three grades of 3 WFTA operation processing unit will be introduced into are sequentially deposited (RAM3_1 among two 140 the RAM, RAM3_2), when depositing the 280th number, read simultaneously two 140 RAM(RAM3_1, RAM3_2) x in (0) and x (140) two numbers, when x (280), when namely the 281st number is come, x (0) and x (140) also are read out simultaneously, so just can be with this three number (x (0), x (140), x (280)) sends simultaneously 3 WFTA arithmetic elements to and go computing, later data (x (1), x (141), x (281)) until (x (139), x (279), x (419)) all is to send to like this 3 WFTA unitary operations, and operation result is 3 FFT operation result, remember that this operation result of 3 is (X (0), X (1), X (2)), with X (1), X (2) and twiddle factor e -2 π kj/420, e -4 π kj/420Wherein, j is imaginary part unit, the number of times of corresponding three grades of 3 the WFTA unitary operations of k gets 0,1,2,3 successively ... the concrete value of 139(k is referring to 3 WFTA unitary operations of one-level process), multiply each other and be written back to that (X (1) is written back to RAM3_1 among 2 at the corresponding levels RAM, X (2) is written back to RAM3_2), X (0) is sent to 4 WFTA operation processing unit of level Four.As X (0) when counting down to the 280th number, namely the X (0) of the 280th group of FFT operation result calculates and after selected device delivers to 4 grades of three grades of 3 WFTA operation processing unit, the selector switch of three grades of 3 WFTA operation processing unit begins to read the data of RAM3_1 to 4 WFTA operation processing unit of level Four, control module stores front 140 data of the output of 3 WFTA operation processing unit of secondary among the RAM3_1 into simultaneously, to form flowing structure.Finish and read among the RAM3_1 after 140 numbers, selector switch again order reads among the RAM3_2 140 and counts to 4 WFTA operation processing unit of level Four, control module stores among the RAM3_1 140 data in centre of the output of 3 WFTA operation processing unit of secondary into later cycling simultaneously.
4 WFTA operation processing unit of level Four are processed the data of three grades of 3 WFTA operation processing unit outputs, finish 4 WFTA and 5 WFTA operation processing unit of Pyatyi are delivered in output.
4 WFTA operation processing unit of level Four only need the data of buffer memory 3 * 35, when the output of three grades of 3 WFTA operation processing unit is effective, the control module output enable signal of three grades of 3 WFTA operation processing unit, 105 data that the control module of 4 WFTA operation processing unit of level Four will be introduced into are sequentially deposited (RAM4_1 among three 35 the RAM, RAM4_2, RAM4_3), when depositing the 105th number, read simultaneously three 35 RAM(RAM4_1, RAM4_2, RAM4_3) x in (0), x (35), x (70) three numbers, when x (105), when namely the 106th number is come, x (0), x (35), x (70) also is read out simultaneously, so just can be with this four number (x (0), x (35), x (70), x (105)) sends simultaneously 4 WFTA unit to and go computing, later data (x (1), x (36), x (71), x (106)) until (x (34), x (69), x (104), x (139)) all be to send to like this 4 WFTA unitary operation, and operation result is 4 FFT operation result, remember that this operation result of 4 is (X (0), X (1), X (2), X (3)), with X (1), X (2), X (3) respectively with twiddle factor e -2 π kj/140, e -4 π kj/140, e -6 π kj/140Wherein, j is imaginary part unit, the number of times of 4 WFTA unitary operations of the corresponding level Four of k gets 0,1,2,3 successively ... 34, (the concrete value of k is referring to 3 WFTA unitary operations of one-level process) multiplies each other and corresponding being written back among RAM4_1, RAM4_2 at the corresponding levels, the RAM4_3, and X (0) is sent to 5 WFTA operation processing unit of Pyatyi by the selector switch of 4 WFTA operation processing unit of level Four.As X (0) when counting down to the 35th number, after namely the X (0) among the 35th group of 4 FFT result calculates and is sent to 5 WFTA operation processing unit of Pyatyi, the selector switch of 4 WFTA operation processing unit of level Four begins to read successively the data of RAM4_1, RAM4_2, RAM4_3 to level V, control module stores front 105 data of three grades of 3 WFTA operation processing unit outputs among RAM4_1, RAM4_2, the RAM4_3 into simultaneously, to form flowing structure.
5 WFTA operation processing unit of Pyatyi are processed the output data of 4 WFTA operation processing unit of level Four, finish 5 WFTA and six grades of 7 WFTA operation processing unit are delivered in output.
5 WFTA operation processing unit of Pyatyi only need the data of buffer memory 4 * 7, when the output of 4 WFTA operation processing unit of level Four is effective, 4 WFTA operation processing unit of level Four output enable signal, 28 data that the control module of 5 WFTA operation processing unit of Pyatyi will be introduced into are sequentially deposited (RAM5_1 among four 7 the RAM, RAM5_2, RAM5_3, RAM5_, 4), when depositing the 28th number, read simultaneously four 7 RAM(RAM5_1, RAM5_2, RAM5_3, RAM5_4) x in (0), x (7), x (14), x (21) four numbers, when x (28), when namely the 29th number is come, x (0), x (7), x (14), x (21) also is read out simultaneously, so just can be with this four number (x (0), x (7), x (14), x (21), x (28)) the WFTA arithmetic element of sending simultaneously at 4 is gone computing, later data (x (1), x (8), x (15), x (22), x (29)) until (x (6), x (13), x (20), x (27), x (34)) all be to send to like this 5 WFTA unitary operations, and operation result is 5 FFT operation result, remember that this operation result of 5 is (X (0), X (1), X (2), X (3), X (4)), with X (1), X (2), X (3), X (4) respectively with twiddle factor e -2 π kj/35, e -4 π kj/35, e -6 π kj/35, e -8 π kj/35Wherein, j is imaginary part unit, the number of times of 5 WFTA unitary operations of the corresponding Pyatyi of k gets 0,1,2,3 successively ... the concrete value of 6(k is referring to 3 WFTA unitary operations of one-level process), multiply each other and corresponding being written back among RAM5_1, RAM5_2 at the corresponding levels, RAM5_3, the RAM5_4, X (0) is sent to six grades of 7 WFTA operation processing unit by the selector switch of 5 WFTA operation processing unit of Pyatyi and processes.As X (0) when counting down to the 7th number, namely after the X (0) of the 7th group of FFT operation result calculates and is sent to six grades of 7 WFTA operation processing unit, the selector switch of 5 WFTA operation processing unit of Pyatyi begins to read successively data to six grade 7 WFTA operation processing unit of RAM5_1, RAM5_2, RAM5_3, RAM5_4, control module stores front 28 data of 4 WFTA operation processing unit outputs of level Four among RAM5_1, RAM5_2, RAM5_3, the RAM5_4 successively simultaneously, later on cycling is to form flowing structure.
Six grades of 7 WFTA operation processing unit are processed the output data of 5 WFTA operation processing unit of Pyatyi, finish 7 WFTA and operation result is exported to the output of whole order unit.7 WFTA adopt serial sequential organization (shown in Fig. 5 A, Fig. 5 B).
Whole order unit is used for 3780 Fourier transform results are resequenced, and its specific practice is to be provided by following:
Figure BDA00001966592100201
P is the address that the operation result storer of six grades of 7 WFTA operation processing unit outputs is deposited in whole order unit.Whole program process is such: whole order unit is at first with the 1st in the operation result of six grades of 7 WFTA operation processing unit outputs, 2,3,4 ... the address that the number correspondence is deposited storer is respectively the 0th, 540,1080,1620 ..., when six grades of 7 WFTA operation processing unit are stored the 3780th number, whole order unit exports the 0th successively, 1,2,3 ... the data of depositing in the storer.
The present invention is not limited to aforesaid embodiment, WFTA unit in WFTA operation processing unit at different levels replaces with contrary WFTA unit, the present invention can also solve the processing problem of leaf inverse transformation in 3780 point discrete Fouriers, and reach leaf transformation in above-mentioned 3780 point discrete Fouriers fast, the technique effect of conserve storage.The present invention expands to any new feature or any new combination that discloses in this manual, and the arbitrary new method that discloses or step or any new combination of process.

Claims (10)

1. leaf transformation disposal route in the point discrete Fourier is characterized in that, may further comprise the steps:
3780 discrete datas of ordered pair are carried out 3 WFTA calculation process of the first order, 3 the WFTA calculation process in the second level, 3 WFTA calculation process of the third level, 4 WFTA calculation process of the fourth stage, 5 WFTA calculation process of level V, the 6th grade of 7 WFTA calculation process successively, adjust afterwards the order through the data after the 6th grade of 7 WFTA calculation process, export at last result.
2. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 1 is characterized in that, the step of 3 WFTA calculation process of the described first order is:
S101: described 3780 discrete datas enter 3 WFTA calculation process of the first order successively, deposit successively 2519 data of the 0th data to that are introduced in storer 1_1, storer 1_2; Described storer 1_1, storer 1_2 are 1260 storer;
S102: when the 2520th data arrive, get the 0th data and the 1260th data, the 0th data, the 1260th data and the 2520th data are carried out 3 FFT calculation process, obtain the 1st group of the 0th one-level FFT operation result, the 1st one-level FFT operation result and the 2nd one-level FFT operation result; With the 1st one-level FFT operation result of the 1st group and the 2nd one-level FFT operation result respectively with twiddle factor rear corresponding described storer 1_1, the storer 1_2 of depositing back that multiply each other;
Repeating step S102, until the 3779th data arrive, get the 1259th data and the 2519th data, the 1259th data, the 2519th data and the 3779th data are carried out 3 FFT calculation process, obtain the 1260th group the 0th one-level FFT operation result, the 1st one-level FFT operation result and the 2nd one-level FFT operation result; With the 1st one-level FFT operation result in the 1260th group and the 2nd one-level FFT operation result respectively with twiddle factor rear corresponding described storer 1_1, the storer 1_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th one-level FFT operation result in a group, just the 0th one-level FFT operation result sent to 3 the WFTA calculation process in the second level successively, until the 0th one-level FFT operation result in the 1260th group sent to 3 the WFTA calculation process in the second level;
S103: the data among the storer 1_1 successively order are sent to 3 the WFTA calculation process in the second level;
S104: the data among the storer 1_2 successively order are sent to 3 the WFTA calculation process in the second level.
3. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 2 is characterized in that, 3 the WFTA calculation process in the described second level are used for comprising step:
S201: deposit front 840 data of 3 WFTA calculation process of first order output successively order in storer 2_1 and storer 2_2; Described storer 2_1 and storer 2_2 are 420 storer;
S202: when 3 WFTA calculation process of the first order are exported the 840th data, read the 0th data and the 420th data, the 0th data, the 420th data and the 840th data are carried out 3 FFT calculation process, obtain the 1st group of the 0th secondary FFT operation result, the 1st secondary FFT operation result and the 2nd secondary FFT operation result; With the 1st secondary FFT operation result and the 2nd secondary FFT operation result respectively with twiddle factor rear corresponding described storer 2_1, the storer 2_2 of depositing back that multiply each other;
Repeating step S202, until the 1259th data arrive, get the 419th data and the 839th data, the 419th data, the 839th data and the 1259th data are carried out 3 FFT calculation process, obtain the 420th group of the 0th secondary FFT operation result, the 1st secondary FFT operation result and the 2nd secondary FFT operation result; With the 1st secondary FFT operation result in the 420th group and the 2nd secondary FFT operation result respectively with twiddle factor rear corresponding described storer 2_1, the storer 2_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th secondary FFT operation result in a group, just the 0th secondary FFT operation result sent to 3 WFTA calculation process of the third level successively, until the 0th secondary FFT operation result in the 420th group sent to 3 WFTA calculation process of the third level;
S203: the data among the storer 2_1 successively order are sent to 3 WFTA calculation process of the third level;
S204: the data among the storer 2_2 successively order are sent to 3 WFTA calculation process of the third level.
4. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 3 is characterized in that, 3 WFTA calculation process of the described third level are used for comprising step:
S301: deposit front 280 data of 3 the WFTA calculation process in second level output successively order in storer 3_1 and storer 3_2; Described storer 3_1 and storer 3_2 are 140 storer;
S302: when 3 the WFTA calculation process in the second level are exported the 280th data, read the 0th data and the 140th data, the 0th data, the 140th data and the 280th data are carried out 3 FFT calculation process, obtain the 1st group of the 0 0th. 3 grade of FFT operation result, the 0 1st. 3 grade of FFT operation result and the 0 2nd. 3 grade of FFT operation result; With the 0 1st. 3 grade of FFT operation result and the 2nd three grades of FFT operation results respectively with twiddle factor rear corresponding described storer 3_1, the storer 3_2 of depositing back that multiply each other;
Repeating step S302, until the 419th data arrive, get the 139th data and the 279th data, the 139th data, the 279th data and the 419th data are carried out 3 FFT calculation process, obtain the 140th group of the 0 0th. 3 grade of FFT operation result, the 0 1st. 3 grade of FFT operation result and the 0 2nd. 3 grade of FFT operation result; With the 1st three grades of FFT operation result in the 140th group and the 0 2nd. 3 grade of FFT operation result respectively with twiddle factor rear corresponding described storer 3_1, the storer 3_2 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0 0th. 3 grade of FFT operation result in a group, just the 0th three grades of FFT operation results are sent to 4 WFTA calculation process of the fourth stage, until the 0 0th. 3 grade of FFT operation result in the 140th group sent to 4 WFTA calculation process of the fourth stage;
S303: the data among the storer 3_1 successively order are sent to 4 WFTA calculation process of the fourth stage;
S304: the data among the storer 3_2 successively order are sent to 4 WFTA calculation process of the fourth stage.
5. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 4 is characterized in that, 4 WFTA calculation process of the described fourth stage are used for comprising step:
S401: deposit front 105 data of 3 WFTA calculation process of third level output successively order in storer 4_1, storer 4_2 and storer 4_3; Described storer 4_1, storer 4_2, storer 4_3 are respectively 35 storer;
S402: when 3 WFTA calculation process of the third level are exported the 105th data, read the 0th data, the 35th data, the 70th data, the 0th data, the 35th data, the 70th data and the 105th data are carried out 4 FFT calculation process, obtain the 1st group of the 0th level Four FFT operation result, the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result; With the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result respectively with twiddle factor rear corresponding described storer 4_1, storer 4_2 and the storer 4_3 of depositing back that multiply each other;
Repeating step S402, until the 139th data arrive, get the 34th data, the 69th data and the 104th data, the 34th data, the 69th data, the 104th data and the 139th data are carried out 4 FFT calculation process, obtain the 35th group of the 0th level Four FFT operation result, the 1st level Four FFT operation result, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result; With the 1st level Four FFT operation result in the 35th group, the 2nd level Four FFT operation result and the 3rd level Four FFT operation result respectively with twiddle factor rear corresponding described storer 4_1, storer 4_2 and the storer 4_3 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th level Four FFT operation result in a group, just the 0th level Four FFT operation result sent to 5 WFTA calculation process of level V, until the 35th group the 0th level Four FFT operation result sent to 5 WFTA calculation process of level V;
S403: the data among the storer 4_1 successively order are sent to 5 WFTA calculation process of level V;
S404: the data among the storer 4_2 successively order are sent to 5 WFTA calculation process of level V;
S405: the data among the storer 4_3 successively order are sent to 5 WFTA calculation process of level V.
6. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 5 is characterized in that, 5 WFTA calculation process of described level V are used for comprising step:
S501: deposit front 28 data of 4 WFTA calculation process of fourth stage output successively order in storer 5_1, storer 5_2, storer 5_3, storer 5_4; Described storer 5_1, storer 5_2, storer 5_3, storer 5_5 are respectively 7 storer;
S502: when 4 WFTA calculation process of the fourth stage are exported the 28th data, read the 0th data, the 7th data, the 14th data, the 21st data, the 0th data, the 7th data, the 14th data, the 21st data and the 28th data are carried out 5 FFT calculation process, obtain the 1st group of the 0th Pyatyi FFT operation result, the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result; With the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result respectively with twiddle factor rear corresponding described storer 5_1, storer 5_2, storer 5_3 and the storer 5_4 of depositing back that multiply each other;
Repeating step S502, until the 34th data arrive, get the 6th data, the 13rd data, the 20th data and the 27th data, the 6th data, the 13rd data, the 20th data, the 27th data and the 34th data are carried out 5 FFT calculation process, obtain the 7th group of the 0th Pyatyi FFT operation result, the 1st Pyatyi FFT operation result, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result; With the 1st Pyatyi FFT operation result in the 7th group, the 2nd Pyatyi FFT operation result, the 3rd Pyatyi FFT operation result and the 4th Pyatyi FFT operation result respectively with twiddle factor rear corresponding described storer 5_1, storer 5_2, storer 5_3 and the storer 5_4 of depositing back that multiply each other;
Simultaneously, whenever calculate the 0th Pyatyi FFT operation result in a group, just the 0th Pyatyi FFT operation result sent to the 6th grade of 7 WFTA calculation process, until the 0th Pyatyi FFT operation result in the 7th group sent to the 6th grade of 7 WFTA calculation process;
S503: the data among the storer 5_1 successively order are sent to the 6th grade of 7 WFTA calculation process;
S504: the data among the storer 5_2 successively order are sent to the 6th grade of 7 WFTA calculation process;
S505: the data among the storer 5_3 successively order are sent to the 6th grade of 7 WFTA calculation process;
S506: the data among the storer 5_4 successively order are sent to the 6th grade of 7 WFTA calculation process.
7. leaf transformation disposal route in a kind of 3780 point discrete Fouriers according to claim 6 is characterized in that, described the 6th grade 7 WFTA calculation process steps are 7 WFTA calculation process of serial step; After the 6th grade of 7 WFTA calculation process have been finished 3780 data calculation process, will export after the whole order of calculation process result.
8. leaf transformation treatment circuit in the point discrete Fourier, it is characterized in that, comprise 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi, six grades of 7 WFTA operation processing unit and whole order unit;
Described WFTA operation processing unit at different levels and whole order unit all have data input pin and data output end, and WFTA operation processing unit at different levels all has enable signal output terminal and enable signal input end;
In the described WFTA operation processing unit at different levels, the data output end of the WFTA operation processing unit of upper level is connected with the data input pin of the WFTA operation processing unit of next stage; The enable signal output terminal of the WFTA operation processing unit of upper level is connected with the enable signal input end of the WFTA operation processing unit of next stage; The data output end of six grades of 7 WFTA operation processing unit is connected with whole order cell data input end; The enable signal output terminal of six grades of 7 WFTA operation processing unit is connected with whole order cell enable signal input part.
9. leaf transformation treatment circuit in a kind of 3780 point discrete Fouriers according to claim 8, it is characterized in that, in 3 WFTA operation processing unit of described one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi arbitrarily one-level WFTA operation processing unit all have storer, WFTA unit, control module, twiddle factor multiplication unit and selector switch;
One-level is inner arbitrarily in 3 WFTA operation processing unit of one-level, 3 WFTA operation processing unit of secondary, three grades of 3 WFTA operation processing unit, 4 WFTA operation processing unit of level Four, 5 WFTA operation processing unit of Pyatyi: described control module all has signal with storer, WFTA unit and is connected;
Control module is used for the storer that receives the data of upper level WFTA operation processing unit output and store WFTA operation processing unit at the corresponding levels into until storer is filled with, reads the enable signal of the data of the storer of WFTA operation processing unit at the corresponding levels, the enable signal that receives the output of upper level WFTA operation processing unit, output WFTA operation processing unit output at the corresponding levels; Be used for that data are sent into the WFTA unit and carry out the FFT computing;
The WFTA unit is used for carrying out the FFT computing;
Described selector switch is used for the first number of the operation result of WFTA unit output is sent into next stage WFTA operation processing unit; And be used for the data of the storer of WFTA operation processing unit at the corresponding levels are sent into next stage WFTA operation processing unit;
Described twiddle factor multiplication unit is used for the number except the first number with the operation result of WFTA unit output and is rotated the storer of depositing back WFTA operation processing unit at the corresponding levels after the factor multiplying.
10. leaf transformation treatment circuit in a kind of 3780 point discrete Fouriers according to claim 9, it is characterized in that, the amount of memory of 3 WFTA operation processing unit of described one-level is 2, and every memory span is 1260 points, and the WFTA unit in 3 WFTA operation processing unit of one-level is 3 WFTA unit;
The amount of memory of 3 WFTA operation processing unit of secondary is 2, and every memory span is 420 points, and the WFTA unit in 3 WFTA operation processing unit of secondary is 3 WFTA unit;
The amount of memory of three grades of 3 WFTA operation processing unit is 2, and every memory span is 140 points, and the WFTA unit in three grades of 3 WFTA operation processing unit is 3 WFTA unit;
The amount of memory of 4 WFTA operation processing unit of level Four is 3, and every memory span is 35 points, and the WFTA unit in 4 WFTA operation processing unit of level Four is 4 WFTA unit;
The amount of memory of 5 WFTA operation processing unit of Pyatyi is 4, and every memory span is 7 points, and the WFTA unit in 5 WFTA operation processing unit of Pyatyi is 5 WFTA unit;
Six grades of 7 WFTA operation processing unit comprise control circuit and WFTA unit, and described WFTA unit is 7 WFTA unit of serial sequential organization; 7 WFTA unit that control circuit in six grades of 7 WFTA operation processing unit is used for receiving the data of upper level WFTA operation processing unit output behind the enable signal of receiving the output of higher level WFTA operation processing unit and sends into successively the serial sequential organization; The data output end of described 7 WFTA unit is connected with the data input pin of whole order unit.
CN201210272515.8A 2012-08-02 2012-08-02 Leaf transformation disposal route and circuit in a kind of 3780 point discrete Fouriers Active CN102880591B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210272515.8A CN102880591B (en) 2012-08-02 2012-08-02 Leaf transformation disposal route and circuit in a kind of 3780 point discrete Fouriers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210272515.8A CN102880591B (en) 2012-08-02 2012-08-02 Leaf transformation disposal route and circuit in a kind of 3780 point discrete Fouriers

Publications (2)

Publication Number Publication Date
CN102880591A true CN102880591A (en) 2013-01-16
CN102880591B CN102880591B (en) 2015-10-21

Family

ID=47481921

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210272515.8A Active CN102880591B (en) 2012-08-02 2012-08-02 Leaf transformation disposal route and circuit in a kind of 3780 point discrete Fouriers

Country Status (1)

Country Link
CN (1) CN102880591B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103885922A (en) * 2014-03-31 2014-06-25 深圳贝特莱电子科技有限公司 Parallel processing method and system for correlation operation of discrete signals

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1348141A (en) * 2001-11-23 2002-05-08 清华大学 Discrete 3780-point Fourier transformation processor system and its structure
US20080025199A1 (en) * 2006-07-25 2008-01-31 Legend Silicon Method and device for high throughput n-point forward and inverse fast fourier transform

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1348141A (en) * 2001-11-23 2002-05-08 清华大学 Discrete 3780-point Fourier transformation processor system and its structure
US20080025199A1 (en) * 2006-07-25 2008-01-31 Legend Silicon Method and device for high throughput n-point forward and inverse fast fourier transform

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
胥凌燕: "DMB-TH系统研究及解调关键技术的硬件设计实现", 《中国优秀硕士学位论文全文数据库信息科技辑》, no. 2, 15 December 2011 (2011-12-15) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103885922A (en) * 2014-03-31 2014-06-25 深圳贝特莱电子科技有限公司 Parallel processing method and system for correlation operation of discrete signals
CN103885922B (en) * 2014-03-31 2017-02-15 深圳贝特莱电子科技股份有限公司 Parallel processing method and system for correlation operation of discrete signals

Also Published As

Publication number Publication date
CN102880591B (en) 2015-10-21

Similar Documents

Publication Publication Date Title
CN103970718B (en) Device and method is realized in a kind of fast Fourier transform
CN101136891B (en) 3780-point quick Fourier transformation processor of pipelining structure
CN101571849B (en) Fast Foourier transform processor and method thereof
CN101937423B (en) Streamline FFT/IFFT processing system
CN106997348A (en) A kind of data method for drafting and device
CN103581358B (en) IP address list matching method and device
CN102214159A (en) Method for realizing 3780-point fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) and processor thereof
CN109522674A (en) The Fast Fourier Transform (FFT) hardware design methods of base 2-2 algorithm
CN103369326A (en) Transition coder applicable to HEVC ( high efficiency video coding) standards
CN102880591A (en) 3780-point discrete Fourier transformation processing method and circuit
CN103577161A (en) Big data frequency parallel-processing method
CN104268124A (en) FFT (Fast Fourier Transform) implementing device and method
CN107368459B (en) Scheduling method of reconfigurable computing structure based on arbitrary dimension matrix multiplication
CN106339353A (en) Method supporting 4375-point and 3780-point FFT/IFFT and processor thereof
CN101694648B (en) Fourier transform processing method and device
CN104407836A (en) Device and method of carrying out cascaded multiply accumulation operation by utilizing fixed-point multiplier
CN102073620A (en) Fast Fourier converter, reverse fast Fourier converter and reverse fast method thereof
CN108631752B (en) Shaping filter and shaping method thereof
CN101938442A (en) Pre-detection base operational method of DFT (Discrete Fourier Transform) processor, mixed base operational method and system
CN106970895B (en) FFT device and method based on FPGA
Chen et al. High throughput and hardware efficient FFT architecture for LTE application
CN101764778A (en) Base band processor and base band processing method
CN102238348B (en) Data amount-variable radix-4 module for fast Fourier transform (FFT)/inverse fast Fourier transform (IFFT) processor
CN102104773B (en) Radix-4 module of FFT (Fast Fourier Transform)/IFFT (Inverse Fast Fourier Transform) processor for realizing variable data number
CN101076011B (en) Serial processor and processing method for interpolation device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: 3780-point discrete Fourier transformation processing method and circuit

Effective date of registration: 20160728

Granted publication date: 20151021

Pledgee: Agricultural Bank of China Limited by Share Ltd Chengdu Qingyang branch

Pledgor: Chengdu Kaitengsifang Sifang Digital Broadcast & Television Equipment Co., Ltd.

Registration number: 2016510000037

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model